Subversion Repositories FlightCtrl

#include <avr/io.h>
#include <avr/interrupt.h>
#include "timer2.h"
#include "eeprom.h"
#include "uart0.h"
#include "rc.h"
#include "attitude.h"

#define HEF4017_RESET_HIGH    PORTC |=  (1<<PORTC6)
#define HEF4017_RESET_LOW     PORTC &= ~(1<<PORTC6)

#define HEF4017R_ON PORTC |=  (1<<PORTC6)
#define HEF4017R_OFF PORTC &= ~(1<<PORTC6)

OutputData_t outputs[MAX_OUTPUTS];

/*****************************************************
 *              Initialize Timer 2                  
 *****************************************************/
void timer2_init(void) {
  uint8_t sreg = SREG;
 
  // disable all interrupts before reconfiguration
  cli();
 
  // set PD7 as output of the PWM for pitch servo
  DDRD |= (1 << DDD7);
  PORTD &= ~(1 << PORTD7); // set PD7 to low
 
  DDRC |= (1 << DDC6); // set PC6 as output (Reset for HEF4017)
  //PORTC &= ~(1<<PORTC6);      // set PC6 to low
  HEF4017_RESET_HIGH; // enable reset
 
  // Timer/Counter 2 Control Register A
 
  // Timer Mode is CTC (Bits: WGM22 = 0, WGM21 = 1, WGM20 = 0)
  // PD7: Normal port operation, OC2A disconnected, (Bits: COM2A1 = 0, COM2A0 = 0)
  // PD6: Normal port operation, OC2B disconnected, (Bits: COM2B1 = 0, COM2B0 = 0)
  TCCR2A &= ~((1 << COM2A1) | (1 << COM2A0) | (1 << COM2B1) | (1 << COM2B0));
  TCCR2A |= (1 << WGM21);
 
  // Timer/Counter 2 Control Register B
 
  // Set clock divider for timer 2 to SYSKLOCK/32 = 20MHz / 32 = 625 kHz
  // The timer increments from 0x00 to 0xFF with an update rate of 625 kHz or 1.6 us
  // hence the timer overflow interrupt frequency is 625 kHz / 256 = 2.44 kHz or 0.4096 ms
 
  // divider 32 (Bits: CS022 = 0, CS21 = 1, CS20 = 1)
  TCCR2B &= ~((1 << FOC2A) | (1 << FOC2B) | (1 << CS22));
  TCCR2B |= (1 << CS21) | (1 << CS20);
 
  // Initialize the Timer/Counter 2 Register
  TCNT2 = 0;
 
  // Initialize the Output Compare Register A used for signal generation on port PD7.
  OCR2A = 255;
  TCCR2A |= (1 << COM2A1); // set or clear at compare match depends on value of COM2A0
 
  // Timer/Counter 2 Interrupt Mask Register
  // Enable timer output compare match A Interrupt only
  TIMSK2 &= ~((1 << OCIE2B) | (1 << TOIE2));
  TIMSK2 |= (1 << OCIE2A);

  SREG = sreg;
}

/*****************************************************
 * Control Servo Position              
 *****************************************************/
const uint8_t SERVO_REMAPPING[MAX_OUTPUTS] = {0,0,1,2,3,4,5,6};
#define NEUTRAL_PULSELENGTH 937
#define SERVOLIMIT 500
#define FRAMELEN ((NEUTRAL_PULSELENGTH + SERVOLIMIT) * staticParams.ServoRefresh + 128)
#define MIN_PULSELENGTH (NEUTRAL_PULSELENGTH - SERVOLIMIT)
#define MAX_PULSELENGTH (NEUTRAL_PULSELENGTH + SERVOLIMIT)

ISR(TIMER2_COMPA_vect) {
  static uint16_t remainingPulseTime = 0;
  static uint8_t servoIndex = 0;
  static uint16_t sumOfPulseTimes = 0;

  if (!remainingPulseTime) {
    // Pulse is over, and the next pulse has already just started. Calculate length of next pulse.
    if (servoIndex < staticParams.ServoRefresh) {
      // There are more signals to output.
      remainingPulseTime = NEUTRAL_PULSELENGTH + outputs[SERVO_REMAPPING[servoIndex]].SetPoint;
      if (remainingPulseTime < MIN_PULSELENGTH) remainingPulseTime = MIN_PULSELENGTH;
      else if (remainingPulseTime > MAX_PULSELENGTH) remainingPulseTime = MAX_PULSELENGTH;
      sumOfPulseTimes += remainingPulseTime;
      servoIndex++;
    } else {
      // There are no more signals. Reset the counter and make this pulse cover the missing frame time.
      remainingPulseTime = FRAMELEN - sumOfPulseTimes;
      sumOfPulseTimes = servoIndex = 0;
      HEF4017_RESET_HIGH;
    }
  }

  // Schedule the next OCR2A event. The counter is already reset at this time.
  uint8_t delta;
  if (remainingPulseTime > 255+128) {
    delta = 255;
    // Set output to reset to zero at next OCR match. It does not really matter when the output is set low again,
    // as long as it happens once per pulse. This will, because all pulses are > 255+128 long.
    TCCR2A &= ~(1<<COM2A0);
  } else if (remainingPulseTime > 255) {
    // Remaining pulse lengths in the range [256..256+something small] might cause trouble if handled the standard
    // way, which is in chunks of 255. The remainder would be very small, possibly causing an interrupt on interrupt
    // condition. Instead we now make a chunk of 128. The remaining chunk will then be in [128..255] which is OK.
    delta = 128;
  } else {
    delta = remainingPulseTime;
    // Set output to high at next OCR match. This is when the 4017 counter will advance by one. Also set reset low
    TCCR2A |= (1<<COM2A0);
    HEF4017_RESET_LOW; // implement servo-disable here, by only removing the reset signal if ServoEnabled!=0.
  }
  OCR2A = delta;
  remainingPulseTime -= delta;
}