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Line 203... | Line 203... | ||
203 | // MAIN |
203 | // MAIN |
204 | /*##############################################################################*/ |
204 | /*##############################################################################*/ |
205 | int main (void) |
205 | int main (void) |
206 | { |
206 | { |
207 | unsigned int i; |
207 | unsigned int i; |
- | 208 | unsigned int ppm; |
|
208 | unsigned char colorState; |
209 | unsigned char colorState; |
209 | unsigned char nextcolorState=0; |
210 | unsigned char nextcolorState=0; |
Line 210... | Line 211... | ||
210 | 211 | ||
211 | DDRB = (CH0_B|CH1_B|CH2_B); |
212 | DDRB = (CH0_B|CH1_B|CH2_B); |
Line 237... | Line 238... | ||
237 | colorState = 0; |
238 | colorState = 0; |
Line 238... | Line 239... | ||
238 | 239 | ||
239 | while (1) |
240 | while (1) |
Line -... | Line 241... | ||
- | 241 | { |
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- | 242 | ||
- | 243 | /* |
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- | 244 | #define step 128 |
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- | 245 | #define mul 2 |
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- | 246 | ||
- | 247 | if ((ppm >= (step * 0) && (ppm < (step * 1))) ch0 = mul * ((ppm - (step * 0))); |
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- | 248 | if ((ppm >= (step * 1)) && (ppm < (step * 2))) ch1 = mul * ((ppm - (step * 1))); |
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- | 249 | if ((ppm >= (step * 2)) && (ppm < (step * 3))) ch0 = mul * ((step - 1) - (ppm - (step * 2))); |
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- | 250 | if ((ppm >= (step * 3)) && (ppm < (step * 4))) ch2 = mul * ((ppm - (step * 3))); |
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- | 251 | if ((ppm >= (step * 4)) && (ppm < (step * 5))) ch1 = mul * ((step - 1) - (ppm - (step * 4))); |
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- | 252 | if ((ppm >= (step * 5)) && (ppm < (step * 6))) ch0 = mul * ((ppm - (step * 5))); |
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240 | { |
253 | if ((ppm >= (step * 6)) && (ppm < (step * 7))) ch2 = mul * ((step - 1) - (ppm - (step * 6))); |
- | 254 | ||
Line 241... | Line 255... | ||
241 | 255 | //printf("%d ",ppm); |
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242 | //printf("%d ",ppm_signal); |
256 | */ |
243 | 257 | ||
244 | for (i=0; i<=255; i++) |
258 | for (i=0; i<=255; i++) |
Line 295... | Line 309... | ||
295 | } |
309 | } |
Line 296... | Line 310... | ||
296 | 310 | ||
Line 297... | Line -... | ||
297 | - | ||
298 | } |
- | |
299 | - | ||
300 | - | ||
301 | - | ||
302 | /* |
- | |
303 | 170 00fa 1F92 push __zero_reg__ |
- | |
304 | 171 00fc 0F92 push __tmp_reg__ |
- | |
305 | 172 00fe 0FB6 in __tmp_reg__,__SREG__ |
- | |
306 | 173 0100 0F92 push __tmp_reg__ |
- | |
307 | 174 0102 1124 clr __zero_reg__ |
- | |
308 | 175 0104 2F93 push r18 |
- | |
309 | 176 0106 3F93 push r19 |
- | |
310 | 177 0108 8F93 push r24 |
- | |
311 | 178 010a 9F93 push r25 |
- | |
312 | 181 010c 38B3 in r19,56-0x20 |
- | |
313 | 184 010e 22B3 in r18,50-0x20 |
- | |
314 | 187 0110 8091 0000 lds r24,counter.1797 |
- | |
315 | 188 0114 8F5F subi r24,lo8(-(1)) |
- | |
316 | 189 0116 8093 0000 sts counter.1797,r24 |
- | |
317 | 190 011a 8F3F cpi r24,lo8(-1) |
- | |
318 | 191 011c 01F4 brne .L15 |
- | |
319 | 193 011e 3E60 ori r19,lo8(14) |
- | |
320 | 195 0120 2863 ori r18,lo8(56) |
- | |
321 | 197 0122 8091 0000 lds r24,ch0 |
- | |
322 | 198 0126 8093 0000 sts ch0_tmp,r24 |
- | |
323 | 200 012a 8091 0000 lds r24,ch1 |
- | |
324 | 201 012e 8093 0000 sts ch1_tmp,r24 |
- | |
325 | 203 0132 8091 0000 lds r24,ch2 |
- | |
326 | 204 0136 8093 0000 sts ch2_tmp,r24 |
- | |
327 | 206 013a 8091 0000 lds r24,ch3 |
- | |
328 | 207 013e 8093 0000 sts ch3_tmp,r24 |
- | |
329 | 209 0142 8091 0000 lds r24,ch4 |
- | |
330 | 210 0146 8093 0000 sts ch4_tmp,r24 |
- | |
331 | 212 014a 8091 0000 lds r24,ch5 |
- | |
332 | 213 014e 8093 0000 sts ch5_tmp,r24 |
- | |
333 | 215 0152 1092 0000 sts counter.1797,__zero_reg__ |
- | |
334 | 218 0156 8091 0000 lds r24,ch0_tmp |
- | |
335 | 219 015a 9091 0000 lds r25,counter.1797 |
- | |
336 | 220 015e 8917 cp r24,r25 |
- | |
337 | 221 0160 01F4 brne .L17 |
- | |
338 | 222 0162 377F andi r19,lo8(-9) |
- | |
339 | 225 0164 8091 0000 lds r24,ch1_tmp |
- | |
340 | 226 0168 8917 cp r24,r25 |
- | |
341 | 227 016a 01F4 brne .L19 |
- | |
342 | 228 016c 3B7F andi r19,lo8(-5) |
- | |
343 | 231 016e 8091 0000 lds r24,ch2_tmp |
- | |
344 | 232 0172 8917 cp r24,r25 |
- | |
345 | 233 0174 01F4 brne .L21 |
- | |
346 | 234 0176 3D7F andi r19,lo8(-3) |
- | |
347 | 237 0178 8091 0000 lds r24,ch3_tmp |
- | |
348 | 238 017c 8917 cp r24,r25 |
- | |
349 | 239 017e 01F4 brne .L23 |
- | |
350 | 240 0180 277F andi r18,lo8(-9) |
- | |
351 | 243 0182 8091 0000 lds r24,ch4_tmp |
- | |
352 | 244 0186 8917 cp r24,r25 |
- | |
353 | 245 0188 01F4 brne .L25 |
- | |
354 | 246 018a 2F7E andi r18,lo8(-17) |
- | |
355 | 249 018c 8091 0000 lds r24,ch5_tmp |
- | |
356 | 250 0190 8917 cp r24,r25 |
- | |
357 | 251 0192 01F4 brne .L27 |
- | |
358 | 252 0194 2F7D andi r18,lo8(-33) |
- | |
359 | 255 0196 38BB out 56-0x20,r19 |
- | |
360 | 257 0198 22BB out 50-0x20,r18 |
- | |
361 | 259 019a 8091 0000 lds r24,ms1.1798 |
- | |
362 | 260 019e 8F5F subi r24,lo8(-(1)) |
- | |
363 | 261 01a0 8093 0000 sts ms1.1798,r24 |
- | |
364 | 262 01a4 8132 cpi r24,lo8(33) |
- | |
365 | 263 01a6 01F4 brne .L31 |
- | |
366 | 265 01a8 1092 0000 sts ms1.1798,__zero_reg__ |
- | |
367 | 267 01ac 8091 0000 lds r24,TMR1MS |
- | |
368 | 268 01b0 9091 0000 lds r25,(TMR1MS)+1 |
- | |
369 | 269 01b4 0196 adiw r24,1 |
- | |
370 | 270 01b6 9093 0000 sts (TMR1MS)+1,r25 |
- | |
371 | 271 01ba 8093 0000 sts TMR1MS,r24 |
- | |
372 | 274 01be 9F91 pop r25 |
- | |
373 | 275 01c0 8F91 pop r24 |
- | |
374 | 276 01c2 3F91 pop r19 |
- | |
375 | 277 01c4 2F91 pop r18 |
- | |
376 | 278 01c6 0F90 pop __tmp_reg__ |
- | |
377 | 279 01c8 0FBE out __SREG__,__tmp_reg__ |
- | |
378 | 280 01ca 0F90 pop __tmp_reg__ |
- |