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Line 38... Line 38...
38
 * - verifiy correctness of values
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 * - verifiy correctness of values
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 * - clean up code :)
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 * - clean up code :)
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 */
40
 */
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#if !(ALLCHARSDEBUG|(WRITECHARS != -1))
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#if !(ALLCHARSDEBUG|(WRITECHARS != -1))
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// data structs not needed for character flashin
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// data structs not needed for character flashing
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#include "mk-data-structs.h"
44
#include "mk-data-structs.h"
45
 
45
 
46
/* ##########################################################################
46
/* ##########################################################################
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volatile uint8_t last_RC_Quality = 255;
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volatile uint8_t last_RC_Quality = 255;
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59
 
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// 16bit should be enough, normal LiPos don't last that long
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// 16bit should be enough, normal LiPos don't last that long
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volatile uint16_t uptime = 0;
61
volatile uint16_t uptime = 0;
62
volatile uint16_t timer = 0;
-
 
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volatile uint8_t short_timer = 0;
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volatile uint16_t timer = 0;
64
 
63
 
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// remember last time data was received
64
// remember last time data was received
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 * STROM TEST
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 * STROM TEST
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 * ##########################################################################*/
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 * ##########################################################################*/
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#define INT0_HIGH                       PORTD |=  (1 << PD2);
135
#define INT0_HIGH                       PORTD |=  (1 << PD2);
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#define INT0_LOW                        PORTD &= ~(1 << PD2);
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#define INT0_LOW                        PORTD &= ~(1 << PD2);
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137
 
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void SpiMasterInit(void)
-
 
140
{
138
void SpiMasterInit(void) {
141
        volatile char IOReg;
139
    volatile char IOReg;
142
        // set PB4(/SS), PB5(MOSI), PB7(SCK) as output
140
    // set PB4(/SS), PB5(MOSI), PB7(SCK) as output
143
        DDRB  = (1<<PB4)|(1<<PB5)|(1<<PB7);
141
    DDRB = (1 << PB4) | (1 << PB5) | (1 << PB7);
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                PORTB |= (1 << PB4); // pullup SS
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    PORTB |= (1 << PB4); // pullup SS
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        //sei(); // we do it later
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    //sei(); // we do it later
150
}
148
}
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149
 
152
volatile size_t icnt = 0;
150
volatile size_t icnt = 0;
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volatile unsigned char * iptr;
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volatile unsigned char * iptr;
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volatile unsigned char spi_cmd[5];       
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volatile unsigned char spi_cmd_buffer[5];
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volatile uint8_t spi_ready = 1;
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volatile uint8_t spi_ready = 1;
Line -... Line 154...
-
 
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int16_t ampere = 0;
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int16_t ampere = 0;
155
 
157
 
156
/**
158
ISR(SPI_STC_vect)
-
 
159
{
157
 * SPI interrupt handler
160
    /* Empfangenes Byte im Puffer ablegen. */
158
 */
161
    *iptr++ = SPDR;
159
ISR(SPI_STC_vect) {
162
    /* Zähler dekrementieren. */
-
 
163
    icnt--;
160
    *iptr++ = SPDR; // safe received byte to buffer
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    /* Falls Zähler noch nicht 0 ist... */
-
 
165
    if (icnt) {
161
    icnt--; // dec length
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                ///_delay_ms(1);
162
    if (icnt) {
167
        /* ...nächstes Byte senden. */
-
 
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        //SPDR = *iptr;
-
 
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                spi_ready = 1;
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        //SPDR = *iptr; // send next byte
170
    }
164
        spi_ready = 1; // we _should_ send later because the slave needs more time
171
    else {
165
    } else {
172
        /* ...andernfalls Interrupt Modus deaktivieren. */
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        SPCR &= ~_BV(SPIE);
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                INT0_HIGH
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        SPCR &= ~_BV(SPIE); // deactivate interrupt
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                //_delay_ms(1);
167
        INT0_HIGH // transfer is done, slave does not need to listen
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-
 
168
    }
176
    }
169
}
177
}
170
 
-
 
171
/**
178
 
172
 * check if SPI transfer is still busy
179
int TransferIsBusy(void)
173
 */
Line -... Line 174...
-
 
174
int TransferIsBusy(void) {
-
 
175
    return SPCR & _BV(SPIE);
-
 
176
}
180
{
177
 
-
 
178
/**
181
    return SPCR & _BV(SPIE);
179
 * start a new transfer of <data> with length <len>
182
}
-
 
183
 
180
 */
184
void StartTransfer(unsigned char *data, size_t len)
181
void StartTransfer(unsigned char *data, size_t len) {
185
{
182
    INT0_LOW // /SS LOW ^= SS HIGH ^= slave should listen
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186
        INT0_LOW
-
 
187
    /* Interrupt Datenpointer und Zähler setzen. */
183
 
188
    iptr = data;
184
    // set up pointer and length for interrupt handler
189
    icnt = len;
185
    iptr = data;
Line 190... Line 186...
190
 
186
    icnt = len;
191
    /* SPI Interrupt aktivieren und Transfer anstossen. */
187
 
192
    SPCR |= _BV(SPIE);
188
    SPCR |= _BV(SPIE); // enable spi interrupt
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193
    SPDR = *iptr;
-
 
194
}
189
    SPDR = *iptr; // start transfer by first bye
195
 
190
}
196
 
191
 
197
/* ##########################################################################
192
 
198
 * / STROM TEST END
193
/* ##########################################################################
199
 * ##########################################################################*/
194
 * / STROM TEST END
200
 
195
 * ##########################################################################*/
201
 
196
 
202
/**
197
/**
203
 * timer kicks in every 1000uS ^= 1ms
198
 * timer kicks in every 1000uS ^= 1ms
204
 */
199
 */
205
ISR(TIMER0_OVF_vect) {
200
ISR(TIMER0_OVF_vect) {
206
    OCR0 = 15; // preload
201
    OCR0 = 15; // preload
207
    if (!timer--) {
202
    if (!timer--) {
208
        uptime++;
203
        uptime++;
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387
    uint8_t cellnum = 0;
382
    uint8_t cellnum = 0;
388
    if (CELL_NUM == -1) {
383
    if (CELL_NUM == -1) {
389
        write_ascii_string(2, 6, "Guessing Number of Cells");
384
        write_ascii_string(2, 6, "Guessing Number of Cells");
390
        do {
385
        do {
391
            cellnum++;
386
            cellnum++;
392
        } while (UBat > ((cellnum * CELL_VOLT_MAX) + 15));
387
        } while (UBat > ((cellnum * CELL_VOLT_MAX) + 23));
393
    } else {
388
    } else {
394
        cellnum = CELL_NUM;
389
        cellnum = CELL_NUM;
395
    }
390
    }
396
    min_voltage = cellnum * CELL_VOLT_MIN;
391
    min_voltage = cellnum * CELL_VOLT_MIN;
397
    max_voltage = cellnum * CELL_VOLT_MAX;
392
    max_voltage = cellnum * CELL_VOLT_MAX;
Line 550... Line 545...
550
#endif
545
#endif
Line 551... Line 546...
551
 
546
 
-
 
547
 
552
 
548
 
553
 
549
    while (1) {
554
    while (1) {
550
        // in case SPI is ready and there is nothing to send right now
555
                if (!icnt && spi_ready) {
551
        if (!icnt && spi_ready) {
556
                        short_timer = 0;
552
            // correct transfer ends with d (done)
557
                        ampere = spi_cmd[1] << 8;
-
 
558
                        ampere |= spi_cmd[2];
553
            if (spi_cmd_buffer[0] == 'd') {
559
                        //write_ascii_char(7+4*30, spi_cmd[0]);
554
                ampere = spi_cmd_buffer[1] << 8;
560
                       
555
                ampere |= spi_cmd_buffer[2];
561
                        if (spi_cmd[0] == 'd') {
556
                // update flags
-
 
557
                COSD_FLAGS2 |= COSD_FLAG_STROMREC;
562
                                COSD_FLAGS2 |= COSD_FLAG_STROMREC;
558
                //write_ascii_char(8+4*30, 'v'); // valid
563
                                //write_ascii_char(8+4*30, 'v'); // valid
559
            } else {
564
                        } else {
560
                // update flags
565
                                COSD_FLAGS2 &= ~COSD_FLAG_STROMREC;
561
                COSD_FLAGS2 &= ~COSD_FLAG_STROMREC;
566
                                //write_ascii_char(8+4*30, 'i'); // invalid
562
                //write_ascii_char(8+4*30, 'i'); // invalid
567
                        }
563
            }
568
                        spi_cmd[0] = 'A';
564
            spi_cmd_buffer[0] = 'A';
569
                        spi_cmd[1] = 'B';
565
            spi_cmd_buffer[1] = 'B';
570
                        spi_cmd[2] = 'C';
566
            spi_cmd_buffer[2] = 'C';
571
                        StartTransfer((unsigned char*)spi_cmd, 3);
567
            StartTransfer((unsigned char*) spi_cmd_buffer, 3);
572
                }
568
        }
573
        if (rxd_buffer_locked) {
569
        if (rxd_buffer_locked) {