Rev 183 | Rev 190 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 183 | Rev 189 | ||
---|---|---|---|
Line 72... | Line 72... | ||
72 | #define SPI_RXSYNCBYTE1 0xAA |
72 | #define SPI_RXSYNCBYTE1 0xAA |
73 | #define SPI_RXSYNCBYTE2 0x83 |
73 | #define SPI_RXSYNCBYTE2 0x83 |
74 | #define SPI_TXSYNCBYTE1 0x81 |
74 | #define SPI_TXSYNCBYTE1 0x81 |
75 | #define SPI_TXSYNCBYTE2 0x55 |
75 | #define SPI_TXSYNCBYTE2 0x55 |
Line 76... | Line -... | ||
76 | - | ||
77 | typedef enum |
- | |
78 | { |
- | |
79 | SPI_SYNC1, |
- | |
80 | SPI_SYNC2, |
- | |
81 | SPI_DATA |
- | |
82 | } SPI_State_t; |
- | |
83 | 76 | ||
84 | //communication packets |
77 | //communication packets |
85 | volatile FromFlightCtrl_t FromFlightCtrl; |
78 | volatile FromFlightCtrl_t FromFlightCtrl; |
86 | volatile ToFlightCtrl_t ToFlightCtrl; |
79 | volatile ToFlightCtrl_t ToFlightCtrl; |
87 | #define SPI0_TIMEOUT 500 // 500ms |
80 | #define SPI0_TIMEOUT 500 // 500ms |
Line 118... | Line 111... | ||
118 | //-------------------------------------------------------------- |
111 | //-------------------------------------------------------------- |
119 | void SSP0_IRQHandler(void) |
112 | void SSP0_IRQHandler(void) |
120 | { |
113 | { |
121 | static u8 rxchksum = 0; |
114 | static u8 rxchksum = 0; |
122 | u8 rxdata; |
115 | u8 rxdata; |
- | 116 | ||
- | 117 | #define SPI_SYNC1 0 |
|
- | 118 | #define SPI_SYNC2 1 |
|
- | 119 | #define SPI_DATA 2 |
|
123 | static SPI_State_t SPI_State = SPI_SYNC1; |
120 | static u8 SPI_State = SPI_SYNC1; |
Line 124... | Line 121... | ||
124 | 121 | ||
125 | // clear pending bits |
122 | // clear pending bits |
126 | SSP_ClearITPendingBit(SSP0, SSP_IT_RxTimeOut); |
123 | SSP_ClearITPendingBit(SSP0, SSP_IT_RxTimeOut); |
127 | SSP_ClearITPendingBit(SSP0, SSP_IT_RxFifo); |
- | |
128 | /* |
- | |
129 | // Fill TxFIFO while its not full or end of packet is reached |
- | |
130 | while (SSP_GetFlagStatus(SSP0, SSP_FLAG_TxFifoNotFull) == SET) |
124 | SSP_ClearITPendingBit(SSP0, SSP_IT_RxFifo); |
131 | { |
- | |
132 | if (SPI_TxBufferIndex < SPI_TXBUFFER_LEN) // still data to send ? |
- | |
133 | { |
- | |
134 | SSP0->DR = SPI_TxBuffer[SPI_TxBufferIndex]; // send a byte |
- | |
135 | *Ptr_TxChksum += SPI_TxBuffer[SPI_TxBufferIndex]; // update checksum |
- | |
136 | SPI_TxBufferIndex++; // pointer to next byte |
- | |
137 | } |
- | |
138 | else // TxBuffer end is reached then reset and copy data to tx buffer |
- | |
139 | { |
- | |
140 | SPI_TxBufferIndex = 0; // reset buffer index |
- | |
141 | ToFlightCtrl.Chksum = 0; // initialize checksum |
- | |
142 | ToFlightCtrl.BeepTime = BeepTime; // set beeptime |
- | |
143 | BeepTime = 0; // reset local beeptime |
- | |
144 | // copy contents of ToFlightCtrl->SPI_TxBuffer |
- | |
145 | memcpy( (u8 *) &(SPI_TxBuffer[2]), (u8 *) &ToFlightCtrl, sizeof(ToFlightCtrl)); |
- | |
146 | } |
- | |
147 | } |
- | |
148 | */ |
125 | |
149 | // while RxFIFO not empty |
126 | // while RxFIFO not empty |
150 | while (SSP_GetFlagStatus(SSP0, SSP_FLAG_RxFifoNotEmpty) == SET) |
127 | while (SSP_GetFlagStatus(SSP0, SSP_FLAG_RxFifoNotEmpty) == SET) |
151 | { |
128 | { |
152 | rxdata = SSP0->DR; // catch the received byte |
129 | rxdata = SSP0->DR; // catch the received byte |
Line 262... | Line 239... | ||
262 | SSP_InitStructure.SSP_CPHA = SSP_CPHA_1Edge; |
239 | SSP_InitStructure.SSP_CPHA = SSP_CPHA_1Edge; |
263 | SSP_InitStructure.SSP_CPOL = SSP_CPOL_Low; |
240 | SSP_InitStructure.SSP_CPOL = SSP_CPOL_Low; |
264 | SSP_InitStructure.SSP_ClockRate = 0; |
241 | SSP_InitStructure.SSP_ClockRate = 0; |
Line 265... | Line 242... | ||
265 | 242 | ||
266 | SSP_Init(SSP0, &SSP_InitStructure); |
- | |
267 | - | ||
268 | //SSP_ITConfig(SSP0, SSP_IT_RxFifo | SSP_IT_TxFifo | SSP_IT_RxTimeOut, ENABLE); |
243 | SSP_Init(SSP0, &SSP_InitStructure); |
269 | SSP_ITConfig(SSP0, SSP_IT_RxFifo | SSP_IT_RxTimeOut, ENABLE); |
- | |
270 | 244 | SSP_ITConfig(SSP0, SSP_IT_RxFifo | SSP_IT_RxTimeOut, ENABLE); |
|
271 | 245 | ||
Line 272... | Line 246... | ||
272 | fifo_init(&CompassCalcStateFiFo, CompassCalStateQueue, sizeof(CompassCalStateQueue)); |
246 | fifo_init(&CompassCalcStateFiFo, CompassCalStateQueue, sizeof(CompassCalStateQueue)); |
273 | 247 | ||
274 | SSP_Cmd(SSP0, ENABLE); |
248 | SSP_Cmd(SSP0, ENABLE); |
Line 294... | Line 268... | ||
294 | 268 | ||
295 | if (SPI_RxBuffer_Request) |
269 | if (SPI_RxBuffer_Request) |
296 | { |
270 | { |
297 | // avoid sending data via SPI during the update of the ToFlightCtrl structure |
271 | // avoid sending data via SPI during the update of the ToFlightCtrl structure |
298 | VIC_ITCmd(SSP0_ITLine, DISABLE); // disable SPI interrupt |
- | |
299 | 272 | VIC_ITCmd(SSP0_ITLine, DISABLE); // disable SPI interrupt |
|
- | 273 | ToFlightCtrl.CompassHeading = I2C_Heading.Heading; |
|
300 | ToFlightCtrl.CompassHeading = I2C_Heading.Heading; |
274 | DebugOut.Analog[10] = ToFlightCtrl.CompassHeading; |
301 | ToFlightCtrl.GPS_Nick = GPS_Stick.Nick; |
275 | ToFlightCtrl.GPS_Nick = GPS_Stick.Nick; |
302 | ToFlightCtrl.GPS_Roll = GPS_Stick.Roll; |
276 | ToFlightCtrl.GPS_Roll = GPS_Stick.Roll; |
303 | ToFlightCtrl.GPS_Yaw = GPS_Stick.Yaw; |
277 | ToFlightCtrl.GPS_Yaw = GPS_Stick.Yaw; |
304 | // cycle spi commands |
278 | // cycle spi commands |