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| Rev 1941 | Rev 1942 | ||
|---|---|---|---|
| Line 73... | Line 73... | ||
| 73 | struct str_Data3D Data3D; |
73 | struct str_Data3D Data3D; |
| Line 74... | Line 74... | ||
| 74 | 74 | ||
| 75 | int Display_Timer, Debug_Timer,Kompass_Timer,Timer3D; |
75 | int Display_Timer, Debug_Timer,Kompass_Timer,Timer3D; |
| 76 | unsigned int DebugDataIntervall = 0, Intervall3D = 0, Display_Interval = 0; |
76 | unsigned int DebugDataIntervall = 0, Intervall3D = 0, Display_Interval = 0; |
| 77 | unsigned int AboTimeOut = 0; |
77 | unsigned int AboTimeOut = 0; |
| Line 78... | Line 78... | ||
| 78 | unsigned volatile char JetiUpdateModeActive = 0; |
78 | unsigned volatile char ReceiverUpdateModeActive = 0; // 1 = Update 2 = JetiBox-Simulation |
| 79 | 79 | ||
| 80 | const unsigned char ANALOG_TEXT[32][16] PROGMEM = |
80 | const unsigned char ANALOG_TEXT[32][16] PROGMEM = |
| 81 | { |
81 | { |
| Line 145... | Line 145... | ||
| 145 | static unsigned int crc; |
145 | static unsigned int crc; |
| 146 | static unsigned char crc1,crc2,buf_ptr; |
146 | static unsigned char crc1,crc2,buf_ptr; |
| 147 | static unsigned char UartState = 0; |
147 | static unsigned char UartState = 0; |
| 148 | unsigned char CrcOkay = 0; |
148 | unsigned char CrcOkay = 0; |
| Line 149... | Line 149... | ||
| 149 | 149 | ||
| 150 | if (JetiUpdateModeActive == 1) { UDR1 = UDR0; return; } |
150 | if (ReceiverUpdateModeActive == 1) { UDR1 = UDR0; return; } // 1 = Update |
| Line 151... | Line 151... | ||
| 151 | if (JetiUpdateModeActive == 2) { RxdBuffer[0] = UDR0; return; } |
151 | if (ReceiverUpdateModeActive == 2) { RxdBuffer[0] = UDR0; return; } // 2 = JetiBox-Simulation |
| Line 152... | Line 152... | ||
| 152 | 152 | ||
| 153 | SioTmp = UDR0; |
153 | SioTmp = UDR0; |
| Line 465... | Line 465... | ||
| 465 | while(!UebertragungAbgeschlossen); // wait for previous frame to be sent |
465 | while(!UebertragungAbgeschlossen); // wait for previous frame to be sent |
| 466 | SendOutData('W', FC_ADDRESS,2, &tempchar1, sizeof(tempchar1), &tempchar2, sizeof(tempchar2)); |
466 | SendOutData('W', FC_ADDRESS,2, &tempchar1, sizeof(tempchar1), &tempchar2, sizeof(tempchar2)); |
| 467 | } |
467 | } |
| 468 | break; |
468 | break; |
| 469 | case 'j': |
469 | case 'j': |
| - | 470 | if(MotorenEin) break; |
|
| 470 | tempchar1 = LIBFC_GetCPUType(); |
471 | tempchar1 = LIBFC_GetCPUType(); |
| 471 | if((tempchar1 == CPU_ATMEGA644P) || (tempchar1 == CPU_ATMEGA1284P)) |
472 | if((tempchar1 == CPU_ATMEGA644P) || (tempchar1 == CPU_ATMEGA1284P)) |
| 472 | { |
473 | { |
| 473 | uint16_t ubrr = (uint16_t) ((uint32_t) F_CPU/ (8 * 38400L) - 1); |
474 | uint16_t ubrr = (uint16_t) ((uint32_t) F_CPU/ (8 * 38400L) - 1); |
| Line 485... | Line 486... | ||
| 485 | // UART0 & UART1 flush receive buffer explicit |
486 | // UART0 & UART1 flush receive buffer explicit |
| 486 | while ( UCSR1A & (1<<RXC1) ) UDR1; |
487 | while ( UCSR1A & (1<<RXC1) ) UDR1; |
| 487 | while ( UCSR0A & (1<<RXC0) ) UDR0; |
488 | while ( UCSR0A & (1<<RXC0) ) UDR0; |
| Line 488... | Line 489... | ||
| 488 | 489 | ||
| 489 | 490 | ||
| - | 491 | if(pRxData[0] == 1) ReceiverUpdateModeActive = 2; |
|
| - | 492 | else |
|
| - | 493 | { // Jeti or HoTT update |
|
| - | 494 | //#if (defined(__AVR_ATmega1284__) || defined(__AVR_ATmega1284P__)) |
|
| 490 | if (pRxData[0] == 0) |
495 | if(pRxData[0] == 100) ubrr = (uint16_t) ((uint32_t) F_CPU/ (8 * 19200L) - 1); // HoTT |
| 491 | { |
- | |
| 492 | JetiUpdateModeActive = 1; |
496 | //#endif |
| 493 | 497 | ReceiverUpdateModeActive = 1; |
|
| 494 | // UART0 & UART1 set baudrate |
498 | // UART0 & UART1 set baudrate |
| 495 | UBRR1H = (uint8_t)(ubrr>>8); |
499 | UBRR1H = (uint8_t)(ubrr>>8); |
| 496 | UBRR1L = (uint8_t)ubrr; |
500 | UBRR1L = (uint8_t)ubrr; |
| Line 502... | Line 506... | ||
| 502 | // UART1 8-bit |
506 | // UART1 8-bit |
| 503 | UCSR1B &= ~(1 << UCSZ12); |
507 | UCSR1B &= ~(1 << UCSZ12); |
| 504 | UCSR1C |= (1 << UCSZ11); |
508 | UCSR1C |= (1 << UCSZ11); |
| 505 | UCSR1C |= (1 << UCSZ10); |
509 | UCSR1C |= (1 << UCSZ10); |
| 506 | } |
510 | } |
| 507 | else JetiUpdateModeActive = 2; |
- | |
| 508 | - | ||
| 509 | // UART0 & UART1 1 stop bit |
511 | // UART0 & UART1 1 stop bit |
| 510 | UCSR1C &= ~(1 << USBS1); |
512 | UCSR1C &= ~(1 << USBS1); |
| 511 | UCSR0C &= ~(1 << USBS0); |
513 | UCSR0C &= ~(1 << USBS0); |
| 512 | // UART1 clear 9th bit |
514 | // UART1 clear 9th bit |
| 513 | UCSR1B &= ~(1<<TXB81); |
515 | UCSR1B &= ~(1<<TXB81); |