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| 1 | /******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** |
1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
| 2 | * File Name : 91x_emi.c |
2 | * File Name : 91x_emi.c |
| 3 | * Author : MCD Application Team |
3 | * Author : MCD Application Team |
| - | 4 | * Version : V2.1 |
|
| 4 | * Date First Issued : 05/18/2006 : Version 1.0 |
5 | * Date : 12/22/2008 |
| 5 | * Description : This file provides all the EMI software functions. |
6 | * Description : This file provides all the EMI firmware functions. |
| 6 | ******************************************************************************** |
- | |
| 7 | * History: |
- | |
| 8 | * 05/22/2007 : Version 1.2 |
- | |
| 9 | * 05/24/2006 : Version 1.1 |
- | |
| 10 | * 05/18/2006 : Version 1.0 |
- | |
| 11 | ******************************************************************************** |
7 | ******************************************************************************** |
| 12 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
8 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
| 14 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
| 15 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
| Line 23... | Line 19... | ||
| 23 | /* Private typedef -----------------------------------------------------------*/ |
19 | /* Private typedef -----------------------------------------------------------*/ |
| 24 | /* Private define ------------------------------------------------------------*/ |
20 | /* Private define ------------------------------------------------------------*/ |
| Line 25... | Line 21... | ||
| 25 | 21 | ||
| Line -... | Line 22... | ||
| - | 22 | /* These constant variables are used as masks to handle the EMI registers. */ |
|
| 26 | /* These constant variables are used as masks to handle the EMI registers. */ |
23 | |
| 27 | 24 | ||
| 28 | #define EMI_PageModeRead_TL_Mask 0xFFFFF3FF |
25 | #define EMI_Burst_and_PageModeRead_TL_Mask 0xFFFFF3FF |
| 29 | #define EMI_PageModeRead_Sel_Mask 0xFFFFFEFF |
26 | #define EMI_Burst_and_PageModeRead_Sel_Mask 0xFFFFFEFF |
| - | 27 | #define EMI_MemWidth_Mask 0xFFFFFFCF |
|
| - | 28 | #define EMI_WriteProtect_Mask 0xFFFFFFF7 |
|
| - | 29 | #define EMI_ByteLane_Mask 0xFFFFFFFE |
|
| - | 30 | #define EMI_AccessRead_Dev_Mask 0xFFFFFDFF |
|
| - | 31 | #define EMI_BurstModeWrite_Sel_Mask 0xFFFEFFFF |
|
| Line 30... | Line 32... | ||
| 30 | #define EMI_MemWidth_Mask 0xFFFFFFCF |
32 | #define EMI_AccessWrite_Dev_Mask 0xFFFDFFFF |
| 31 | #define EMI_WriteProtect_Mask 0xFFFFFEF7 |
33 | #define EMI_BurstModeWrite_TL_Mask 0xFFF3FFFF |
| 32 | 34 | ||
| Line 92... | Line 94... | ||
| 92 | 94 | ||
| 93 | /*Write enable assertion delay from chip select assertion*/ |
95 | /*Write enable assertion delay from chip select assertion*/ |
| Line 94... | Line 96... | ||
| 94 | /*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x00 "0 cycle"*/ |
96 | /*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x00 "0 cycle"*/ |
| 95 | 97 | ||
| - | 98 | EMI_InitStruct->EMI_Bank_WSTWEN =0x00; |
|
| - | 99 | ||
| - | 100 | /*Number of wait states for burst read accesses after the first read.*/ |
|
| - | 101 | /* They do not apply to non-burst devices.*/ |
|
| - | 102 | /*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
|
| Line 96... | Line 103... | ||
| 96 | EMI_InitStruct->EMI_Bank_WSTWEN =0x00; |
103 | |
| 97 | 104 | EMI_InitStruct->EMI_Bank_BRDCR =0x1F; |
|
| Line 98... | Line 105... | ||
| 98 | 105 | ||
| Line 106... | Line 113... | ||
| 106 | /*This member can be :"EMI_Bank_NonWriteProtect" = No write protection or "EMI_Bank_WriteProtect" = bank is write protected*/ |
113 | /*This member can be :"EMI_Bank_NonWriteProtect" = No write protection or "EMI_Bank_WriteProtect" = bank is write protected*/ |
| Line 107... | Line 114... | ||
| 107 | 114 | ||
| Line 108... | Line 115... | ||
| 108 | EMI_InitStruct-> EMI_Bank_WriteProtection= EMI_Bank_NonWriteProtect; |
115 | EMI_InitStruct-> EMI_Bank_WriteProtection= EMI_Bank_NonWriteProtect; |
| 109 | 116 | ||
| - | 117 | ||
| - | 118 | /* Burst Read or page mode transfer length */ |
|
| 110 | 119 | /*This member can be :"EMI_Read_4Data" or "EMI_Read_8Data" for page mode*/ |
|
| 111 | /* page transfer length for page mode read */ |
120 | /*Read and it can be "EMI_Read_4Data","EMI_Read_8Data","EMI_Read_16Data" */ |
| 112 | /*This member can be :"EMI_4Data" = 4 transfers burst or "EMI_8Data" = 8 transfers burst*/ |
121 | /*or "EMI_Read_Continuous"(synchronous only) for burst mode read*/ |
| 113 | 122 | ||
| 114 | EMI_InitStruct->EMI_PageModeRead_TransferLength= EMI_4Data; |
123 | EMI_InitStruct->EMI_Burst_and_PageModeRead_TransferLength= EMI_Read_4Data; |
| 115 | 124 | ||
| 116 | /*Select or deselect the page mode read*/ |
125 | /*Select or deselect the Burst and page mode read*/ |
| - | 126 | /*This member can be :"EMI_NormalMode" or "EMI_BurstModeRead" */ |
|
| - | 127 | ||
| - | 128 | EMI_InitStruct->EMI_Burst_and_PageModeRead_Selection = EMI_NormalMode; |
|
| - | 129 | ||
| - | 130 | ||
| - | 131 | /* Enables the byte select signals in 16-bit PSRAM bus mode*/ |
|
| - | 132 | /*(EMI_UBn and EMI_LBn) are enabled. Bit 2 in the GPIO EMI register */ |
|
| - | 133 | /*(SCU_EMI) must also be set to 1 */ |
|
| - | 134 | ||
| - | 135 | EMI_InitStruct->EMI_ByteLane_Selection=EMI_Byte_Select_disabled; |
|
| - | 136 | ||
| - | 137 | /*Access the device using synchronous accesses for reads*/ |
|
| - | 138 | ||
| - | 139 | EMI_InitStruct-> EMI_AccessRead_Support=EMI_Read_Asyn; |
|
| - | 140 | ||
| - | 141 | /*Access the device using synchronous accesses for Write*/ |
|
| - | 142 | ||
| - | 143 | EMI_InitStruct->EMI_AccessWrite_Support=EMI_Write_Asyn; |
|
| - | 144 | ||
| - | 145 | /* Burst Write transfer length */ |
|
| - | 146 | /*This member can be :"EMI_Write_4Data", "EMI_Write_8Data" or */ |
|
| - | 147 | /*"EMI_Write_Continuous" for synchronous only*/ |
|
| - | 148 | ||
| - | 149 | EMI_InitStruct->EMI_BurstModeWrite_TransferLength = EMI_Write_4Data; |
|
| - | 150 | ||
| 117 | /*This member can be :"EMI_NormalMode" =Normal Mode or "EMI_PageModeRead" = Page Mode Read*/ |
151 | /* Select burst or non-burst write to memory*/ |
| Line 118... | Line 152... | ||
| 118 | 152 | ||
| Line 119... | Line 153... | ||
| 119 | EMI_InitStruct->EMI_PageModeRead_Selection = EMI_NormalMode; |
153 | EMI_InitStruct-> EMI_BurstModeWrite_Selection=EMI_NonBurstModeWrite; |
| 120 | 154 | ||
| Line 145... | Line 179... | ||
| 145 | EMI_Bankx->WCR = EMI_InitStruct->EMI_Bank_WSTWR ; |
179 | EMI_Bankx->WCR = EMI_InitStruct->EMI_Bank_WSTWR ; |
| Line 146... | Line 180... | ||
| 146 | 180 | ||
| Line 147... | Line 181... | ||
| 147 | EMI_Bankx->OECR = EMI_InitStruct->EMI_Bank_WSTROEN; |
181 | EMI_Bankx->OECR = EMI_InitStruct->EMI_Bank_WSTROEN; |
| 148 | 182 | ||
| - | 183 | EMI_Bankx->WECR = EMI_InitStruct->EMI_Bank_WSTWEN ; |
|
| - | 184 | ||
| 149 | EMI_Bankx->WECR = EMI_InitStruct->EMI_Bank_WSTWEN ; |
185 | EMI_Bankx->BRDCR = EMI_InitStruct->EMI_Bank_BRDCR ; |
| 150 | 186 | ||
| Line 151... | Line 187... | ||
| 151 | EMI_Bankx->BCR &= EMI_MemWidth_Mask; |
187 | EMI_Bankx->BCR &= EMI_MemWidth_Mask; |
| 152 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_MemWidth; |
188 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_MemWidth; |
| Line -... | Line 189... | ||
| - | 189 | ||
| 153 | 190 | EMI_Bankx->BCR &= EMI_WriteProtect_Mask; |
|
| 154 | EMI_Bankx->BCR &= EMI_WriteProtect_Mask; |
191 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_WriteProtection; |
| 155 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_WriteProtection; |
192 | |
| 156 | 193 | ||
| 157 | EMI_Bankx->BCR &= EMI_PageModeRead_TL_Mask; |
194 | EMI_Bankx->BCR &= EMI_Burst_and_PageModeRead_TL_Mask; |
| - | 195 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Burst_and_PageModeRead_TransferLength; |
|
| - | 196 | ||
| - | 197 | EMI_Bankx->BCR &= EMI_Burst_and_PageModeRead_Sel_Mask; |
|
| - | 198 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Burst_and_PageModeRead_Selection; |
|
| - | 199 | ||
| - | 200 | EMI_Bankx->BCR &= EMI_BurstModeWrite_TL_Mask; |
|
| - | 201 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_BurstModeWrite_TransferLength; |
|
| - | 202 | ||
| - | 203 | EMI_Bankx->BCR &= EMI_BurstModeWrite_Sel_Mask; |
|
| - | 204 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_BurstModeWrite_Selection; |
|
| - | 205 | ||
| - | 206 | EMI_Bankx->BCR &= EMI_ByteLane_Mask; |
|
| - | 207 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_ByteLane_Selection; |
|
| - | 208 | ||
| - | 209 | EMI_Bankx->BCR &= EMI_AccessRead_Dev_Mask; |
|
| Line 158... | Line 210... | ||
| 158 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_PageModeRead_TransferLength; |
210 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_AccessRead_Support; |
| - | 211 | ||
| - | 212 | EMI_Bankx->BCR &= EMI_AccessWrite_Dev_Mask; |
|
| - | 213 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_AccessWrite_Support; |
|
| - | 214 | ||
| - | 215 | ||
| - | 216 | } |
|
| - | 217 | /******************************************************************************* |
|
| - | 218 | * Function Name : EMI_BCLKCmd |
|
| - | 219 | * Description : Enable or Disable the activation of BCLK clock (LFBGA only) |
|
| - | 220 | * Input : NewState : ENABLE or DISABLE |
|
| - | 221 | * Output : None |
|
| - | 222 | * Return : None |
|
| - | 223 | *******************************************************************************/ |
|
| - | 224 | void EMI_BCLKCmd(FunctionalState NewState) |
|
| Line 159... | Line 225... | ||
| 159 | 225 | { |
|