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| 1 | /******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** |
1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
| 2 | * File Name : 91x_scu.c |
2 | * File Name : 91x_scu.c |
| 3 | * Author : MCD Application Team |
3 | * Author : MCD Application Team |
| - | 4 | * Version : V2.1 |
|
| 4 | * Date First Issued : 05/18/2006 : Version 1.0 |
5 | * Date : 12/22/2008 |
| 5 | * Description : This file provides the SCU library software functions |
6 | * Description : This file provides the SCU library firmware functions |
| 6 | ******************************************************************************** |
- | |
| 7 | * History: |
- | |
| 8 | * 05/22/2007 : Version 1.2 |
- | |
| 9 | * 05/24/2006 : Version 1.1 |
- | |
| 10 | * 05/18/2006 : Version 1.0 |
- | |
| 11 | ******************************************************************************** |
7 | ******************************************************************************** |
| 12 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH |
8 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH |
| 13 | * CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS |
9 | * CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS |
| 14 | * A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT |
10 | * A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT |
| 15 | * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT |
11 | * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT |
| Line 93... | Line 89... | ||
| 93 | * *trying to enable the PLL while it is already enabled and |
89 | * *trying to enable the PLL while it is already enabled and |
| 94 | * locked |
90 | * locked |
| 95 | *******************************************************************************/ |
91 | *******************************************************************************/ |
| 96 | ErrorStatus SCU_PLLCmd(FunctionalState NewState) |
92 | ErrorStatus SCU_PLLCmd(FunctionalState NewState) |
| 97 | { |
93 | { |
| 98 | vu32 i; |
- | |
| 99 | if (NewState==ENABLE) |
94 | if (NewState==ENABLE) |
| 100 | { |
95 | { |
| 101 | if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK))) |
96 | if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK))) |
| 102 | { |
97 | { |
| 103 | SCU->SYSSTATUS|=SCU_FLAG_LOCK; /*clear LOCK bit*/ |
98 | SCU->SYSSTATUS|=SCU_FLAG_LOCK; /*clear LOCK bit*/ |
| 104 | SCU->PLLCONF |=SCU_PLLEN; /*PLL Enable*/ |
99 | SCU->PLLCONF |=SCU_PLLEN; /*PLL Enable*/ |
| 105 | while(!SCU->SYSSTATUS&SCU_FLAG_LOCK); /*Wait PLL to lock*/ |
100 | while(!(SCU->SYSSTATUS&SCU_FLAG_LOCK)); /*Wait PLL to lock*/ |
| 106 | return SUCCESS; |
101 | return SUCCESS; |
| 107 | } |
102 | } |
| 108 | else return ERROR; |
103 | else return ERROR; |
| 109 | } |
104 | } |
| 110 | else /*NewState = DISABLE*/ |
105 | else /*NewState = DISABLE*/ |
| 111 | { |
106 | { |
| 112 | if(SCU->CLKCNTR&0x3) /*check if PLL not sys CLK*/ |
107 | if(SCU->CLKCNTR&0x3) /*check if PLL not sys CLK*/ |
| 113 | { |
108 | { |
| 114 | for(i=10;i>0;i--); /*delay before PLL disabling*/ |
- | |
| 115 | SCU->PLLCONF &=~SCU_PLLEN; /*PLL Disable*/ |
109 | SCU->PLLCONF &=~SCU_PLLEN; /*PLL Disable*/ |
| 116 | return SUCCESS; |
110 | return SUCCESS; |
| 117 | } |
111 | } |
| 118 | else return ERROR; |
112 | else return ERROR; |
| 119 | } |
113 | } |
| Line 186... | Line 180... | ||
| 186 | * Return : None |
180 | * Return : None |
| 187 | *******************************************************************************/ |
181 | *******************************************************************************/ |
| 188 | void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState) |
182 | void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState) |
| 189 | { |
183 | { |
| 190 | if (NewState==ENABLE) /*Enable clock for AHB peripheral*/ |
184 | if (NewState==ENABLE) /*Enable clock for AHB peripheral*/ |
| 191 | SCU->PCGRO |=AHBPeriph; |
185 | SCU->PCGR0 |=AHBPeriph; |
| 192 | else |
186 | else |
| 193 | SCU->PCGRO &=~AHBPeriph; /*Disable clock for AHB peripheral*/ |
187 | SCU->PCGR0 &=~AHBPeriph; /*Disable clock for AHB peripheral*/ |
| 194 | } |
188 | } |
| Line 195... | Line 189... | ||
| 195 | 189 | ||
| 196 | /******************************************************************************* |
190 | /******************************************************************************* |
| 197 | * Function Name : SCU_APBPeriphReset |
191 | * Function Name : SCU_APBPeriphReset |
| Line 301... | Line 295... | ||
| 301 | if (BRCLK_Divisor==SCU_BRCLK_Div1) |
295 | if (BRCLK_Divisor==SCU_BRCLK_Div1) |
| 302 | SCU->CLKCNTR |= SCU_BRCLK_Div1; /*set bit BRSEL*/ |
296 | SCU->CLKCNTR |= SCU_BRCLK_Div1; /*set bit BRSEL*/ |
| 303 | } |
297 | } |
| Line 304... | Line 298... | ||
| 304 | 298 | ||
| 305 | /******************************************************************************* |
299 | /******************************************************************************* |
| 306 | * Function Name : SCU_TIMCLKSourceConfig |
300 | * Function Name : SCU_TIMExtCLKCmd |
| 307 | * Description : Sets the TIMx clock source |
301 | * Description : Enable or disable the TIMx external clock source |
| 308 | * Input : - TIMx : SCU_TIM01 or SCU_TIM23 |
302 | * Input : - TIMx : SCU_TIM01 or SCU_TIM23 |
| 309 | * - TIMCLK_Source = SCU_TIMCLK_EXT or SCU_TIMCLK_INT |
303 | * - NewState : ENABLE or DISABLE |
| 310 | * Output : None |
304 | * Output : Non |
| 311 | * Return : None |
305 | * Return : None |
| 312 | *******************************************************************************/ |
306 | *******************************************************************************/ |
| 313 | void SCU_TIMCLKSourceConfig(u8 TIMx, u32 TIMCLK_Source) |
307 | void SCU_TIMExtCLKCmd (u8 TIMx, FunctionalState NewState) |
| 314 | { |
308 | { |
| 315 | if (TIMx== SCU_TIM01) /*TIM01 clock source configuration*/ |
309 | if (TIMx== SCU_TIM01) /*TIM01 clock source configuration*/ |
| 316 | { |
310 | { |
| 317 | SCU->CLKCNTR &=0xFFFFDFFF; |
311 | SCU->CLKCNTR &=0xFFFFDFFF; |
| 318 | if (TIMCLK_Source == SCU_TIMCLK_EXT) |
312 | if (NewState==ENABLE) |
| 319 | SCU->CLKCNTR |=0x2000; |
313 | SCU->CLKCNTR |=0x2000; |
| 320 | } |
314 | } |
| 321 | else |
315 | else |
| 322 | { |
316 | { |
| 323 | SCU->CLKCNTR &=0xFFFFBFFF; /*TIM23 clock source configuration*/ |
317 | SCU->CLKCNTR &=0xFFFFBFFF; /*TIM23 clock source configuration*/ |
| 324 | if (TIMCLK_Source == SCU_TIMCLK_EXT) |
318 | if (NewState==ENABLE) |
| 325 | SCU->CLKCNTR |=0x4000; |
319 | SCU->CLKCNTR |=0x4000; |
| 326 | } |
320 | } |
| Line 327... | Line 321... | ||
| 327 | } |
321 | } |
| 328 | - | ||
| 329 | /******************************************************************************* |
- | |
| 330 | * Function Name : SCU_TIMPresConfig |
- | |
| 331 | * Description : Sets the TIMx Prescaler Value |
- | |
| 332 | * Input : - TIMx : SCU_TIM01 or SCU_TIM23 |
- | |
| 333 | * - Prescaler (16 bit value) |
- | |
| 334 | * Output : None |
- | |
| 335 | * Return : None |
- | |
| 336 | *******************************************************************************/ |
- | |
| 337 | void SCU_TIMPresConfig(u8 TIMx, u16 Prescaler) |
- | |
| 338 | { |
- | |
| 339 | if (TIMx==SCU_TIM01) /*TIM01 Prescaler configuration*/ |
- | |
| 340 | SCU->SCR1 = Prescaler&0xFFFF; |
- | |
| 341 | else |
- | |
| 342 | SCU->SCR2 = Prescaler&0xFFFF; /*TIM23 Prescaler configuration*/ |
- | |
| 343 | } |
- | |
| 344 | 322 | ||
| 345 | /******************************************************************************* |
323 | /******************************************************************************* |
| 346 | * Function Name : SCU_USBCLKConfig |
324 | * Function Name : SCU_USBCLKConfig |
| 347 | * Description : Configures the clock source for the 48MHz USBCLK |
325 | * Description : Configures the clock source for the 48MHz USBCLK |
| 348 | * Input : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT |
326 | * Input : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT |
| Line 657... | Line 635... | ||
| 657 | if (NewState==ENABLE) |
635 | if (NewState==ENABLE) |
| 658 | SCU->SCR0 |=0x1; |
636 | SCU->SCR0 |=0x1; |
| 659 | else SCU->SCR0 &=~0x1; |
637 | else SCU->SCR0 &=~0x1; |
| 660 | } |
638 | } |
| Line -... | Line 639... | ||
| - | 639 | ||
| - | 640 | ||
| - | 641 | /******************************************************************************* |
|
| - | 642 | * Function Name : SCU_EMIByte_Select_Pinconfig |
|
| - | 643 | * Description : Enable or Disable the Byte selection pins behaviour(LFBGA only) |
|
| - | 644 | * Input : NewState : ENABLE or DISABLE |
|
| - | 645 | * Output : None |
|
| - | 646 | * Return : None |
|
| - | 647 | *******************************************************************************/ |
|
| - | 648 | void SCU_EMIByte_Select_Pinconfig(FunctionalState NewState) |
|
| - | 649 | { |
|
| - | 650 | if (NewState==ENABLE) |
|
| - | 651 | SCU->GPIOEMI |= 0x04; |
|
| - | 652 | else |
|
| - | 653 | SCU->GPIOEMI &=~0x04; |
|
| - | 654 | ||
| - | 655 | } |
|
| - | 656 | ||
| - | 657 | /******************************************************************************* |
|
| - | 658 | * Function Name : SCU_EMIclock_Pinconfig |
|
| - | 659 | * Description : Enable or Disable the BCLK pin clock driving (LFBGA only) |
|
| - | 660 | * Input : NewState : ENABLE or DISABLE |
|
| - | 661 | * Output : None |
|
| - | 662 | * Return : None |
|
| - | 663 | *******************************************************************************/ |
|
| - | 664 | ||
| - | 665 | void SCU_EMIclock_Pinconfig(FunctionalState NewState) |
|
| - | 666 | { |
|
| - | 667 | if (NewState==DISABLE) |
|
| - | 668 | SCU->GPIOEMI |= 0x02; |
|
| - | 669 | else |
|
| - | 670 | SCU->GPIOEMI &=~0x02; |
|
| - | 671 | ||
| - | 672 | } |
|
| - | 673 | ||
| 661 | 674 | ||