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Rev 1180 | Rev 1187 | ||
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Line 17... | Line 17... | ||
17 | 17 | ||
18 | // for compatibility reasons gcc3.x <-> gcc4.x |
18 | // for compatibility reasons gcc3.x <-> gcc4.x |
19 | #ifndef SPCR |
19 | #ifndef SPCR |
20 | #define SPCR SPCR0 |
20 | #define SPCR SPCR0 |
- | 21 | #endif |
|
- | 22 | #ifndef SPIE |
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- | 23 | #define SPIE SPIE0 |
|
21 | #endif |
24 | #endif |
22 | #ifndef SPE |
25 | #ifndef SPE |
- | 26 | #define SPE SPE0 |
|
- | 27 | #endif |
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- | 28 | #ifdef DORD |
|
23 | #define SPE SPE0 |
29 | #define DORD DORD0 |
24 | #endif |
30 | #endif |
25 | #ifndef MSTR |
31 | #ifndef MSTR |
26 | #define MSTR MSTR0 |
32 | #define MSTR MSTR0 |
- | 33 | #endif |
|
- | 34 | #ifndef CPOL |
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- | 35 | #define CPOL CPOL0 |
|
- | 36 | #endif |
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- | 37 | #ifndef CPHA |
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- | 38 | #define CPHA CPHA0 |
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27 | #endif |
39 | #endif |
28 | #ifndef SPR1 |
40 | #ifndef SPR1 |
29 | #define SPR1 SPR01 |
41 | #define SPR1 SPR01 |
30 | #endif |
42 | #endif |
31 | #ifndef SPR0 |
43 | #ifndef SPR0 |
32 | #define SPR0 SPR00 |
44 | #define SPR0 SPR00 |
33 | #endif |
- | |
34 | #ifndef SPIE |
- | |
35 | #define SPIE SPIE0 |
45 | #endif |
36 | #endif |
46 | |
37 | #ifndef SPDR |
47 | #ifndef SPDR |
38 | #define SPDR SPDR0 |
48 | #define SPDR SPDR0 |
- | 49 | #endif |
|
- | 50 | ||
- | 51 | #ifndef SPSR |
|
- | 52 | #define SPSR SPSR0 |
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39 | #endif |
53 | #endif |
40 | #ifndef SPIF |
54 | #ifndef SPIF |
41 | #define SPIF SPIF0 |
55 | #define SPIF SPIF0 |
- | 56 | #endif |
|
- | 57 | #ifndef WCOL |
|
- | 58 | #define WCOL WCOL0 |
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42 | #endif |
59 | #endif |
43 | #ifndef SPSR |
60 | #ifndef SPI2X |
44 | #define SPSR SPSR0 |
61 | #define SPI2X SPI2X0 |
45 | #endif |
62 | #endif |
Line 46... | Line 63... | ||
46 | // ------------------------- |
63 | // ------------------------- |
47 | 64 |