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60 | #define MM3_PERIOD_512 0x40 |
60 | #define MM3_PERIOD_512 0x40 |
61 | #define MM3_PERIOD_1024 0x50 |
61 | #define MM3_PERIOD_1024 0x50 |
62 | #define MM3_PERIOD_2048 0x60 |
62 | #define MM3_PERIOD_2048 0x60 |
63 | #define MM3_PERIOD_4096 0x70 |
63 | #define MM3_PERIOD_4096 0x70 |
Line -... | Line 64... | ||
- | 64 | ||
- | 65 | #ifdef USE_WALTER_EXT // walthers board |
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- | 66 | // Output Pins (J9)PC6->MM3_SS ,(J8)PB2->MM3_RESET |
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- | 67 | #define MM3_SS_PORT PORTC //J9->MM3_SS |
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- | 68 | #define MM3_SS_DDR DDRC |
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- | 69 | #define MM3_SS_PIN PC6 |
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- | 70 | #define MM3_RESET_PORT PORTB //J8->MM3_RESET |
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- | 71 | #define MM3_RESET_DDR DDRB |
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- | 72 | #define MM3_RESET_PIN PB2 |
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- | 73 | #elseif USE_NICK666 // nick666 version 0.67g |
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- | 74 | #define MM3_SS_PORT PORTD //J5->MM3_SS |
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- | 75 | #define MM3_SS_DDR DDRD |
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- | 76 | #define MM3_SS_PIN PD3 |
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- | 77 | #define MM3_RESET_PORT PORTB //J8->MM3_RESET |
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- | 78 | #define MM3_RESET_DDR DDRB |
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- | 79 | #define MM3_RESET_PIN PB2 |
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- | 80 | #else // killagregs board |
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- | 81 | // Output Pins PC4->MM3_SS ,PC5->MM3_RESET |
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- | 82 | #define MM3_SS_PORT PORTC |
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- | 83 | #define MM3_SS_DDR DDRC |
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- | 84 | #define MM3_SS_PIN PC4 |
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- | 85 | #define MM3_RESET_PORT PORTC |
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- | 86 | #define MM3_RESET_DDR DDRC |
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- | 87 | #define MM3_RESET_PIN PC5 |
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- | 88 | #endif |
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- | 89 | ||
- | 90 | #define MM3_SS_ON MM3_SS_PORT &= ~(1<<MM3_SS_PIN); |
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- | 91 | #define MM3_SS_OFF MM3_SS_PORT |= (1<<MM3_SS_PIN); |
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- | 92 | #define MM3_RESET_ON MM3_RESET_PORT |= (1<<MM3_RESET_PIN); |
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- | 93 | #define MM3_RESET_OFF MM3_RESET_PORT &= ~(1<<MM3_RESET_PIN); |
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- | 94 | ||
- | 95 | ||
64 | 96 | ||
65 | MM3_calib_t MM3_calib; |
97 | MM3_calib_t MM3_calib; |
66 | volatile MM3_working_t MM3; |
98 | volatile MM3_working_t MM3; |
Line 81... | Line 113... | ||
81 | // set SCK (PB7), MOSI (PB5) as output |
113 | // set SCK (PB7), MOSI (PB5) as output |
82 | DDRB |= (1<<DDB7)|(1<<DDB5); |
114 | DDRB |= (1<<DDB7)|(1<<DDB5); |
83 | // set MISO (PB6) as input |
115 | // set MISO (PB6) as input |
84 | DDRB &= ~(1<<DDB6); |
116 | DDRB &= ~(1<<DDB6); |
Line 85... | Line -... | ||
85 | - | ||
- | 117 | ||
86 | #ifdef USE_WALTER_EXT // walthers board |
118 | |
87 | // Output Pins (J9)PC6->MM3_SS ,(J8)PB2->MM3_RESET |
- | |
88 | DDRB |= (1<<DDB2); |
119 | // Output Pins MM3_SS ,MM3_RESET |
89 | DDRC |= (1<<DDC6); |
- | |
90 | // set pins permanent to low |
- | |
91 | PORTB &= ~((1<<PORTB2)); |
- | |
92 | PORTC &= ~((1<<PORTC6)); |
- | |
93 | #else // killagregs board |
- | |
94 | // Output Pins PC4->MM3_SS ,PC5->MM3_RESET |
120 | MM3_SS_DDR |= (1<<MM3_SS_PIN); |
95 | DDRC |= (1<<DDC4)|(1<<DDC5); |
121 | MM3_RESET_DDR |= (1<<MM3_RESET_PIN); |
- | 122 | // set pins permanent to low |
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96 | // set pins permanent to low |
123 | MM3_SS_PORT &= ~((1<<MM3_SS_PIN)); |
97 | PORTC &= ~((1<<PORTC4)|(1<<PORTC5)); |
- | |
Line 98... | Line 124... | ||
98 | #endif |
124 | MM3_RESET_PORT &= ~((1<<MM3_RESET_PIN)); |
99 | 125 | ||
100 | // Initialize SPI-Interface |
126 | // Initialize SPI-Interface |
101 | // Enable interrupt (SPIE=1) |
127 | // Enable interrupt (SPIE=1) |
Line 132... | Line 158... | ||
132 | void MM3_Update(void) // called every 102.4 µs by timer 0 ISR |
158 | void MM3_Update(void) // called every 102.4 µs by timer 0 ISR |
133 | { |
159 | { |
134 | switch (MM3.STATE) |
160 | switch (MM3.STATE) |
135 | { |
161 | { |
136 | case MM3_STATE_RESET: |
162 | case MM3_STATE_RESET: |
137 | #ifdef USE_WALTER_EXT // walthers board |
- | |
138 | PORTC &= ~(1<<PORTC6); // select slave |
- | |
139 | PORTB |= (1<<PORTB2); // PB2 to High, MM3 Reset |
- | |
140 | #else |
- | |
141 | PORTC &= ~(1<<PORTC4); // select slave |
163 | MM3_SS_ON // select slave |
142 | PORTC |= (1<<PORTC5); // PC5 to High, MM3 Reset |
164 | MM3_RESET_ON // RESET to High, MM3 Reset |
143 | #endif |
- | |
144 | MM3.STATE = MM3_STATE_START_TRANSFER; |
165 | MM3.STATE = MM3_STATE_START_TRANSFER; |
145 | return; |
166 | return; |
Line 146... | Line 167... | ||
146 | 167 | ||
147 | case MM3_STATE_START_TRANSFER: |
- | |
148 | #ifdef USE_WALTER_EXT // walthers board |
- | |
149 | PORTB &= ~(1<<PORTB2); // PB2 auf Low (was 102.4 µs at high level) |
- | |
150 | #else |
168 | case MM3_STATE_START_TRANSFER: |
151 | PORTC &= ~(1<<PORTC5); // PC4 auf Low (was 102.4 µs at high level) |
- | |
152 | #endif |
169 | MM3_RESET_OFF // RESET auf Low (was 102.4 µs at high level) |
153 | // write to SPDR triggers automatically the transfer MOSI MISO |
170 | // write to SPDR triggers automatically the transfer MOSI MISO |
154 | // MM3 Period, + AXIS code |
171 | // MM3 Period, + AXIS code |
155 | switch(MM3.AXIS) |
172 | switch(MM3.AXIS) |
156 | { |
173 | { |
Line 228... | Line 245... | ||
228 | default: |
245 | default: |
229 | MM3.AXIS = MM3_X_AXIS; |
246 | MM3.AXIS = MM3_X_AXIS; |
230 | break; |
247 | break; |
231 | } |
248 | } |
232 | } |
249 | } |
233 | #ifdef USE_WALTER_EXT // walthers board |
- | |
234 | PORTC |= (1<<PORTC6); // deselect slave |
- | |
235 | #else |
- | |
236 | PORTC |= (1<<PORTC4); // deselect slave |
250 | MM3_SS_OFF // deselect slave |
237 | #endif |
- | |
238 | MM3.STATE = MM3_STATE_RESET; |
251 | MM3.STATE = MM3_STATE_RESET; |
239 | // Update timeout is called every 102.4 µs. |
252 | // Update timeout is called every 102.4 µs. |
240 | // It takes 2 cycles to write a measurement data request for one axis and |
253 | // It takes 2 cycles to write a measurement data request for one axis and |
241 | // at at least 8 ms / 102.4 µs = 79 cycles to read the requested data back. |
254 | // at at least 8 ms / 102.4 µs = 79 cycles to read the requested data back. |
242 | // I.e. 81 cycles * 102.4 µs = 8.3ms per axis. |
255 | // I.e. 81 cycles * 102.4 µs = 8.3ms per axis. |