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Line 34... Line 34...
34
        // disable RX-Interrupt
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        // disable RX-Interrupt
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        UCSR1B &= ~(1 << RXCIE1);
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        UCSR1B &= ~(1 << RXCIE1);
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        // disable TX-Interrupt
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        // disable TX-Interrupt
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        UCSR1B &= ~(1 << TXCIE1);
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        UCSR1B &= ~(1 << TXCIE1);
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        // disable DRE-Interrupt
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        // disable DRE-Interrupt
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        UCSR1B |= (1 << UDRIE1);
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        UCSR1B &= ~(1 << UDRIE1);
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-
 
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        // disable receiver and transmitter (will flush the buffers)
-
 
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        UCSR1B &= ~((1 << TXEN1) | (1 << RXEN1));
-
 
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40
 
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        // set direction of RXD1 and TXD1 pins
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        // set direction of RXD1 and TXD1 pins
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        // set RXD1 (PD2) as an input pin
-
 
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        DDRD &= ~(1 << DDD2);
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        // set RXD1 (PD2) as an input pin
-
 
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        PORTD |= (1 << PORTD2);
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        PORTD |= (1 << PORTD2);
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        DDRD &= ~(1 << DDD2);
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-
 
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        // set TXD1 (PD3) as an output pin
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-
 
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        // set TXD1 (PD3) as an output pin
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        DDRD  |= (1 << DDD3);
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        PORTD |= (1 << PORTD3);
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        PORTD |= (1 << PORTD3);
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        DDRD  |= (1 << DDD3);
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        // USART0 Baud Rate Register
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        // USART0 Baud Rate Register
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        // enable interrupts at the end
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        // enable interrupts at the end
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        // enable RX-Interrupt
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        // enable RX-Interrupt
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        UCSR1B |= (1 << RXCIE1);
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        UCSR1B |= (1 << RXCIE1);
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        // enable TX-Interrupt
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        // enable TX-Interrupt
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        //UCSR1B |= (1 << TXCIE1);
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        UCSR1B |= (1 << TXCIE1);
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        // enable DRE interrupt
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        // enable DRE interrupt
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        //UCSR1B |= (1 << UDRIE1);
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        //UCSR1B |= (1 << UDRIE1);
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        // restore global interrupt flags
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        // restore global interrupt flags
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    SREG = sreg;
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    SREG = sreg;
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    // inint FIFO buffer
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    // inint FIFO buffer
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        //fifo_init (&infifo,   inbuf, BUFSIZE_IN);
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        //fifo_init (&infifo,   inbuf, BUFSIZE_IN);
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    fifo_init (&outfifo, outbuf, BUFSIZE_OUT);
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    //fifo_init (&outfifo, outbuf, BUFSIZE_OUT);
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}
90
}
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91
 
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int16_t USART1_putc (const uint8_t c)
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/*int16_t USART1_putc (const uint8_t c)
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{
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{
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    int16_t ret = fifo_put (&outfifo, c);
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    int16_t ret = fifo_put (&outfifo, c);
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    // create an data register empty interrupt
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    // create an data register empty interrupt
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    UCSR1B |= (1 << UDRIE1);
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    UCSR1B |= (1 << UDRIE1);
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    return ret;
98
    return ret;
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*/
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*/
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112
 
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/****************************************************************/
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/****************************************************************/
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/*               USART1 data register empty ISR                 */
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/*               USART1 data register empty ISR                 */
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/****************************************************************/
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/****************************************************************/
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ISR(USART1_UDRE_vect)
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/*ISR(USART1_UDRE_vect)
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{
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{
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// Move a character from the output buffer to the data register.
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// Move a character from the output buffer to the data register.
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// When the character was processed the next interrupt is generated.
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// When the character was processed the next interrupt is generated.
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// If the output buffer is empty the DRE-interrupt is disabled.
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// If the output buffer is empty the DRE-interrupt is disabled.
124
    if (outfifo.count > 0)
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    if (outfifo.count > 0)
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       UDR1 = _inline_fifo_get (&outfifo);
122
       UDR1 = _inline_fifo_get (&outfifo);
126
    else
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    else
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        UCSR1B &= ~(1 << UDRIE1);
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        UCSR1B &= ~(1 << UDRIE1);
-
 
125
}
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}
126
*/
129
 
127
 
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/****************************************************************/
128
/****************************************************************/
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/*               USART1 transmitter ISR                         */
129
/*               USART1 transmitter ISR                         */
132
/****************************************************************/
130
/****************************************************************/
Line 133... Line 131...
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ISR(USART1_TX_vect)
131
/*ISR(USART1_TX_vect)
134
{
132
{
135
 
133
 
136
}
134
}
137
 
135
*/
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/****************************************************************/
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/****************************************************************/
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/*               USART1 receiver ISR                            */
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/*               USART1 receiver ISR                            */
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/****************************************************************/
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/****************************************************************/
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ISR(USART1_RX_vect)
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ISR(USART1_RX_vect)
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{
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{
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        uint8_t c;
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        uint8_t c;