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Rev 735 | Rev 737 | ||
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Line 22... | Line 22... | ||
22 | #define TRUE 1 |
22 | #define TRUE 1 |
Line 23... | Line 23... | ||
23 | 23 | ||
Line 24... | Line 24... | ||
24 | uint8_t DebugGetAnforderung = 0, DebugDisplayAnforderung = 0, DebugDataAnforderung = 0, GetVersionAnforderung = 0; |
24 | uint8_t DebugGetAnforderung = 0, DebugDisplayAnforderung = 0, DebugDataAnforderung = 0, GetVersionAnforderung = 0; |
- | 25 | ||
25 | 26 | volatile uint8_t txd_buffer[TXD_BUFFER_LEN]; |
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26 | volatile uint8_t txd_buffer[TXD_BUFFER_LEN]; |
- | |
27 | volatile uint8_t rxd_buffer[RXD_BUFFER_LEN]; |
- | |
28 | 27 | volatile uint8_t rxd_buffer_locked = FALSE; |
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29 | volatile uint8_t RxDataProcessed = 0; |
28 | volatile uint8_t rxd_buffer[RXD_BUFFER_LEN]; |
Line 30... | Line 29... | ||
30 | volatile uint8_t txd_complete = 1; |
29 | volatile uint8_t txd_complete = TRUE; |
31 | volatile uint8_t ReceivedBytes = 0; |
30 | volatile uint8_t ReceivedBytes = 0; |
32 | 31 | ||
Line 137... | Line 136... | ||
137 | // enable RX-Interrupt |
136 | // enable RX-Interrupt |
138 | UCSR0B |= (1 << RXCIE0); |
137 | UCSR0B |= (1 << RXCIE0); |
139 | // enable TX-Interrupt |
138 | // enable TX-Interrupt |
140 | UCSR0B |= (1 << TXCIE0); |
139 | UCSR0B |= (1 << TXCIE0); |
Line -... | Line 140... | ||
- | 140 | ||
141 | 141 | rxd_buffer_locked = FALSE; |
|
142 | // restore global interrupt flags |
142 | // restore global interrupt flags |
143 | SREG = sreg; |
143 | SREG = sreg; |
Line 144... | Line 144... | ||
144 | } |
144 | } |
Line 170... | Line 170... | ||
170 | /* USART0 receiver ISR */ |
170 | /* USART0 receiver ISR */ |
171 | /****************************************************************/ |
171 | /****************************************************************/ |
172 | ISR(USART0_RX_vect) |
172 | ISR(USART0_RX_vect) |
173 | { |
173 | { |
174 | static uint16_t crc; |
174 | static uint16_t crc; |
175 | static uint8_t crc1, crc2, ptr_rxd_buffer = 0; |
175 | static uint8_t ptr_rxd_buffer = 0; |
176 | static uint8_t UartState = 0; |
- | |
177 | uint8_t CrcOkay = 0; |
176 | uint8_t crc1, crc2; |
178 | uint8_t c; |
177 | uint8_t c; |
Line 179... | Line 178... | ||
179 | 178 | ||
180 | c = UDR0; // catch the received byte |
- | |
181 | if(ptr_rxd_buffer >= RXD_BUFFER_LEN) UartState = 0; // rxd buffer overflow -> reset rx uart state |
- | |
182 | if(c == '\r' && UartState == 2) // termination character received during data collection state |
179 | c = UDR0; // catch the received byte |
183 | { |
- | |
184 | UartState = 0; //reset rxd uart state |
- | |
185 | // the last 2 bytes are no subject for checksum calculation |
- | |
186 | // they are the checksum itself |
- | |
187 | crc -= rxd_buffer[ptr_rxd_buffer-2]; |
- | |
188 | crc -= rxd_buffer[ptr_rxd_buffer-1]; |
- | |
189 | // calculate checksum from transmitted data |
- | |
190 | crc %= 4096; |
- | |
191 | crc1 = '=' + crc / 64; |
- | |
192 | crc2 = '=' + crc % 64; |
- | |
193 | CrcOkay = 0; |
- | |
194 | // compare with transmitted checksum bytes |
- | |
195 | if((crc1 == rxd_buffer[ptr_rxd_buffer-2]) && (crc2 == rxd_buffer[ptr_rxd_buffer-1])) CrcOkay = 1; |
- | |
Line 196... | Line 180... | ||
196 | else CrcOkay = 0; |
180 | |
- | 181 | ||
- | 182 | if(rxd_buffer_locked) return; // if txd buffer is locked immediately return |
|
- | 183 | ||
- | 184 | // the rxd buffer is unlocked |
|
- | 185 | if((ptr_rxd_buffer == 0) && (c == '#')) // if rxd buffer is empty and syncronisation character is received |
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- | 186 | { |
|
- | 187 | rxd_buffer[ptr_rxd_buffer++] = c; // copy 1st byte to buffer |
|
- | 188 | crc = c; // init crc |
|
- | 189 | } |
|
- | 190 | #if 0 |
|
- | 191 | else if (ptr_rxd_buffer == 1) // handle address |
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- | 192 | { |
|
- | 193 | rxd_buffer[ptr_rxd_buffer++] = c; // copy byte to rxd buffer |
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- | 194 | crc += c; // update crc |
|
- | 195 | } |
|
- | 196 | #endif |
|
- | 197 | else if (ptr_rxd_buffer < RXD_BUFFER_LEN) // collect incomming bytes |
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197 | 198 | { |
|
198 | if(RxDataProcessed && CrcOkay) // data already processed and CRC OK? |
- | |
199 | { |
- | |
200 | RxDataProcessed = FALSE; // reset flag |
199 | if(c != '\r') // no termination character |
201 | ReceivedBytes = ptr_rxd_buffer; // store number of received bytes |
- | |
202 | rxd_buffer[ptr_rxd_buffer] = '\r'; // set termination character |
200 | { |
203 | // if 2nd byte is an 'R' enable watchdog that will result in an reset |
201 | rxd_buffer[ptr_rxd_buffer++] = c; // copy byte to rxd buffer |
- | 202 | crc += c; // update crc |
|
- | 203 | } |
|
- | 204 | else // termination character was received |
|
- | 205 | { |
|
- | 206 | // the last 2 bytes are no subject for checksum calculation |
|
- | 207 | // they are the checksum itself |
|
- | 208 | crc -= rxd_buffer[ptr_rxd_buffer-2]; |
|
- | 209 | crc -= rxd_buffer[ptr_rxd_buffer-1]; |
|
- | 210 | // calculate checksum from transmitted data |
|
- | 211 | crc %= 4096; |
|
- | 212 | crc1 = '=' + crc / 64; |
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- | 213 | crc2 = '=' + crc % 64; |
|
- | 214 | // compare checksum to transmitted checksum bytes |
|
- | 215 | if((crc1 == rxd_buffer[ptr_rxd_buffer-2]) && (crc2 == rxd_buffer[ptr_rxd_buffer-1])) |
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- | 216 | { // checksum valid |
|
- | 217 | rxd_buffer_locked = TRUE; // lock the rxd buffer |
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- | 218 | ReceivedBytes = ptr_rxd_buffer; // store number of received bytes |
|
- | 219 | rxd_buffer[ptr_rxd_buffer] = '\r'; // set termination character |
|
- | 220 | // if 2nd byte is an 'R' enable watchdog that will result in an reset |
|
- | 221 | if(rxd_buffer[2] == 'R') wdt_enable(WDTO_250MS); // Reset-Commando |
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- | 222 | } |
|
- | 223 | else |
|
- | 224 | { // checksum invalid |
|
- | 225 | rxd_buffer_locked = FALSE; // unlock rxd buffer |
|
204 | if(rxd_buffer[2] == 'R') wdt_enable(WDTO_250MS); // Reset-Commando |
226 | } |
- | 227 | ptr_rxd_buffer = 0; // reset txd buffer |
|
205 | } |
228 | } |
206 | } |
- | |
207 | else |
229 | } // buffer overrun |
208 | switch(UartState) |
- | |
209 | { |
- | |
210 | case 0: // reset rxd buffer |
230 | else |
211 | if(c == '#' && RxDataProcessed) UartState = 1; // start character recieved and previous data already processed |
- | |
212 | ptr_rxd_buffer = 0; // reset buffer pointer |
- | |
213 | rxd_buffer[ptr_rxd_buffer++] = c; // write character to rxd buffer |
- | |
214 | crc = c; // initialize crc |
- | |
215 | break; |
- | |
216 | case 1: // check address |
- | |
217 | UartState++; // switch to next state |
- | |
218 | rxd_buffer[ptr_rxd_buffer++] = c; // write character to rxd buffer |
- | |
219 | crc += c; // update crc |
- | |
220 | break; |
231 | { |
221 | case 2: // collect received data |
- | |
222 | rxd_buffer[ptr_rxd_buffer] = c; // write character to rxd buffer |
- | |
223 | // if buffer overflow -> reset buffer |
- | |
224 | if(ptr_rxd_buffer < RXD_BUFFER_LEN) ptr_rxd_buffer++; |
- | |
225 | else UartState = 0; |
- | |
226 | crc += c; // update checksum |
- | |
227 | break; |
- | |
228 | default: |
- | |
229 | UartState = 0; |
232 | ptr_rxd_buffer = 0; // reset rxd buffer |
230 | break; |
- | |
Line -... | Line 233... | ||
- | 233 | rxd_buffer_locked = FALSE; // unlock rxd buffer |
|
Line 231... | Line 234... | ||
231 | } |
234 | } |
232 | } |
235 | |
233 | 236 | } |
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Line 302... | Line 305... | ||
302 | 305 | ||
303 | 306 | ||
304 | // -------------------------------------------------------------------------- |
307 | // -------------------------------------------------------------------------- |
305 | void ProcessRxData(void) |
308 | void ProcessRxData(void) |
306 | { |
309 | { |
Line 307... | Line 310... | ||
307 | // if data in the rxd buffer are alredy processed immediately return |
310 | // if data in the rxd buffer are not locked immediately return |
Line 308... | Line 311... | ||
308 | if(RxDataProcessed) return; |
311 | if(!rxd_buffer_locked) return; |
309 | 312 | ||
Line 373... | Line 376... | ||
373 | Beep(GetActiveParamSet()); |
376 | Beep(GetActiveParamSet()); |
374 | break; |
377 | break; |
Line 375... | Line 378... | ||
375 | 378 | ||
- | 379 | ||
376 | 380 | } |
|
377 | } |
381 | // unlock the rxd buffer after processing |
Line 378... | Line 382... | ||
378 | RxDataProcessed = TRUE; |
382 | rxd_buffer_locked = FALSE; |
379 | } |
383 | } |
380 | 384 |