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| Rev 801 | Rev 802 | ||
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| Line 65... | Line 65... | ||
| 65 | 65 | ||
| Line 66... | Line 66... | ||
| 66 | // Timer/Counter1 Interrupt Mask Register |
66 | // Timer/Counter1 Interrupt Mask Register |
| 67 | 67 | ||
| 68 | // Enable Input Capture Interrupt (bit: ICIE1=1) |
68 | // Enable Input Capture Interrupt (bit: ICIE1=1) |
| 69 | // Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0) |
69 | // Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0) |
| 70 | // Disable Overflow Interrupt (bit: TOIE1=0) |
70 | // Enable Overflow Interrupt (bit: TOIE1=0) |
| Line 71... | Line 71... | ||
| 71 | TIMSK1 &= ~((1<<OCIE1B)|(1<<OCIE1A)|(1<<TOIE1)); |
71 | TIMSK1 &= ~((1<<OCIE1B)|(1<<OCIE1A)); |
| Line 72... | Line 72... | ||
| 72 | TIMSK1 |= (1<<ICIE1); |
72 | TIMSK1 |= (1<<ICIE1)|(1<<TOIE1); |
| 73 | 73 | ||
| Line -... | Line 74... | ||
| - | 74 | RC_Quality = 0; |
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| - | 75 | ||
| - | 76 | SREG = sreg; |
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| - | 77 | } |
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| - | 78 | ||
| - | 79 | ||
| - | 80 | // happens every 0.209712 s. |
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| - | 81 | // check for at least one input capture event per timer overflow (timeout) |
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| - | 82 | ISR(TIMER1_OVF_vect) |
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| - | 83 | { |
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| - | 84 | int16_t signal = 0; |
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| - | 85 | static uint16_t lastICR1 = 0; |
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| - | 86 | // if ICR1 has not changed |
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| 74 | RC_Quality = 0; |
87 | // then no new input capture event has occured since last timer overflow |
| 75 | 88 | if (lastICR1 == ICR1) RC_Quality = 0; |
|
| 76 | SREG = sreg; |
89 | lastICR1 = ICR1; // store last ICR1 |
| 77 | } |
90 | } |
| 78 | 91 | ||
| Line 98... | Line 111... | ||
| 98 | The remaining time of (22.5 - 8 ms) ms = 14.5 ms to (22.5 - 16 ms) ms = 6.5 ms is |
111 | The remaining time of (22.5 - 8 ms) ms = 14.5 ms to (22.5 - 16 ms) ms = 6.5 ms is |
| 99 | the syncronization gap. |
112 | the syncronization gap. |
| 100 | */ |
113 | */ |
| 101 | ISR(TIMER1_CAPT_vect) // typical rate of 1 ms to 2 ms |
114 | ISR(TIMER1_CAPT_vect) // typical rate of 1 ms to 2 ms |
| 102 | { |
115 | { |
| 103 | static uint16_t oldICR1 = 0; |
- | |
| 104 | int16_t signal = 0, tmp; |
116 | int16_t signal = 0, tmp; |
| 105 | static int16_t index; |
117 | static int16_t index; |
| 106 | static int16_t Sum_RC_Quality = 0; |
118 | static int16_t Sum_RC_Quality = 0; |
| - | 119 | static uint16_t oldICR1 = 0; |
|
| 107 | int16_t Noise; |
120 | int16_t Noise; |
| Line 108... | Line 121... | ||
| 108 | 121 | ||
| 109 | // 16bit Input Capture Register ICR1 contains the timer value TCNT1 |
122 | // 16bit Input Capture Register ICR1 contains the timer value TCNT1 |
| Line 113... | Line 126... | ||
| 113 | // calculatiing the difference of the two uint16_t and converting the result to an int16_t |
126 | // calculatiing the difference of the two uint16_t and converting the result to an int16_t |
| 114 | // implicit handles a timer overflow 65535 -> 0 the right way. |
127 | // implicit handles a timer overflow 65535 -> 0 the right way. |
| 115 | signal = (uint16_t) ICR1 - oldICR1; |
128 | signal = (uint16_t) ICR1 - oldICR1; |
| 116 | oldICR1 = ICR1; |
129 | oldICR1 = ICR1; |
| Line -... | Line 130... | ||
| - | 130 | ||
| - | 131 | // lost frame |
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| - | 132 | if(signal > 8000) |
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| - | 133 | { |
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| 117 | 134 | Sum_RC_Quality -= Sum_RC_Quality/2; |
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| - | 135 | } |
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| 118 | 136 | else |
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| 119 | //sync gap? (3.52 ms < signal < 25.6 ms) |
137 | //sync gap? (3.52 ms < signal < 25.6 ms) |
| 120 | if((signal > 1100) && (signal < 8000)) |
138 | if((signal > 1100) && (signal < 8000)) |
| 121 | { |
139 | { |
| 122 | // if a sync gap happens and there where at least 4 channels decoded before |
140 | // if a sync gap happens and there where at least 4 channels decoded before |
| 123 | // then the NewPpmData flag is reset indicating valid data in the PPM_in[] array. |
141 | // then the NewPpmData flag is reset indicating valid data in the PPM_in[] array. |
| 124 | if(index >= 4) NewPpmData = 0; // Null means NewData for the first 4 channels |
142 | if(index >= 4) NewPpmData = 0; // Null means NewData for the first 4 channels |
| 125 | // synchronize channel index |
143 | // synchronize channel index |
| 126 | index = 1; |
144 | index = 1; |
| 127 | } |
145 | } |
| 128 | else // within the PPM frame |
146 | else // within the PPM frame |
| 129 | { |
147 | { |
| 130 | if(index < 14) // PPM24 supports 12 channels |
148 | if(index < 14) // PPM24 supports 12 channels |
| 131 | { |
149 | { |
| 132 | // check for valid signal length (0.8 ms < signal < 2.1984 ms) |
150 | // check for valid signal length (0.8 ms < signal < 2.1984 ms) |
| 133 | // signal range is from 1.0ms/3.2us = 312 to 2.0ms/3.2us = 625 |
151 | // signal range is from 1.0ms/3.2us = 312 to 2.0ms/3.2us = 625 |
| 134 | if((signal > 250) && (signal < 687)) |
152 | if((signal > 250) && (signal < 687)) |
| 135 | { |
153 | { |
| 136 | // shift signal to zero symmetric range -154 to 159 |
154 | // shift signal to zero symmetric range -154 to 159 |
| 137 | signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms) |
155 | signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms) |
| 138 | // check for stable signal |
156 | // check for stable signal |
| - | 157 | Noise = abs(signal - PPM_in[index]); |
|
| 139 | Noise = abs(signal - PPM_in[index]); |
158 | if (Noise > 150) Sum_RC_Quality /= 2; |
| 140 | if((Noise/16) > (200-RC_Quality)) // spike detector |
159 | else if((Noise/16) > (200-RC_Quality)) // spike detector |
| 141 | { |
160 | { |
| 142 | Sum_RC_Quality -= 3*RC_Quality; |
161 | Sum_RC_Quality -= 3*RC_Quality; |
| 143 | Sum_RC_Quality += 3*(200 - Noise); |
162 | Sum_RC_Quality += 3*(200 - Noise); |
| 144 | } |
163 | } |
| Line 156... | Line 175... | ||
| 156 | else PPM_diff[index] = 0; |
175 | else PPM_diff[index] = 0; |
| 157 | PPM_in[index] = tmp; // update channel value |
176 | PPM_in[index] = tmp; // update channel value |
| 158 | } |
177 | } |
| 159 | else |
178 | else |
| 160 | { // invalid PPM time |
179 | { // invalid PPM time |
| 161 | Sum_RC_Quality -= Sum_RC_Quality/4; |
180 | Sum_RC_Quality /= 2; |
| 162 | } |
181 | } |
| 163 | if(Sum_RC_Quality < 0) Sum_RC_Quality = 0; |
- | |
| 164 | RC_Quality = Sum_RC_Quality/128; |
- | |
| 165 | index++; // next channel |
182 | index++; // next channel |
| 166 | // demux sum signal for channels 5 to 7 to J3, J4, J5 |
183 | // demux sum signal for channels 5 to 7 to J3, J4, J5 |
| 167 | if(index == 5) PORTD |= (1<<PORTD5); else PORTD &= ~(1<<PORTD5); |
184 | if(index == 5) PORTD |= (1<<PORTD5); else PORTD &= ~(1<<PORTD5); |
| 168 | if(index == 6) PORTD |= (1<<PORTD4); else PORTD &= ~(1<<PORTD4); |
185 | if(index == 6) PORTD |= (1<<PORTD4); else PORTD &= ~(1<<PORTD4); |
| 169 | if(BoardRelease == 10) |
186 | if(BoardRelease == 10) |
| 170 | { |
187 | { |
| 171 | if(index == 7) PORTD |= (1<<PORTD3); else PORTD &= ~(1<<PORTD3); |
188 | if(index == 7) PORTD |= (1<<PORTD3); else PORTD &= ~(1<<PORTD3); |
| 172 | } |
189 | } |
| 173 | } |
190 | } |
| 174 | } |
191 | } |
| - | 192 | if(Sum_RC_Quality < 0) Sum_RC_Quality = 0; |
|
| - | 193 | RC_Quality = Sum_RC_Quality/128; |
|
| 175 | } |
194 | } |