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        TCCR2A &= ~((1<<COM2B1)|(1<<COM2B0)|(1<<COM2A0));
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        TCCR2A &= ~((1<<COM2B1)|(1<<COM2B0)|(1<<COM2A0));
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    TCCR2A |= (1<<COM2A1)|(1<<WGM21)|(1<<WGM20);
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    TCCR2A |= (1<<COM2A1)|(1<<WGM21)|(1<<WGM20);
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    // Timer/Counter 2 Control Register B
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    // Timer/Counter 2 Control Register B
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        // Set clock divider for timer 2 to SYSKLOCK/8 = 20MHz / 8 = 2.5MHz.
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        // Set clock divider for timer 2 to SYSKLOCK/8 = 20MHz / 8 = 2.5MHz
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        // The timer increments from 0x00 to 0xFF with an update rate of 2.5 MHz,
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        // The timer increments from 0x00 to 0xFF with an update rate of 2.5 MHz,
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        // hence the timer overflow interrupt frequency is 2.5 MHz / 256 = 9.765 kHz
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        // hence the timer overflow interrupt frequency is 2.5 MHz / 256 = 9.765 kHz or 0.1024 ms
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