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1 | /******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** |
1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
2 | * File Name : 91x_fmi.h |
2 | * File Name : 91x_fmi.h |
3 | * Author : MCD Application Team |
3 | * Author : MCD Application Team |
- | 4 | * Version : V2.1 |
|
4 | * Date First Issued : 05/18/2006 : Version 1.0 |
5 | * Date : 12/22/2008 |
5 | * Description : This file contains all the functions prototypes for the |
6 | * Description : This file contains all the functions prototypes for the |
6 | * FMI software library. |
7 | * FMI firmware library. |
7 | ******************************************************************************** |
- | |
8 | * History: |
- | |
9 | * 05/22/2007 : Version 1.2 |
- | |
10 | * 05/24/2006 : Version 1.1 |
- | |
11 | * 05/18/2006 : Version 1.0 |
- | |
12 | ******************************************************************************** |
8 | ******************************************************************************** |
13 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH |
9 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH |
14 | * CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS |
10 | * CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS |
15 | * A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT |
11 | * A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT |
16 | * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT |
12 | * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT |
17 | * OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION |
13 | * OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION |
18 | * CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
14 | * CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
19 | *******************************************************************************/ |
15 | *******************************************************************************/ |
20 | 16 | ||
21 | 17 | ||
22 | /* Define to prevent recursive inclusion ------------------------------------ */ |
18 | /* Define to prevent recursive inclusion ------------------------------------ */ |
23 | 19 | ||
24 | #ifndef __91x_FMI_H |
20 | #ifndef __91x_FMI_H |
25 | #define __91x_FMI_H |
21 | #define __91x_FMI_H |
26 | - | ||
27 | /* ========================================================================== */ |
- | |
28 | /* When bank 1 is remapped at address 0x0, decomment the following line */ |
- | |
29 | /* ========================================================================== */ |
- | |
30 | - | ||
31 | //#define Remap_Bank_1 |
22 | |
32 | 23 | ||
33 | 24 | ||
34 | /* Includes ------------------------------------------------------------------*/ |
25 | /* Includes ------------------------------------------------------------------*/ |
35 | 26 | ||
36 | #include "91x_map.h" |
27 | #include "91x_map.h" |
37 | 28 | ||
38 | /* Exported types ------------------------------------------------------------*/ |
29 | /* Exported types ------------------------------------------------------------*/ |
39 | /* Exported constants --------------------------------------------------------*/ |
30 | /* Exported constants --------------------------------------------------------*/ |
40 | 31 | ||
41 | /* FMI banks */ |
32 | /* FMI banks */ |
42 | 33 | ||
- | 34 | #ifdef Boot_Bank_1 /* Boot from Bank 1 */ |
|
43 | #ifdef Remap_Bank_1 |
35 | |
44 | 36 | ||
45 | #define FMI_BANK_0 ((*(vu32*)0x54000010) << 2) /* FMI Bank 0 */ |
37 | #define FMI_BANK_0 ((*(vu32*)0x54000010) << 2) /* FMI Bank 0 */ |
46 | #define FMI_BANK_1 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 1 */ |
38 | #define FMI_BANK_1 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 1 */ |
- | 39 | ||
- | 40 | #endif |
|
47 | 41 | ||
48 | #else /* Remap Bank 0 */ |
42 | #ifdef Boot_Bank_0 /* Boot from Bank 0 */ |
49 | 43 | ||
50 | #define FMI_BANK_0 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 0 */ |
44 | #define FMI_BANK_0 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 0 */ |
51 | #define FMI_BANK_1 ((*(vu32*)0x54000010) << 2) /* FMI Bank 1 */ |
45 | #define FMI_BANK_1 ((*(vu32*)0x54000010) << 2) /* FMI Bank 1 */ |
52 | 46 | ||
53 | #endif |
47 | #endif |
54 | - | ||
55 | /* FMI sectors */ |
48 | |
56 | 49 | ||
57 | #define FMI_B0S0 0x00000000 + FMI_BANK_0 /* Bank 0 sector 0 */ |
50 | #define FMI_B0S0 0x00000000 + FMI_BANK_0 /* Bank 0 sector 0*/ |
58 | #define FMI_B0S1 0x00010000 + FMI_BANK_0 /* Bank 0 sector 1 */ |
51 | #define FMI_B0S1 0x00010000 + FMI_BANK_0 /* Bank 0 sector 1*/ |
59 | #define FMI_B0S2 0x00020000 + FMI_BANK_0 /* Bank 0 sector 2 */ |
52 | #define FMI_B0S2 0x00020000 + FMI_BANK_0 /* Bank 0 sector 2*/ |
60 | #define FMI_B0S3 0x00030000 + FMI_BANK_0 /* Bank 0 sector 3 */ |
53 | #define FMI_B0S3 0x00030000 + FMI_BANK_0 /* Bank 0 sector 3*/ |
61 | #define FMI_B0S4 0x00040000 + FMI_BANK_0 /* Bank 0 sector 4 */ |
54 | #define FMI_B0S4 0x00040000 + FMI_BANK_0 /* Bank 0 sector 4*/ |
62 | #define FMI_B0S5 0x00050000 + FMI_BANK_0 /* Bank 0 sector 5 */ |
55 | #define FMI_B0S5 0x00050000 + FMI_BANK_0 /* Bank 0 sector 5*/ |
- | 56 | #define FMI_B0S6 0x00060000 + FMI_BANK_0 /* Bank 0 sector 6*/ |
|
- | 57 | #define FMI_B0S7 0x00070000 + FMI_BANK_0 /* Bank 0 sector 7*/ |
|
- | 58 | #define FMI_B0S8 0x00080000 + FMI_BANK_0 /* Bank 0 sector 8*/ |
|
- | 59 | #define FMI_B0S9 0x00090000 + FMI_BANK_0 /* Bank 0 sector 9*/ |
|
- | 60 | #define FMI_B0S10 0x000A0000 + FMI_BANK_0 /* Bank 0 sector 10*/ |
|
- | 61 | #define FMI_B0S11 0x000B0000 + FMI_BANK_0 /* Bank 0 sector 11*/ |
|
- | 62 | #define FMI_B0S12 0x000C0000 + FMI_BANK_0 /* Bank 0 sector 12*/ |
|
- | 63 | #define FMI_B0S13 0x000D0000 + FMI_BANK_0 /* Bank 0 sector 13*/ |
|
- | 64 | #define FMI_B0S14 0x000E0000 + FMI_BANK_0 /* Bank 0 sector 14*/ |
|
- | 65 | #define FMI_B0S15 0x000F0000 + FMI_BANK_0 /* Bank 0 sector 15*/ |
|
- | 66 | #define FMI_B0S16 0x00100000 + FMI_BANK_0 /* Bank 0 sector 16*/ |
|
- | 67 | #define FMI_B0S17 0x00110000 + FMI_BANK_0 /* Bank 0 sector 17*/ |
|
- | 68 | #define FMI_B0S18 0x00120000 + FMI_BANK_0 /* Bank 0 sector 18*/ |
|
- | 69 | #define FMI_B0S19 0x00130000 + FMI_BANK_0 /* Bank 0 sector 19*/ |
|
- | 70 | #define FMI_B0S20 0x00140000 + FMI_BANK_0 /* Bank 0 sector 20*/ |
|
- | 71 | #define FMI_B0S21 0x00150000 + FMI_BANK_0 /* Bank 0 sector 21*/ |
|
- | 72 | #define FMI_B0S22 0x00160000 + FMI_BANK_0 /* Bank 0 sector 22*/ |
|
- | 73 | #define FMI_B0S23 0x00170000 + FMI_BANK_0 /* Bank 0 sector 23*/ |
|
- | 74 | #define FMI_B0S24 0x00180000 + FMI_BANK_0 /* Bank 0 sector 24*/ |
|
- | 75 | #define FMI_B0S25 0x00190000 + FMI_BANK_0 /* Bank 0 sector 25*/ |
|
- | 76 | #define FMI_B0S26 0x001A0000 + FMI_BANK_0 /* Bank 0 sector 26*/ |
|
- | 77 | #define FMI_B0S27 0x001B0000 + FMI_BANK_0 /* Bank 0 sector 27*/ |
|
- | 78 | #define FMI_B0S28 0x001C0000 + FMI_BANK_0 /* Bank 0 sector 28*/ |
|
- | 79 | #define FMI_B0S29 0x001D0000 + FMI_BANK_0 /* Bank 0 sector 29*/ |
|
- | 80 | #define FMI_B0S30 0x001E0000 + FMI_BANK_0 /* Bank 0 sector 30*/ |
|
- | 81 | #define FMI_B0S31 0x001F0000 + FMI_BANK_0 /* Bank 0 sector 31*/ |
|
- | 82 | ||
- | 83 | ||
- | 84 | #ifdef Flash_2MB_1MB |
|
- | 85 | ||
- | 86 | #define FMI_B1S0 0x00000000 + FMI_BANK_1 /* Bank 1 sector 0 */ |
|
- | 87 | #define FMI_B1S1 0x00004000 + FMI_BANK_1 /* Bank 1 sector 1 */ |
|
- | 88 | #define FMI_B1S2 0x00008000 + FMI_BANK_1 /* Bank 1 sector 2 */ |
|
- | 89 | #define FMI_B1S3 0x0000C000 + FMI_BANK_1 /* Bank 1 sector 3 */ |
|
- | 90 | #define FMI_B1S4 0x00010000 + FMI_BANK_1 /* Bank 1 sector 4 */ |
|
- | 91 | #define FMI_B1S5 0x00014000 + FMI_BANK_1 /* Bank 1 sector 5 */ |
|
- | 92 | #define FMI_B1S6 0x00018000 + FMI_BANK_1 /* Bank 1 sector 6 */ |
|
- | 93 | #define FMI_B1S7 0x0001C000 + FMI_BANK_1 /* Bank 1 sector 7 */ |
|
- | 94 | ||
- | 95 | #endif |
|
63 | #define FMI_B0S6 0x00060000 + FMI_BANK_0 /* Bank 0 sector 6 */ |
96 | |
64 | #define FMI_B0S7 0x00070000 + FMI_BANK_0 /* Bank 0 sector 7 */ |
97 | #ifdef Flash_512KB_256KB |
65 | 98 | ||
66 | #define FMI_B1S0 0x00000000 + FMI_BANK_1 /* Bank 1 sector 0 */ |
99 | #define FMI_B1S0 0x00000000 + FMI_BANK_1 /* Bank 1 sector 0 */ |
67 | #define FMI_B1S1 0x00002000 + FMI_BANK_1 /* Bank 1 sector 1 */ |
100 | #define FMI_B1S1 0x00002000 + FMI_BANK_1 /* Bank 1 sector 1 */ |
68 | #define FMI_B1S2 0x00004000 + FMI_BANK_1 /* Bank 1 sector 2 */ |
101 | #define FMI_B1S2 0x00004000 + FMI_BANK_1 /* Bank 1 sector 2 */ |
69 | #define FMI_B1S3 0x00006000 + FMI_BANK_1 /* Bank 1 sector 3 */ |
102 | #define FMI_B1S3 0x00006000 + FMI_BANK_1 /* Bank 1 sector 3 */ |
- | 103 | ||
- | 104 | #endif |
|
- | 105 | ||
- | 106 | ||
70 | 107 | ||
71 | /* FMI Flags */ |
108 | /* FMI Flags */ |
72 | 109 | ||
73 | #define FMI_FLAG_SPS 0x02 /* Sector Protection Status Flag */ |
110 | #define FMI_FLAG_SPS 0x02 /* Sector Protection Status Flag */ |
74 | #define FMI_FLAG_PSS 0x04 /* Program Suspend Status Flag */ |
111 | #define FMI_FLAG_PSS 0x04 /* Program Suspend Status Flag */ |
75 | #define FMI_FLAG_PS 0x10 /* Program Status Flag */ |
112 | #define FMI_FLAG_PS 0x10 /* Program Status Flag */ |
76 | #define FMI_FLAG_ES 0x20 /* Erase Status Flag */ |
113 | #define FMI_FLAG_ES 0x20 /* Erase Status Flag */ |
77 | #define FMI_FLAG_ESS 0x40 /* Erase Suspend Status Flag */ |
114 | #define FMI_FLAG_ESS 0x40 /* Erase Suspend Status Flag */ |
78 | #define FMI_FLAG_PECS 0x80 /* FPEC Status Flag */ |
115 | #define FMI_FLAG_PECS 0x80 /* FPEC Status Flag */ |
79 | 116 | ||
80 | /* FMI read wait states */ |
117 | /* FMI read wait states */ |
81 | 118 | ||
82 | #define FMI_READ_WAIT_STATE_1 0x0000 /* One read wait state */ |
119 | #define FMI_READ_WAIT_STATE_1 0x0000 /* One read wait state */ |
83 | #define FMI_READ_WAIT_STATE_2 0x2000 /* Two read wait states */ |
120 | #define FMI_READ_WAIT_STATE_2 0x2000 /* Two read wait states */ |
84 | #define FMI_READ_WAIT_STATE_3 0x4000 /* Three read wait states */ |
121 | #define FMI_READ_WAIT_STATE_3 0x4000 /* Three read wait states */ |
85 | 122 | ||
86 | /* FMI write wait states */ |
123 | /* FMI write wait states */ |
87 | 124 | ||
88 | #define FMI_WRITE_WAIT_STATE_0 0xFFFFFEFF /* Zero wait state */ |
125 | #define FMI_WRITE_WAIT_STATE_0 0xFFFFFEFF /* Zero wait state */ |
89 | #define FMI_WRITE_WAIT_STATE_1 0x00000100 /* One wait state */ |
126 | #define FMI_WRITE_WAIT_STATE_1 0x00000100 /* One wait state */ |
90 | 127 | ||
91 | /* FMI power down configuration */ |
128 | /* FMI power down configuration */ |
92 | 129 | ||
93 | #define FMI_PWD_ENABLE 0x1000 /* FMI Power Down Enable */ |
130 | #define FMI_PWD_ENABLE 0x1000 /* FMI Power Down Enable */ |
94 | #define FMI_PWD_DISABLE 0x0000 /* FMI Power Down Disable */ |
131 | #define FMI_PWD_DISABLE 0x0000 /* FMI Power Down Disable */ |
95 | 132 | ||
96 | /* FMI low voltage detector */ |
133 | /* FMI low voltage detector */ |
97 | 134 | ||
98 | #define FMI_LVD_ENABLE 0x0000 /* FMI Low Voltage Detector Enable */ |
135 | #define FMI_LVD_ENABLE 0x0000 /* FMI Low Voltage Detector Enable */ |
99 | #define FMI_LVD_DISABLE 0x0800 /* FMI Low Voltage Detector Disable */ |
136 | #define FMI_LVD_DISABLE 0x0800 /* FMI Low Voltage Detector Disable */ |
100 | 137 | ||
101 | /* FMI frequency range */ |
138 | /* FMI frequency range */ |
102 | 139 | ||
103 | #define FMI_FREQ_LOW 0x0000 /* FMI Low bus working frequency */ |
140 | #define FMI_FREQ_LOW 0x0000 /* FMI Low bus working frequency */ |
104 | #define FMI_FREQ_HIGH 0x0040 /* FMI High bus working gfrequency */ |
141 | #define FMI_FREQ_HIGH 0x0040 /* FMI High bus working gfrequency */ |
105 | /* Above 66 MHz*/ |
142 | /* Above 66 MHz*/ |
106 | /* FMI OTP word addresses */ |
143 | /* FMI OTP word addresses */ |
107 | 144 | ||
108 | #define FMI_OTP_WORD_0 0x00 /* OTP word 0 */ |
145 | #define FMI_OTP_WORD_0 0x00 /* OTP word 0 */ |
109 | #define FMI_OTP_WORD_1 0x04 /* OTP word 1 */ |
146 | #define FMI_OTP_WORD_1 0x04 /* OTP word 1 */ |
110 | #define FMI_OTP_WORD_2 0x08 /* OTP word 2 */ |
147 | #define FMI_OTP_WORD_2 0x08 /* OTP word 2 */ |
111 | #define FMI_OTP_WORD_3 0x0C /* OTP word 3 */ |
148 | #define FMI_OTP_WORD_3 0x0C /* OTP word 3 */ |
112 | #define FMI_OTP_WORD_4 0x10 /* OTP word 4 */ |
149 | #define FMI_OTP_WORD_4 0x10 /* OTP word 4 */ |
113 | #define FMI_OTP_WORD_5 0x14 /* OTP word 5 */ |
150 | #define FMI_OTP_WORD_5 0x14 /* OTP word 5 */ |
114 | #define FMI_OTP_WORD_6 0x18 /* OTP word 6 */ |
151 | #define FMI_OTP_WORD_6 0x18 /* OTP word 6 */ |
115 | #define FMI_OTP_WORD_7 0x1C /* OTP word 7 */ |
152 | #define FMI_OTP_WORD_7 0x1C /* OTP word 7 */ |
116 | 153 | ||
117 | /* FMI OTP halfword addresses */ |
154 | /* FMI OTP halfword addresses */ |
118 | 155 | ||
119 | #define FMI_OTP_LOW_HALFWORD_0 0x00 /* OTP Low halfword 0 */ |
156 | #define FMI_OTP_LOW_HALFWORD_0 0x00 /* OTP Low halfword 0 */ |
120 | #define FMI_OTP_HIGH_HALFWORD_0 0x02 /* OTP High halfword 0 */ |
157 | #define FMI_OTP_HIGH_HALFWORD_0 0x02 /* OTP High halfword 0 */ |
121 | #define FMI_OTP_LOW_HALFWORD_1 0x04 /* OTP Low halfword 1 */ |
158 | #define FMI_OTP_LOW_HALFWORD_1 0x04 /* OTP Low halfword 1 */ |
122 | #define FMI_OTP_HIGH_HALFWORD_1 0x06 /* OTP High halfword 1 */ |
159 | #define FMI_OTP_HIGH_HALFWORD_1 0x06 /* OTP High halfword 1 */ |
123 | #define FMI_OTP_LOW_HALFWORD_2 0x08 /* OTP Low halfword 2 */ |
160 | #define FMI_OTP_LOW_HALFWORD_2 0x08 /* OTP Low halfword 2 */ |
124 | #define FMI_OTP_HIGH_HALFWORD_2 0x0A /* OTP High halfword 2 */ |
161 | #define FMI_OTP_HIGH_HALFWORD_2 0x0A /* OTP High halfword 2 */ |
125 | #define FMI_OTP_LOW_HALFWORD_3 0x0C /* OTP Low halfword 3 */ |
162 | #define FMI_OTP_LOW_HALFWORD_3 0x0C /* OTP Low halfword 3 */ |
126 | #define FMI_OTP_HIGH_HALFWORD_3 0x0E /* OTP High halfword 3 */ |
163 | #define FMI_OTP_HIGH_HALFWORD_3 0x0E /* OTP High halfword 3 */ |
127 | #define FMI_OTP_LOW_HALFWORD_4 0x10 /* OTP Low halfword 4 */ |
164 | #define FMI_OTP_LOW_HALFWORD_4 0x10 /* OTP Low halfword 4 */ |
128 | #define FMI_OTP_HIGH_HALFWORD_4 0x12 /* OTP High halfword 4 */ |
165 | #define FMI_OTP_HIGH_HALFWORD_4 0x12 /* OTP High halfword 4 */ |
129 | #define FMI_OTP_LOW_HALFWORD_5 0x14 /* OTP Low halfword 5 */ |
166 | #define FMI_OTP_LOW_HALFWORD_5 0x14 /* OTP Low halfword 5 */ |
130 | #define FMI_OTP_HIGH_HALFWORD_5 0x16 /* OTP High halfword 5 */ |
167 | #define FMI_OTP_HIGH_HALFWORD_5 0x16 /* OTP High halfword 5 */ |
131 | #define FMI_OTP_LOW_HALFWORD_6 0x18 /* OTP Low halfword 6 */ |
168 | #define FMI_OTP_LOW_HALFWORD_6 0x18 /* OTP Low halfword 6 */ |
132 | #define FMI_OTP_HIGH_HALFWORD_6 0x1A /* OTP High halfword 6 */ |
169 | #define FMI_OTP_HIGH_HALFWORD_6 0x1A /* OTP High halfword 6 */ |
133 | #define FMI_OTP_LOW_HALFWORD_7 0x1C /* OTP Low halfword 7 */ |
170 | #define FMI_OTP_LOW_HALFWORD_7 0x1C /* OTP Low halfword 7 */ |
134 | #define FMI_OTP_HIGH_HALFWORD_7 0x1E /* OTP High halfword 7 */ |
171 | #define FMI_OTP_HIGH_HALFWORD_7 0x1E /* OTP High halfword 7 */ |
135 | 172 | ||
136 | /* FMI sectors Masks */ |
173 | /*FMI LSB RSIG Address*/ |
137 | 174 | ||
138 | #define FMI_B0S0_MASK 0x0001 /* FMI B0S0 mask */ |
175 | #define FMI_ReadRSIGData_0 0x00 /*Manufacturer Code*/ |
139 | #define FMI_B0S1_MASK 0x0002 /* FMI B0S1 mask */ |
176 | #define FMI_ReadRSIGData_1 0x01 /*Device Code*/ |
140 | #define FMI_B0S2_MASK 0x0004 /* FMI B0S2 mask */ |
177 | #define FMI_ReadRSIGData_2 0x02 /*Die Revision Code*/ |
141 | #define FMI_B0S3_MASK 0x0008 /* FMI B0S3 mask */ |
178 | #define FMI_ReadRSIGData_3 0x03 /*Protection Level 2 Register for 512KB Flash */ |
- | 179 | /*or Protection Level 1 Register (sectors of bank0)*/ |
|
142 | #define FMI_B0S4_MASK 0x0010 /* FMI B0S4 mask */ |
180 | /* for 2MB flash*/ |
- | 181 | ||
143 | #define FMI_B0S5_MASK 0x0020 /* FMI B0S5 mask */ |
182 | #define FMI_ReadRSIGData_4 0x04 /*Protection Level 1 Register for 512KB Flash*/ |
144 | #define FMI_B0S6_MASK 0x0040 /* FMI B0S6 mask */ |
183 | /* or Protection Level 1 Register (sectors of bank1)*/ |
145 | #define FMI_B0S7_MASK 0x0080 /* FMI B0S7 mask */ |
184 | /* for 2MB flash*/ |
- | 185 | ||
146 | 186 | #define FMI_ReadRSIGData_5 0x05 /*Protection Status Register(sectors of bank0)*/ |
|
147 | #define FMI_B1S0_MASK 0x0100 /* FMI B1S0 mask */ |
187 | /*for 2MB flash or Flash Configuration Register*/ |
- | 188 | /*for 512KB flash*/ |
|
148 | #define FMI_B1S1_MASK 0x0200 /* FMI B1S1 mask */ |
189 | #define FMI_ReadRSIGData_6 0x06 /*Protection Status Register (sectors of bank1)*/ |
- | 190 | /*available only for 2MB flash*/ |
|
- | 191 | #define FMI_ReadRSIGData_7 0x07 /*Flash Configuration Register*/ |
|
149 | #define FMI_B1S2_MASK 0x0400 /* FMI B1S2 mask */ |
192 | /*available only for 2MB flash*/ |
150 | #define FMI_B1S3_MASK 0x0800 /* FMI B1S3 mask */ |
193 | |
151 | 194 | ||
152 | /* Timeout error */ |
195 | /* Timeout error */ |
153 | 196 | ||
154 | #define FMI_TIME_OUT_ERROR 0x00 /* Timeout error */ |
197 | #define FMI_TIME_OUT_ERROR 0x00 /* Timeout error */ |
155 | #define FMI_NO_TIME_OUT_ERROR 0x01 /* No Timeout error */ |
198 | #define FMI_NO_TIME_OUT_ERROR 0x01 /* No Timeout error */ |
156 | 199 | ||
157 | /* Module private variables --------------------------------------------------*/ |
200 | /* Module private variables --------------------------------------------------*/ |
158 | /* Exported macro ------------------------------------------------------------*/ |
201 | /* Exported macro ------------------------------------------------------------*/ |
159 | /* Private functions ---------------------------------------------------------*/ |
202 | /* Private functions ---------------------------------------------------------*/ |
160 | /* Exported functions ------------------------------------------------------- */ |
203 | /* Exported functions ------------------------------------------------------- */ |
161 | 204 | ||
162 | void FMI_BankRemapConfig(u8 FMI_BootBankSize, u8 FMI_NonBootBankSize, \ |
205 | void FMI_BankRemapConfig(u8 FMI_BootBankSize, u8 FMI_NonBootBankSize, \ |
163 | u32 FMI_BootBankAddress, u32 FMI_NonBootBankAddress); |
206 | u32 FMI_BootBankAddress, u32 FMI_NonBootBankAddress); |
164 | void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,\ |
207 | void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,\ |
165 | u16 FMI_LVDEN, u16 FMI_FreqRange); |
208 | u16 FMI_LVDEN, u16 FMI_FreqRange); |
166 | void FMI_EraseSector(vu32 FMI_Sector); |
209 | void FMI_EraseSector(vu32 FMI_Sector); |
167 | void FMI_EraseBank(vu32 FMI_Bank); |
210 | void FMI_EraseBank(vu32 FMI_Bank); |
168 | void FMI_WriteHalfWord(u32 FMI_Address, u16 FMI_Data); |
211 | void FMI_WriteHalfWord(u32 FMI_Address, u16 FMI_Data); |
169 | void FMI_WriteOTPHalfWord(u8 FMI_OTPHWAddress, u16 FMI_OTPData); |
212 | void FMI_WriteOTPHalfWord(u8 FMI_OTPHWAddress, u16 FMI_OTPData); |
170 | u32 FMI_ReadWord(u32 FMI_Address); |
213 | u32 FMI_ReadWord(u32 FMI_Address); |
171 | u32 FMI_ReadOTPData(u8 FMI_OTPAddress); |
214 | u32 FMI_ReadOTPData(u8 FMI_OTPAddress); |
172 | FlagStatus FMI_GetFlagStatus(u8 FMI_Flag, vu32 FMI_Bank); |
215 | FlagStatus FMI_GetFlagStatus(u8 FMI_Flag, vu32 FMI_Bank); |
173 | u16 FMI_GetReadWaitStateValue(void); |
216 | u16 FMI_GetReadWaitStateValue(void); |
174 | u16 FMI_GetWriteWaitStateValue(void); |
217 | u16 FMI_GetWriteWaitStateValue(void); |
175 | void FMI_SuspendEnable(vu32 FMI_Bank); |
218 | void FMI_SuspendEnable(vu32 FMI_Bank); |
176 | void FMI_ResumeEnable(vu32 FMI_Bank); |
219 | void FMI_ResumeEnable(vu32 FMI_Bank); |
177 | void FMI_ClearFlag(vu32 FMI_Bank); |
220 | void FMI_ClearFlag(vu32 FMI_Bank); |
178 | void FMI_WriteProtectionCmd(vu32 FMI_Sector, FunctionalState FMI_NewState); |
221 | void FMI_WriteProtectionCmd(vu32 FMI_Sector, FunctionalState FMI_NewState); |
179 | FlagStatus FMI_GetWriteProtectionStatus(u32 FMI_Sector_Protection); |
- | |
180 | u8 FMI_WaitForLastOperation(vu32 FMI_Bank); |
222 | u8 FMI_WaitForLastOperation(vu32 FMI_Bank); |
- | 223 | u32 FMI_ReadRSIGData(u8 FMI_LSB_RSIGAddress); |
|
181 | 224 | ||
182 | #endif /* __91x_FMI_H */ |
225 | #endif /* __91x_FMI_H */ |
183 | 226 | ||
184 | /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ |
227 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ |
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