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1 | 1 | ||
2 | #ifndef __91x_CONF_H |
2 | #ifndef __91x_CONF_H |
3 | #define __91x_CONF_H |
3 | #define __91x_CONF_H |
4 | 4 | ||
5 | /* To work in buffered mode just decomment the following line */ |
5 | /* To work in buffered mode just decomment the following line */ |
6 | 6 | ||
7 | //#define Buffered |
7 | //#define Buffered |
8 | 8 | ||
9 | /* Comment the line below to put the library in release mode */ |
9 | /* Comment the line below to put the library in release mode */ |
10 | //#define DEBUG |
10 | //#define DEBUG |
11 | 11 | ||
12 | #define _RCLK_Divisor SCU_RCLK_Div1 // Reference clock divisor |
12 | #define _RCLK_Divisor SCU_RCLK_Div1 // Reference clock divisor |
13 | #define _HCLK_Divisor SCU_HCLK_Div1 // ARM high speed bus divisor |
13 | #define _HCLK_Divisor SCU_HCLK_Div1 // ARM high speed bus divisor |
14 | #define _PCLK_Divisor SCU_PCLK_Div1 // ARM Peripheral bus divisor |
14 | #define _PCLK_Divisor SCU_PCLK_Div1 // ARM Peripheral bus divisor |
15 | #define _FMICLK_Divisor SCU_FMICLK_Div2 // FMI divisor |
15 | #define _FMICLK_Divisor SCU_FMICLK_Div2 // FMI divisor |
16 | /************************* AHBAPB *************************/ |
16 | /************************* AHBAPB *************************/ |
17 | //#define _AHBAPB |
17 | //#define _AHBAPB |
18 | //#define _AHBAPB0 |
18 | //#define _AHBAPB0 |
19 | //#define _AHBAPB1 |
19 | //#define _AHBAPB1 |
20 | /************************* VIC *************************/ |
20 | /************************* VIC *************************/ |
21 | #define _VIC |
21 | #define _VIC |
22 | #define _VIC0 |
22 | #define _VIC0 |
23 | #define _VIC1 |
23 | #define _VIC1 |
24 | /************************* DMA *************************/ |
24 | /************************* DMA *************************/ |
25 | //#define _DMA |
25 | //#define _DMA |
26 | //#define _DMA_Channel0 |
26 | //#define _DMA_Channel0 |
27 | //#define _DMA_Channel1 |
27 | //#define _DMA_Channel1 |
28 | //#define _DMA_Channel2 |
28 | //#define _DMA_Channel2 |
29 | //#define _DMA_Channel3 |
29 | //#define _DMA_Channel3 |
30 | //#define _DMA_Channel4 |
30 | //#define _DMA_Channel4 |
31 | //#define _DMA_Channel5 |
31 | //#define _DMA_Channel5 |
32 | //#define _DMA_Channel6 |
32 | //#define _DMA_Channel6 |
33 | //#define _DMA_Channel7 |
33 | //#define _DMA_Channel7 |
34 | 34 | ||
35 | /************************* EMI *************************/ |
35 | /************************* EMI *************************/ |
36 | //#define _EMI |
36 | //#define _EMI |
37 | //#define _EMI_Bank0 |
37 | //#define _EMI_Bank0 |
38 | //#define _EMI_Bank1 |
38 | //#define _EMI_Bank1 |
39 | //#define _EMI_Bank2 |
39 | //#define _EMI_Bank2 |
40 | //#define _EMI_Bank3 |
40 | //#define _EMI_Bank3 |
41 | /************************* FMI *************************/ |
41 | /************************* FMI *************************/ |
42 | #define _FMI |
42 | #define _FMI |
43 | /************************* WIU *************************/ |
43 | /************************* WIU *************************/ |
44 | #define _WIU |
44 | #define _WIU |
45 | /************************* TIM *************************/ |
45 | /************************* TIM *************************/ |
46 | #define _TIM |
46 | #define _TIM |
47 | #define _TIM0 |
47 | #define _TIM0 |
48 | #define _TIM1 |
48 | #define _TIM1 |
49 | #define _TIM2 |
49 | #define _TIM2 |
50 | #define _TIM3 |
50 | #define _TIM3 |
51 | /************************* GPIO ************************/ |
51 | /************************* GPIO ************************/ |
52 | #define _GPIO |
52 | #define _GPIO |
53 | #define _GPIO0 |
53 | #define _GPIO0 |
54 | #define _GPIO1 |
54 | #define _GPIO1 |
55 | #define _GPIO2 |
55 | #define _GPIO2 |
56 | #define _GPIO3 |
56 | #define _GPIO3 |
57 | #define _GPIO4 |
57 | #define _GPIO4 |
58 | #define _GPIO5 |
58 | #define _GPIO5 |
59 | #define _GPIO6 |
59 | #define _GPIO6 |
60 | #define _GPIO7 |
60 | #define _GPIO7 |
61 | #define _GPIO8 |
61 | #define _GPIO8 |
62 | #define _GPIO9 |
62 | #define _GPIO9 |
63 | /************************* RTC *************************/ |
63 | /************************* RTC *************************/ |
64 | //#define _RTC |
64 | //#define _RTC |
65 | /************************* SCU *************************/ |
65 | /************************* SCU *************************/ |
66 | #define _SCU |
66 | #define _SCU |
67 | /************************* MC **************************/ |
67 | /************************* MC **************************/ |
68 | //#define _MC |
68 | //#define _MC |
69 | /************************* UART ************************/ |
69 | /************************* UART ************************/ |
70 | #define _UART |
70 | #define _UART |
71 | #define _UART0 |
71 | #define _UART0 |
72 | #define _UART1 |
72 | #define _UART1 |
73 | #define _UART2 |
73 | #define _UART2 |
74 | /************************* SSP *************************/ |
74 | /************************* SSP *************************/ |
75 | #define _SSP |
75 | #define _SSP |
76 | #define _SSP0 |
76 | #define _SSP0 |
77 | #define _SSP1 |
77 | #define _SSP1 |
78 | /************************* CAN *************************/ |
78 | /************************* CAN *************************/ |
79 | //#define _CAN |
79 | //#define _CAN |
80 | /************************* ADC *************************/ |
80 | /************************* ADC *************************/ |
81 | //#define _ADC |
81 | //#define _ADC |
82 | /************************* WDG *************************/ |
82 | /************************* WDG *************************/ |
83 | //#define _WDG |
83 | //#define _WDG |
84 | /************************* I2C *************************/ |
84 | /************************* I2C *************************/ |
85 | #define _I2C |
85 | #define _I2C |
86 | //#define _I2C0 |
86 | //#define _I2C0 |
87 | #define _I2C1 |
87 | #define _I2C1 |
88 | 88 | ||
89 | /************************ ENET *************************/ |
89 | /************************ ENET *************************/ |
90 | //#define _ENET |
90 | //#define _ENET |
91 | /************************ USB *************************/ |
91 | /************************ USB *************************/ |
92 | #define _USB |
92 | #define _USB |
93 | 93 | ||
94 | 94 | ||
95 | 95 | ||
96 | #endif /* __91x_CONF_H */ |
96 | #endif /* __91x_CONF_H */ |
97 | 97 | ||
98 | /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ |
98 | /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ |
99 | 99 |