WebSVN - FlightCtrl - Diff - Rev 832 and 848 - /branches/V0.68d Code Redesign killagreg/rc.c


/*#######################################################################################
Decodieren eines RC Summen Signals
#######################################################################################*/
// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// + Copyright (c) 04.2007 Holger Buss
// + only for non-profit use
// + www.MikroKopter.com
// + see the File "License.txt" for further Informations
// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 
#include <stdlib.h>
#include <avr/io.h>
#include <avr/interrupt.h>
 
#include "rc.h"
#include "main.h"
 
volatile int16_t PPM_in[15]; //PPM24 supports 12 channels per frame
volatile int16_t PPM_diff[15];
volatile uint8_t NewPpmData = 1;
volatile int16_t RC_Quality = 0;
 
volatile uint8_t NewRCFrames = 0;
 
 
/***************************************************************/
/*  16bit timer 1 is used to decode the PPM-Signal            */
/***************************************************************/
void RC_Init (void)
{
        uint8_t sreg = SREG;
 
        // disable all interrupts before reconfiguration
        cli();
 
        // PPM-signal is connected to the Input Capture Pin (PD6) of timer 1
        DDRD &= ~(1<<DDD6);
        PORTD |= (1<<PORTD6);
 
        // Channel 5,6,7 is decoded to servo signals at pin PD5 (J3), PD4(J4), PD3(J5)
        // set as output
        DDRD |= (1<<DDD5)|(1<<DDD4);
        // low level
        PORTD &= ~((1<<PORTD5)|(1<<PORTD4));
 
        // PD3 can't be used in FC 1.1 if 2nd UART is activated
        // because TXD1 is at that port
        if(BoardRelease == 10)
        {
                DDRD |= (1<<PORTD3);
                PORTD &= ~(1<<PORTD3);
        }
 
        // Timer/Counter1 Control Register A, B, C
 
        // Normal Mode (bits: WGM13=0, WGM12=0, WGM11=0, WGM10=0)
        // Compare output pin A & B is disabled (bits: COM1A1=0, COM1A0=0, COM1B1=0, COM1B0=0)
        // Set clock source to SYSCLK/64 (bit: CS12=0, CS11=1, CS10=1)
        // Enable input capture noise cancler (bit: ICNC1=1)
        // Trigger on positive edge of the input capture pin (bit: ICES1=1),
        // Therefore the counter incremets at a clock of 20 MHz/64 = 312.5 kHz or 3.2µs
    // The longest period is 0xFFFF / 312.5 kHz = 0.209712 s.
        TCCR1A &= ~((1<<COM1A1)|(1<<COM1A0)|(1<<COM1B1)|(1<<COM1B0)|(1<<WGM11)|(1<<WGM10));
        TCCR1B &= ~((1<<WGM13)|(1<<WGM12)|(1<<CS12));
        TCCR1B |= (1<<CS11)|(1<<CS10)|(1<<ICES1)|(1<<ICNC1);
        TCCR1C &= ~((1<<FOC1A)|(1<<FOC1B));
 
        // Timer/Counter1 Interrupt Mask Register
 
        // Enable Input Capture Interrupt (bit: ICIE1=1)
        // Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0)
        // Enable Overflow Interrupt (bit: TOIE1=0)
        TIMSK1 &= ~((1<<OCIE1B)|(1<<OCIE1A));
    TIMSK1 |= (1<<ICIE1)|(1<<TOIE1);
 
    RC_Quality = 0;
 
    SREG = sreg;
}
 
 
// happens every 0.209712 s.
// check for at least one new frame per timer overflow (timeout)
ISR(TIMER1_OVF_vect)
{
        if (NewRCFrames == 0) RC_Quality -= RC_Quality/8;
        NewRCFrames = 0;
}
 
 
/********************************************************************/
/*         Every time a positive edge is detected at PD6            */
/********************************************************************/
/*                               t-Frame
       <----------------------------------------------------------------------->
         ____   ______   _____   ________                ______    sync gap      ____
        |    | |      | |     | |        |              |      |                |
        |    | |      | |     | |        |              |      |                |
     ___|    |_|      |_|     |_|        |_.............|      |________________|
        <-----><-------><------><-------->              <------>                <---
          t0       t1      t2       t4                     tn                     t0
 
The PPM-Frame length is 22.5 ms.
Channel high pulse width range is 0.7 ms to 1.7 ms completed by an 0.3 ms low pulse.
The mininimum time delay of two events coding a channel is ( 0.7 + 0.3) ms = 1 ms.
The maximum time delay of two events coding a chanel is ( 1.7 + 0.3) ms = 2 ms.
The minimum duration of all channels at minimum value is  8 * 1 ms = 8 ms.
The maximum duration of all channels at maximum value is  8 * 2 ms = 16 ms.
The remaining time of (22.5 - 8 ms) ms = 14.5 ms  to (22.5 - 16 ms) ms = 6.5 ms is
the syncronization gap.
*/
ISR(TIMER1_CAPT_vect) // typical rate of 1 ms to 2 ms
{
    int16_t signal = 0, tmp;
        static int16_t index;
        static uint16_t oldICR1 = 0;
 
        // 16bit Input Capture Register ICR1 contains the timer value TCNT1
        // at the time the edge was detected
 
        // calculate the time delay to the previous event time which is stored in oldICR1
        // calculatiing the difference of the two uint16_t and converting the result to an int16_t
        // implicit handles a timer overflow 65535 -> 0 the right way.
        signal = (uint16_t) ICR1 - oldICR1;
        oldICR1 = ICR1;
 
    //sync gap? (3.52 ms < signal < 25.6 ms)
        if((signal > 1100) && (signal < 8000))
        {
                // if a sync gap happens and there where at least 4 channels decoded before
                // then the NewPpmData flag is reset indicating valid data in the PPM_in[] array.
                if(index >= 4)
                {
                        NewPpmData = 0;  // Null means NewData for the first 4 channels
                        NewRCFrames++;
                }
                // synchronize channel index
                index = 1;
        }
        else // within the PPM frame
    {
        if(index < 14) // PPM24 supports 12 channels
        {
                        // check for valid signal length (0.8 ms < signal < 2.1984 ms)
                        // signal range is from 1.0ms/3.2us = 312 to 2.0ms/3.2us = 625
            if((signal > 250) && (signal < 687))
            {
                                // shift signal to zero symmetric range  -154 to 159
                signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms)
                // check for stable signal
                if(abs(signal-PPM_in[index]) < 6)
                {
                                        if(RC_Quality < 200) RC_Quality +=10;
                                }
                                // calculate exponential history for signal
                tmp = (3 * (PPM_in[index]) + signal) / 4;
                if(tmp > signal+1) tmp--; else
                if(tmp < signal-1) tmp++;
                // calculate signal difference on good signal level
                if(RC_Quality >= 195)  PPM_diff[index] = ((tmp - PPM_in[index]) / 3) * 3; // cut off lower 3 bit for nois reduction
                else PPM_diff[index] = 0;
                PPM_in[index] = tmp; // update channel value
            }
            index++; // next channel
            // demux sum signal for channels 5 to 7 to J3, J4, J5
                if(index == 5) PORTD |= (1<<PORTD5); else PORTD &= ~(1<<PORTD5);
                if(index == 6) PORTD |= (1<<PORTD4); else PORTD &= ~(1<<PORTD4);
                if(BoardRelease == 10)
                {
                                if(index == 7) PORTD |= (1<<PORTD3); else PORTD &= ~(1<<PORTD3);
                }
        }
        }
        if(RC_Quality) RC_Quality--;
}
 
 
 
 
 
 

Subversion Repositories FlightCtrl

(root)/branches/V0.68d Code Redesign killagreg/rc.c @ 916 - Rev 832 → 848

Rev 832		Rev 848
1	/*#######################################################################################	1	/*#######################################################################################
2	Decodieren eines RC Summen Signals	2	Decodieren eines RC Summen Signals
3	#######################################################################################*/	3	#######################################################################################*/
4	// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++	4	// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
5	// + Copyright (c) 04.2007 Holger Buss	5	// + Copyright (c) 04.2007 Holger Buss
6	// + only for non-profit use	6	// + only for non-profit use
7	// + www.MikroKopter.com	7	// + www.MikroKopter.com
8	// + see the File "License.txt" for further Informations	8	// + see the File "License.txt" for further Informations
9	// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++	9	// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
10		10
11	#include <stdlib.h>	11	#include <stdlib.h>
12	#include <avr/io.h>	12	#include <avr/io.h>
13	#include <avr/interrupt.h>	13	#include <avr/interrupt.h>
14		14
15	#include "rc.h"	15	#include "rc.h"
16	#include "main.h"	16	#include "main.h"
17		17
18	volatile int16_t PPM_in[15]; //PPM24 supports 12 channels per frame	18	volatile int16_t PPM_in[15]; //PPM24 supports 12 channels per frame
19	volatile int16_t PPM_diff[15];	19	volatile int16_t PPM_diff[15];
20	volatile uint8_t NewPpmData = 1;	20	volatile uint8_t NewPpmData = 1;
21	volatile int16_t RC_Quality = 0;	21	volatile int16_t RC_Quality = 0;
22		22
23	volatile uint8_t NewRCFrames = 0;	23	volatile uint8_t NewRCFrames = 0;
24		24
25		25
26	/***************************************************************/	26	/***************************************************************/
27	/* 16bit timer 1 is used to decode the PPM-Signal */	27	/* 16bit timer 1 is used to decode the PPM-Signal */
28	/***************************************************************/	28	/***************************************************************/
29	void RC_Init (void)	29	void RC_Init (void)
30	{	30	{
31	uint8_t sreg = SREG;	31	uint8_t sreg = SREG;
32		32
33	// disable all interrupts before reconfiguration	33	// disable all interrupts before reconfiguration
34	cli();	34	cli();
35		35
36	// PPM-signal is connected to the Input Capture Pin (PD6) of timer 1	36	// PPM-signal is connected to the Input Capture Pin (PD6) of timer 1
37	DDRD &= ~(1<<DDD6);	37	DDRD &= ~(1<<DDD6);
38	PORTD \|= (1<<PORTD6);	38	PORTD \|= (1<<PORTD6);
39		39
40	// Channel 5,6,7 is decoded to servo signals at pin PD5 (J3), PD4(J4), PD3(J5)	40	// Channel 5,6,7 is decoded to servo signals at pin PD5 (J3), PD4(J4), PD3(J5)
41	// set as output	41	// set as output
42	DDRD \|= (1<<DDD5)\|(1<<DDD4);	42	DDRD \|= (1<<DDD5)\|(1<<DDD4);
43	// low level	43	// low level
44	PORTD &= ~((1<<PORTD5)\|(1<<PORTD4));	44	PORTD &= ~((1<<PORTD5)\|(1<<PORTD4));
45		45
46	// PD3 can't be used in FC 1.1 if 2nd UART is activated	46	// PD3 can't be used in FC 1.1 if 2nd UART is activated
47	// because TXD1 is at that port	47	// because TXD1 is at that port
48	if(BoardRelease == 10)	48	if(BoardRelease == 10)
49	{	49	{
50	DDRD \|= (1<<PORTD3);	50	DDRD \|= (1<<PORTD3);
51	PORTD &= ~(1<<PORTD3);	51	PORTD &= ~(1<<PORTD3);
52	}	52	}
53		53
54	// Timer/Counter1 Control Register A, B, C	54	// Timer/Counter1 Control Register A, B, C
55		55
56	// Normal Mode (bits: WGM13=0, WGM12=0, WGM11=0, WGM10=0)	56	// Normal Mode (bits: WGM13=0, WGM12=0, WGM11=0, WGM10=0)
57	// Compare output pin A & B is disabled (bits: COM1A1=0, COM1A0=0, COM1B1=0, COM1B0=0)	57	// Compare output pin A & B is disabled (bits: COM1A1=0, COM1A0=0, COM1B1=0, COM1B0=0)
58	// Set clock source to SYSCLK/64 (bit: CS12=0, CS11=1, CS10=1)	58	// Set clock source to SYSCLK/64 (bit: CS12=0, CS11=1, CS10=1)
59	// Enable input capture noise cancler (bit: ICNC1=1)	59	// Enable input capture noise cancler (bit: ICNC1=1)
60	// Trigger on positive edge of the input capture pin (bit: ICES1=1),	60	// Trigger on positive edge of the input capture pin (bit: ICES1=1),
61	// Therefore the counter incremets at a clock of 20 MHz/64 = 312.5 kHz or 3.2µs	61	// Therefore the counter incremets at a clock of 20 MHz/64 = 312.5 kHz or 3.2µs
62	// The longest period is 0xFFFF / 312.5 kHz = 0.209712 s.	62	// The longest period is 0xFFFF / 312.5 kHz = 0.209712 s.
63	TCCR1A &= ~((1<<COM1A1)\|(1<<COM1A0)\|(1<<COM1B1)\|(1<<COM1B0)\|(1<<WGM11)\|(1<<WGM10));	63	TCCR1A &= ~((1<<COM1A1)\|(1<<COM1A0)\|(1<<COM1B1)\|(1<<COM1B0)\|(1<<WGM11)\|(1<<WGM10));
64	TCCR1B &= ~((1<<WGM13)\|(1<<WGM12)\|(1<<CS12));	64	TCCR1B &= ~((1<<WGM13)\|(1<<WGM12)\|(1<<CS12));
65	TCCR1B \|= (1<<CS11)\|(1<<CS10)\|(1<<ICES1)\|(1<<ICNC1);	65	TCCR1B \|= (1<<CS11)\|(1<<CS10)\|(1<<ICES1)\|(1<<ICNC1);
66	TCCR1C &= ~((1<<FOC1A)\|(1<<FOC1B));	66	TCCR1C &= ~((1<<FOC1A)\|(1<<FOC1B));
67		67
68	// Timer/Counter1 Interrupt Mask Register	68	// Timer/Counter1 Interrupt Mask Register
69		69
70	// Enable Input Capture Interrupt (bit: ICIE1=1)	70	// Enable Input Capture Interrupt (bit: ICIE1=1)
71	// Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0)	71	// Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0)
72	// Enable Overflow Interrupt (bit: TOIE1=0)	72	// Enable Overflow Interrupt (bit: TOIE1=0)
73	TIMSK1 &= ~((1<<OCIE1B)\|(1<<OCIE1A));	73	TIMSK1 &= ~((1<<OCIE1B)\|(1<<OCIE1A));
74	TIMSK1 \|= (1<<ICIE1)\|(1<<TOIE1);	74	TIMSK1 \|= (1<<ICIE1)\|(1<<TOIE1);
75		75
76	RC_Quality = 0;	76	RC_Quality = 0;
77		77
78	SREG = sreg;	78	SREG = sreg;
79	}	79	}
80		80
81		81
82	// happens every 0.209712 s.	82	// happens every 0.209712 s.
83	// check for at least one new frame per timer overflow (timeout)	83	// check for at least one new frame per timer overflow (timeout)
84	ISR(TIMER1_OVF_vect)	84	ISR(TIMER1_OVF_vect)
85	{	85	{
86	if (NewRCFrames == 0) RC_Quality /= 2;	86	if (NewRCFrames == 0) RC_Quality -= RC_Quality/8;
87	NewRCFrames = 0;	87	NewRCFrames = 0;
88	}	88	}
89		89
90		90
91	/********************************************************************/	91	/********************************************************************/
92	/* Every time a positive edge is detected at PD6 */	92	/* Every time a positive edge is detected at PD6 */
93	/********************************************************************/	93	/********************************************************************/
94	/* t-Frame	94	/* t-Frame
95	<----------------------------------------------------------------------->	95	<----------------------------------------------------------------------->
96	____ ______ _____ ________ ______ sync gap ____	96	____ ______ _____ ________ ______ sync gap ____
97	\| \| \| \| \| \| \| \| \| \| \|	97	\| \| \| \| \| \| \| \| \| \| \|
98	\| \| \| \| \| \| \| \| \| \| \|	98	\| \| \| \| \| \| \| \| \| \| \|
99	___\| \|_\| \|_\| \|_\| \|_.............\| \|________________\|	99	___\| \|_\| \|_\| \|_\| \|_.............\| \|________________\|
100	<-----><-------><------><--------> <------> <---	100	<-----><-------><------><--------> <------> <---
101	t0 t1 t2 t4 tn t0	101	t0 t1 t2 t4 tn t0
102		102
103	The PPM-Frame length is 22.5 ms.	103	The PPM-Frame length is 22.5 ms.
104	Channel high pulse width range is 0.7 ms to 1.7 ms completed by an 0.3 ms low pulse.	104	Channel high pulse width range is 0.7 ms to 1.7 ms completed by an 0.3 ms low pulse.
105	The mininimum time delay of two events coding a channel is ( 0.7 + 0.3) ms = 1 ms.	105	The mininimum time delay of two events coding a channel is ( 0.7 + 0.3) ms = 1 ms.
106	The maximum time delay of two events coding a chanel is ( 1.7 + 0.3) ms = 2 ms.	106	The maximum time delay of two events coding a chanel is ( 1.7 + 0.3) ms = 2 ms.
107	The minimum duration of all channels at minimum value is 8 * 1 ms = 8 ms.	107	The minimum duration of all channels at minimum value is 8 * 1 ms = 8 ms.
108	The maximum duration of all channels at maximum value is 8 * 2 ms = 16 ms.	108	The maximum duration of all channels at maximum value is 8 * 2 ms = 16 ms.
109	The remaining time of (22.5 - 8 ms) ms = 14.5 ms to (22.5 - 16 ms) ms = 6.5 ms is	109	The remaining time of (22.5 - 8 ms) ms = 14.5 ms to (22.5 - 16 ms) ms = 6.5 ms is
110	the syncronization gap.	110	the syncronization gap.
111	*/	111	*/
112	ISR(TIMER1_CAPT_vect) // typical rate of 1 ms to 2 ms	112	ISR(TIMER1_CAPT_vect) // typical rate of 1 ms to 2 ms
113	{	113	{
114	int16_t signal = 0, tmp;	114	int16_t signal = 0, tmp;
115	static int16_t index;	115	static int16_t index;
116	static uint16_t oldICR1 = 0;	116	static uint16_t oldICR1 = 0;
117		117
118	// 16bit Input Capture Register ICR1 contains the timer value TCNT1	118	// 16bit Input Capture Register ICR1 contains the timer value TCNT1
119	// at the time the edge was detected	119	// at the time the edge was detected
120		120
121	// calculate the time delay to the previous event time which is stored in oldICR1	121	// calculate the time delay to the previous event time which is stored in oldICR1
122	// calculatiing the difference of the two uint16_t and converting the result to an int16_t	122	// calculatiing the difference of the two uint16_t and converting the result to an int16_t
123	// implicit handles a timer overflow 65535 -> 0 the right way.	123	// implicit handles a timer overflow 65535 -> 0 the right way.
124	signal = (uint16_t) ICR1 - oldICR1;	124	signal = (uint16_t) ICR1 - oldICR1;
125	oldICR1 = ICR1;	125	oldICR1 = ICR1;
126		126
127	//sync gap? (3.52 ms < signal < 25.6 ms)	127	//sync gap? (3.52 ms < signal < 25.6 ms)
128	if((signal > 1100) && (signal < 8000))	128	if((signal > 1100) && (signal < 8000))
129	{	129	{
130	// if a sync gap happens and there where at least 4 channels decoded before	130	// if a sync gap happens and there where at least 4 channels decoded before
131	// then the NewPpmData flag is reset indicating valid data in the PPM_in[] array.	131	// then the NewPpmData flag is reset indicating valid data in the PPM_in[] array.
132	if(index >= 4)	132	if(index >= 4)
133	{	133	{
134	NewPpmData = 0; // Null means NewData for the first 4 channels	134	NewPpmData = 0; // Null means NewData for the first 4 channels
135	NewRCFrames++;	135	NewRCFrames++;
136	}	136	}
137	// synchronize channel index	137	// synchronize channel index
138	index = 1;	138	index = 1;
139	}	139	}
140	else // within the PPM frame	140	else // within the PPM frame
141	{	141	{
142	if(index < 14) // PPM24 supports 12 channels	142	if(index < 14) // PPM24 supports 12 channels
143	{	143	{
144	// check for valid signal length (0.8 ms < signal < 2.1984 ms)	144	// check for valid signal length (0.8 ms < signal < 2.1984 ms)
145	// signal range is from 1.0ms/3.2us = 312 to 2.0ms/3.2us = 625	145	// signal range is from 1.0ms/3.2us = 312 to 2.0ms/3.2us = 625
146	if((signal > 250) && (signal < 687))	146	if((signal > 250) && (signal < 687))
147	{	147	{
148	// shift signal to zero symmetric range -154 to 159	148	// shift signal to zero symmetric range -154 to 159
149	signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms)	149	signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms)
150	// check for stable signal	150	// check for stable signal
151	if(abs(signal-PPM_in[index]) < 6)	151	if(abs(signal-PPM_in[index]) < 6)
152	{	152	{
153	if(RC_Quality < 200) RC_Quality +=10;	153	if(RC_Quality < 200) RC_Quality +=10;
154	}	154	}
155	// calculate exponential history for signal	155	// calculate exponential history for signal
156	tmp = (3 * (PPM_in[index]) + signal) / 4;	156	tmp = (3 * (PPM_in[index]) + signal) / 4;
157	if(tmp > signal+1) tmp--; else	157	if(tmp > signal+1) tmp--; else
158	if(tmp < signal-1) tmp++;	158	if(tmp < signal-1) tmp++;
159	// calculate signal difference on good signal level	159	// calculate signal difference on good signal level
160	if(RC_Quality >= 195) PPM_diff[index] = ((tmp - PPM_in[index]) / 3) * 3; // cut off lower 3 bit for nois reduction	160	if(RC_Quality >= 195) PPM_diff[index] = ((tmp - PPM_in[index]) / 3) * 3; // cut off lower 3 bit for nois reduction
161	else PPM_diff[index] = 0;	161	else PPM_diff[index] = 0;
162	PPM_in[index] = tmp; // update channel value	162	PPM_in[index] = tmp; // update channel value
163	}	163	}
164	index++; // next channel	164	index++; // next channel
165	// demux sum signal for channels 5 to 7 to J3, J4, J5	165	// demux sum signal for channels 5 to 7 to J3, J4, J5
166	if(index == 5) PORTD \|= (1<<PORTD5); else PORTD &= ~(1<<PORTD5);	166	if(index == 5) PORTD \|= (1<<PORTD5); else PORTD &= ~(1<<PORTD5);
167	if(index == 6) PORTD \|= (1<<PORTD4); else PORTD &= ~(1<<PORTD4);	167	if(index == 6) PORTD \|= (1<<PORTD4); else PORTD &= ~(1<<PORTD4);
168	if(BoardRelease == 10)	168	if(BoardRelease == 10)
169	{	169	{
170	if(index == 7) PORTD \|= (1<<PORTD3); else PORTD &= ~(1<<PORTD3);	170	if(index == 7) PORTD \|= (1<<PORTD3); else PORTD &= ~(1<<PORTD3);
171	}	171	}
172	}	172	}
173	}	173	}
174	if(RC_Quality) RC_Quality--;	174	if(RC_Quality) RC_Quality--;
175	}	175	}
176		176
177		177
178		178
179		179
180		180
181		181