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1 | /**************************************************************************** |
1 | /**************************************************************************** |
2 | * Copyright (C) 2009 by Claas Anders "CaScAdE" Rathje * |
2 | * Copyright (C) 2009 by Claas Anders "CaScAdE" Rathje * |
3 | * admiralcascade@gmail.com * |
3 | * admiralcascade@gmail.com * |
4 | * Project-URL: http://www.mylifesucks.de/oss/c-osd/ * |
4 | * Project-URL: http://www.mylifesucks.de/oss/c-osd/ * |
5 | * * |
5 | * * |
6 | * This program is free software; you can redistribute it and/or modify * |
6 | * This program is free software; you can redistribute it and/or modify * |
7 | * it under the terms of the GNU General Public License as published by * |
7 | * it under the terms of the GNU General Public License as published by * |
8 | * the Free Software Foundation; either version 2 of the License. * |
8 | * the Free Software Foundation; either version 2 of the License. * |
9 | * * |
9 | * * |
10 | * This program is distributed in the hope that it will be useful, * |
10 | * This program is distributed in the hope that it will be useful, * |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
13 | * GNU General Public License for more details. * |
13 | * GNU General Public License for more details. * |
14 | * * |
14 | * * |
15 | * You should have received a copy of the GNU General Public License * |
15 | * You should have received a copy of the GNU General Public License * |
16 | * along with this program; if not, write to the * |
16 | * along with this program; if not, write to the * |
17 | * Free Software Foundation, Inc., * |
17 | * Free Software Foundation, Inc., * |
18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * |
18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * |
19 | ****************************************************************************/ |
19 | ****************************************************************************/ |
20 | 20 | ||
21 | #include <avr/io.h> |
21 | #include <avr/io.h> |
22 | #include <avr/interrupt.h> |
22 | #include <avr/interrupt.h> |
23 | #include "spi.h" |
23 | #include "spi.h" |
24 | #include "main.h" |
24 | #include "main.h" |
- | 25 | ||
- | 26 | #if !(ALLCHARSDEBUG|(WRITECHARS != -1)) |
|
25 | 27 | ||
26 | volatile uint16_t icnt = 0; |
28 | volatile uint16_t icnt = 0; |
27 | volatile uint8_t request_count = 0; |
29 | volatile uint8_t request_count = 0; |
28 | volatile uint8_t spi_ready = 1; |
30 | volatile uint8_t spi_ready = 1; |
29 | volatile union SPI_buffer_t SPI_buffer; |
31 | volatile union SPI_buffer_t SPI_buffer; |
30 | int16_t ampere = 0, max_ampere = 0, s_volt; |
32 | int16_t ampere = 0, max_ampere = 0, s_volt; |
31 | int32_t ampere_wasted = 0; |
33 | int32_t ampere_wasted = 0; |
32 | 34 | ||
33 | #define INT0_HIGH PORTD |= (1 << PD2); |
35 | #define INT0_HIGH PORTD |= (1 << PD2); |
34 | #define INT0_LOW PORTD &= ~(1 << PD2); |
36 | #define INT0_LOW PORTD &= ~(1 << PD2); |
35 | 37 | ||
36 | /** |
38 | /** |
37 | * init the SPI as master |
39 | * init the SPI as master |
38 | */ |
40 | */ |
39 | void SpiMasterInit(void) { |
41 | void SpiMasterInit(void) { |
40 | volatile char IOReg; |
42 | volatile char IOReg; |
41 | // set PB4(/SS), PB5(MOSI), PB7(SCK) as output |
43 | // set PB4(/SS), PB5(MOSI), PB7(SCK) as output |
42 | DDRB = (1 << PB4) | (1 << PB5) | (1 << PB7); |
44 | DDRB = (1 << PB4) | (1 << PB5) | (1 << PB7); |
43 | PORTB |= (1 << PB4); // pullup SS |
45 | PORTB |= (1 << PB4); // pullup SS |
44 | // enable SPI Interrupt and SPI in Master Mode with SCK = CK/128 |
46 | // enable SPI Interrupt and SPI in Master Mode with SCK = CK/128 |
45 | SPCR = (1 << SPIE) | (1 << SPE) | (1 << MSTR) | (1 << SPR0) | (1 << SPR1); |
47 | SPCR = (1 << SPIE) | (1 << SPE) | (1 << MSTR) | (1 << SPR0) | (1 << SPR1); |
46 | IOReg = SPSR; // clear SPIF bit in SPSR |
48 | IOReg = SPSR; // clear SPIF bit in SPSR |
47 | IOReg = SPDR; |
49 | IOReg = SPDR; |
48 | //sei(); // we do it later |
50 | //sei(); // we do it later |
49 | } |
51 | } |
50 | 52 | ||
51 | 53 | ||
52 | /** |
54 | /** |
53 | * SPI interrupt handler |
55 | * SPI interrupt handler |
54 | */ |
56 | */ |
55 | ISR(SPI_STC_vect) { |
57 | ISR(SPI_STC_vect) { |
56 | if (request_count == 0) { |
58 | if (request_count == 0) { |
57 | SPI_buffer.buffer.chk = SPDR; // firs char received is check byte from last transfer |
59 | SPI_buffer.buffer.chk = SPDR; // firs char received is check byte from last transfer |
58 | } else { |
60 | } else { |
59 | SPI_buffer.buffer.c[request_count - 1] = SPDR; // safe received byte to buffer |
61 | SPI_buffer.buffer.c[request_count - 1] = SPDR; // safe received byte to buffer |
60 | } |
62 | } |
61 | request_count++; |
63 | request_count++; |
62 | if (--icnt) { |
64 | if (--icnt) { |
63 | //SPDR = *iptr; // send next byte |
65 | //SPDR = *iptr; // send next byte |
64 | spi_ready = 1; // we _should_ send later because the slave needs more time |
66 | spi_ready = 1; // we _should_ send later because the slave needs more time |
65 | } else { |
67 | } else { |
66 | SPCR &= ~_BV(SPIE); // deactivate interrupt |
68 | SPCR &= ~_BV(SPIE); // deactivate interrupt |
67 | INT0_HIGH // transfer is done, slave does not need to listen |
69 | INT0_HIGH // transfer is done, slave does not need to listen |
68 | } |
70 | } |
69 | } |
71 | } |
70 | 72 | ||
71 | /** |
73 | /** |
72 | * check if SPI transfer is still busy |
74 | * check if SPI transfer is still busy |
73 | */ |
75 | */ |
74 | int TransferIsBusy(void) { |
76 | int TransferIsBusy(void) { |
75 | return SPCR & _BV(SPIE); |
77 | return SPCR & _BV(SPIE); |
76 | } |
78 | } |
77 | 79 | ||
78 | /** |
80 | /** |
79 | * start a new transfer with length <len> |
81 | * start a new transfer with length <len> |
80 | */ |
82 | */ |
81 | void StartTransfer(uint16_t len) { |
83 | void StartTransfer(uint16_t len) { |
82 | INT0_LOW // /SS LOW ^= SS HIGH ^= slave should listen |
84 | INT0_LOW // /SS LOW ^= SS HIGH ^= slave should listen |
83 | 85 | ||
84 | // this is a new request |
86 | // this is a new request |
85 | request_count = 0; |
87 | request_count = 0; |
86 | 88 | ||
87 | // set up pointer and length for interrupt handler |
89 | // set up pointer and length for interrupt handler |
88 | icnt = len; |
90 | icnt = len; |
89 | 91 | ||
90 | SPCR |= _BV(SPIE); // enable spi interrupt |
92 | SPCR |= _BV(SPIE); // enable spi interrupt |
91 | SPDR = 'A'; // start transfer by first command char |
93 | SPDR = 'A'; // start transfer by first command char |
92 | } |
94 | } |
93 | 95 | ||
94 | /** |
96 | /** |
95 | * send next command through spi |
97 | * send next command through spi |
96 | */ |
98 | */ |
97 | void spi_send_next() { |
99 | void spi_send_next() { |
98 | SPDR = 'A' + request_count; |
100 | SPDR = 'A' + request_count; |
99 | } |
101 | } |
- | 102 | ||
- | 103 | #endif |
|
100 | 104 |