95,9 → 95,9 |
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// 20MHz / 32 = 625 kHz |
#ifdef __SD_INTERFACE_INVERTED |
SPCR = (1<<SPE)|(1<<MSTR)|(0<<DORD)|(1<<CPOL)|(0<<CPHA)|(1<<SPR1)|(1<<SPR0); // Enable SSC in mastermode, inverted clockpolarity (idle high) |
SPCR = (1<<SPE)|(1<<MSTR)|(0<<DORD)|(1<<CPOL)|(0<<CPHA)|(1<<SPR1)|(0<<SPR0); // Enable SSC in mastermode, inverted clockpolarity (idle high) |
#else |
SPCR = (1<<SPE)|(1<<MSTR)|(0<<DORD)|(0<<CPOL)|(0<<CPHA)|(1<<SPR1)|(1<<SPR0); // Enable SSC in mastermode, noninverted clockpolarity (idle low) |
SPCR = (1<<SPE)|(1<<MSTR)|(0<<DORD)|(0<<CPOL)|(0<<CPHA)|(1<<SPR1)|(0<<SPR0); // Enable SSC in mastermode, noninverted clockpolarity (idle low) |
#endif |
SPSR |= (1<<SPI2X); |
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