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/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
* File Name : 91x_emi.c |
* Author : MCD Application Team |
* Version : V2.1 |
* Date : 12/22/2008 |
* Description : This file provides all the EMI firmware functions. |
******************************************************************************** |
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING |
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
*******************************************************************************/ |
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/* Includes ------------------------------------------------------------------*/ |
#include "91x_emi.h" |
#include "91x_scu.h" |
/* Private typedef -----------------------------------------------------------*/ |
/* Private define ------------------------------------------------------------*/ |
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/* These constant variables are used as masks to handle the EMI registers. */ |
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#define EMI_Burst_and_PageModeRead_TL_Mask 0xFFFFF3FF |
#define EMI_Burst_and_PageModeRead_Sel_Mask 0xFFFFFEFF |
#define EMI_MemWidth_Mask 0xFFFFFFCF |
#define EMI_WriteProtect_Mask 0xFFFFFFF7 |
#define EMI_ByteLane_Mask 0xFFFFFFFE |
#define EMI_AccessRead_Dev_Mask 0xFFFFFDFF |
#define EMI_BurstModeWrite_Sel_Mask 0xFFFEFFFF |
#define EMI_AccessWrite_Dev_Mask 0xFFFDFFFF |
#define EMI_BurstModeWrite_TL_Mask 0xFFF3FFFF |
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/* Private macro -------------------------------------------------------------*/ |
/* Private variables ---------------------------------------------------------*/ |
/* Registers reset value */ |
/* Private function prototypes -----------------------------------------------*/ |
/* Private functions ---------------------------------------------------------*/ |
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/****************************************************************************** |
* Function Name : EMI_DeInit |
* Description : Deinitializes the EMI peripheral registers to their default |
* reset values. |
* Input : None |
* Output : None |
* Return : None |
*******************************************************************************/ |
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void EMI_DeInit(void) |
{ |
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SCU_AHBPeriphReset(__EMI, ENABLE); /* EMI peripheral under Reset */ |
SCU_AHBPeriphReset(__EMI,DISABLE ); /* EMI not under Reset */ |
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} |
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/******************************************************************************* |
* Function Name : EMI_StructInit |
* Description : Fills the EMI_InitTypeDef structure member with its reset |
* value. |
* Input : EMI_InitStruct : pointer to a EMI_InitTypeDef structure |
* which will be initialized. |
* Output : None |
* Return : None |
*******************************************************************************/ |
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void EMI_StructInit( EMI_InitTypeDef *EMI_InitStruct) |
{ |
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/* Number of bus turnaround cycles added between read and write accesses.*/ |
/*This member can be 0x01,0x02,0x03, ....0xF (Reset value:0xF "15 cycles"*/ |
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EMI_InitStruct->EMI_Bank_IDCY =0xF; |
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/* Number of wait states for read accesses*/ |
/*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
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EMI_InitStruct->EMI_Bank_WSTRD =0x1F; |
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/* Number of wait states for write accesses*/ |
/*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
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EMI_InitStruct->EMI_Bank_WSTWR =0x1F; |
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/*Output enable assertion delay from chip select assertion*/ |
/*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x01 "1 cycle"*/ |
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EMI_InitStruct->EMI_Bank_WSTROEN =0x01; |
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/*Write enable assertion delay from chip select assertion*/ |
/*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x00 "0 cycle"*/ |
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EMI_InitStruct->EMI_Bank_WSTWEN =0x00; |
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/*Number of wait states for burst read accesses after the first read.*/ |
/* They do not apply to non-burst devices.*/ |
/*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
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EMI_InitStruct->EMI_Bank_BRDCR =0x1F; |
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/*This member Controls the memory width*/ |
/*This member can be :"EMI_Width_Byte" = 8 bits width or "EMI_Width_HalfWord" = 16 bits width*/ |
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EMI_InitStruct->EMI_Bank_MemWidth = EMI_Width_Byte; |
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/*Write protection feature */ |
/*This member can be :"EMI_Bank_NonWriteProtect" = No write protection or "EMI_Bank_WriteProtect" = bank is write protected*/ |
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EMI_InitStruct-> EMI_Bank_WriteProtection= EMI_Bank_NonWriteProtect; |
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/* Burst Read or page mode transfer length */ |
/*This member can be :"EMI_Read_4Data" or "EMI_Read_8Data" for page mode*/ |
/*Read and it can be "EMI_Read_4Data","EMI_Read_8Data","EMI_Read_16Data" */ |
/*or "EMI_Read_Continuous"(synchronous only) for burst mode read*/ |
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EMI_InitStruct->EMI_Burst_and_PageModeRead_TransferLength= EMI_Read_4Data; |
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/*Select or deselect the Burst and page mode read*/ |
/*This member can be :"EMI_NormalMode" or "EMI_BurstModeRead" */ |
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EMI_InitStruct->EMI_Burst_and_PageModeRead_Selection = EMI_NormalMode; |
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/* Enables the byte select signals in 16-bit PSRAM bus mode*/ |
/*(EMI_UBn and EMI_LBn) are enabled. Bit 2 in the GPIO EMI register */ |
/*(SCU_EMI) must also be set to 1 */ |
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EMI_InitStruct->EMI_ByteLane_Selection=EMI_Byte_Select_disabled; |
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/*Access the device using synchronous accesses for reads*/ |
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EMI_InitStruct-> EMI_AccessRead_Support=EMI_Read_Asyn; |
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/*Access the device using synchronous accesses for Write*/ |
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EMI_InitStruct->EMI_AccessWrite_Support=EMI_Write_Asyn; |
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/* Burst Write transfer length */ |
/*This member can be :"EMI_Write_4Data", "EMI_Write_8Data" or */ |
/*"EMI_Write_Continuous" for synchronous only*/ |
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EMI_InitStruct->EMI_BurstModeWrite_TransferLength = EMI_Write_4Data; |
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/* Select burst or non-burst write to memory*/ |
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EMI_InitStruct-> EMI_BurstModeWrite_Selection=EMI_NonBurstModeWrite; |
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} |
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/******************************************************************************* |
* Function Name : EMI_Init |
* Description : Initializes EMI peripheral according to the specified |
* parameters in the EMI_InitStruct. |
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* Input : EMI_Bankx:where x can be 0,1,2 or 3 to select the EMI Bank. |
EMI_InitStruct: pointer to a EMI_InitTypeDef structure |
( Structure Config to be loaded in EMI Registers). . |
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* Output : None |
* Return : None |
*******************************************************************************/ |
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void EMI_Init( EMI_Bank_TypeDef* EMI_Bankx, EMI_InitTypeDef* EMI_InitStruct) |
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{ |
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EMI_Bankx->ICR = EMI_InitStruct-> EMI_Bank_IDCY ; |
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EMI_Bankx->RCR = EMI_InitStruct->EMI_Bank_WSTRD ; |
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EMI_Bankx->WCR = EMI_InitStruct->EMI_Bank_WSTWR ; |
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EMI_Bankx->OECR = EMI_InitStruct->EMI_Bank_WSTROEN; |
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EMI_Bankx->WECR = EMI_InitStruct->EMI_Bank_WSTWEN ; |
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EMI_Bankx->BRDCR = EMI_InitStruct->EMI_Bank_BRDCR ; |
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EMI_Bankx->BCR &= EMI_MemWidth_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_MemWidth; |
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EMI_Bankx->BCR &= EMI_WriteProtect_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_WriteProtection; |
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EMI_Bankx->BCR &= EMI_Burst_and_PageModeRead_TL_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_Burst_and_PageModeRead_TransferLength; |
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EMI_Bankx->BCR &= EMI_Burst_and_PageModeRead_Sel_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_Burst_and_PageModeRead_Selection; |
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EMI_Bankx->BCR &= EMI_BurstModeWrite_TL_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_BurstModeWrite_TransferLength; |
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EMI_Bankx->BCR &= EMI_BurstModeWrite_Sel_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_BurstModeWrite_Selection; |
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EMI_Bankx->BCR &= EMI_ByteLane_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_ByteLane_Selection; |
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EMI_Bankx->BCR &= EMI_AccessRead_Dev_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_AccessRead_Support; |
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EMI_Bankx->BCR &= EMI_AccessWrite_Dev_Mask; |
EMI_Bankx->BCR |= EMI_InitStruct->EMI_AccessWrite_Support; |
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} |
/******************************************************************************* |
* Function Name : EMI_BCLKCmd |
* Description : Enable or Disable the activation of BCLK clock (LFBGA only) |
* Input : NewState : ENABLE or DISABLE |
* Output : None |
* Return : None |
*******************************************************************************/ |
void EMI_BCLKCmd(FunctionalState NewState) |
{ |
if (NewState == ENABLE) |
*EMI_CCR |=0x1; |
else |
*EMI_CCR &=~0x1; |
} |
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/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ |