/branches/V0.70d Code Redesign killagreg/timer0.c |
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52,18 → 52,6 |
DDRB |= (1<<DDB4)|(1<<DDB3); |
PORTB &= ~((1<<PORTB4)|(1<<PORTB3)); |
if(BoardRelease == 10) |
{ |
DDRD |= (1<<DDD2); |
PORTD &= ~(1<<PORTD2); |
} |
else |
{ |
DDRC |= (1<<DDC7); |
PORTC &= ~(1<<PORTC7); |
} |
// Timer/Counter 0 Control Register A |
// Waveform Generation Mode is Fast PWM (Bits WGM02 = 0, WGM01 = 1, WGM00 = 1) |