WebSVN - Projects - Blame - Rev 14 - /IR-TX-BL/tags/V0.02/IR-Tx_V0

Rev	Author	Line No.	Line
14	walter	1
		2	IR-Tx_V0_02.elf: file format elf32-avr
		3
		4	Sections:
		5	Idx Name Size VMA LMA File off Algn
		6
		7	CONTENTS, ALLOC, LOAD, READONLY, CODE
		8	1 .data 00000006 00800060 00000664 000006f8 2**0
		9	CONTENTS, ALLOC, LOAD, DATA
		10	2 .bss 00000015 00800066 00800066 000006fe 2**0
		11	ALLOC
		12	3 .stab 00000378 00000000 00000000 00000700 2**2
		13	CONTENTS, READONLY, DEBUGGING
		14	4 .stabstr 00000071 00000000 00000000 00000a78 2**0
		15	CONTENTS, READONLY, DEBUGGING
		16	5 .debug_aranges 00000040 00000000 00000000 00000ae9 2**0
		17	CONTENTS, READONLY, DEBUGGING
		18	6 .debug_pubnames 000000ff 00000000 00000000 00000b29 2**0
		19	CONTENTS, READONLY, DEBUGGING
		20	7 .debug_info 0000036d 00000000 00000000 00000c28 2**0
		21	CONTENTS, READONLY, DEBUGGING
		22	8 .debug_abbrev 000001b4 00000000 00000000 00000f95 2**0
		23	CONTENTS, READONLY, DEBUGGING
		24	9 .debug_line 0000059c 00000000 00000000 00001149 2**0
		25	CONTENTS, READONLY, DEBUGGING
		26	10 .debug_frame 000000c0 00000000 00000000 000016e8 2**2
		27	CONTENTS, READONLY, DEBUGGING
		28	11 .debug_str 00000146 00000000 00000000 000017a8 2**0
		29	CONTENTS, READONLY, DEBUGGING
		30	12 .debug_loc 00000130 00000000 00000000 000018ee 2**0
		31	CONTENTS, READONLY, DEBUGGING
		32	Disassembly of section .text:
		33
		34	00000000 <__vectors>:
		35	0: 12 c0 rjmp .+36 ; 0x26 <__ctors_end>
		36	2: 2c c0 rjmp .+88 ; 0x5c <__bad_interrupt>
		37	4: 2b c0 rjmp .+86 ; 0x5c <__bad_interrupt>
		38	6: 2a c0 rjmp .+84 ; 0x5c <__bad_interrupt>
		39	8: 29 c0 rjmp .+82 ; 0x5c <__bad_interrupt>
		40	a: 3a c0 rjmp .+116 ; 0x80 <__vector_5>
		41	c: 27 c0 rjmp .+78 ; 0x5c <__bad_interrupt>
		42	e: 26 c0 rjmp .+76 ; 0x5c <__bad_interrupt>
		43	10: 26 c0 rjmp .+76 ; 0x5e <__vector_8>
		44	12: ac c0 rjmp .+344 ; 0x16c <__vector_9>
		45	14: 23 c0 rjmp .+70 ; 0x5c <__bad_interrupt>
		46	16: 22 c0 rjmp .+68 ; 0x5c <__bad_interrupt>
		47	18: 21 c0 rjmp .+66 ; 0x5c <__bad_interrupt>
		48	1a: 20 c0 rjmp .+64 ; 0x5c <__bad_interrupt>
		49	1c: 1f c0 rjmp .+62 ; 0x5c <__bad_interrupt>
		50	1e: 1e c0 rjmp .+60 ; 0x5c <__bad_interrupt>
		51	20: 1d c0 rjmp .+58 ; 0x5c <__bad_interrupt>
		52	22: 1c c0 rjmp .+56 ; 0x5c <__bad_interrupt>
		53	24: 1b c0 rjmp .+54 ; 0x5c <__bad_interrupt>
		54
		55	00000026 <__ctors_end>:
		56	26: 11 24 eor r1, r1
		57	28: 1f be out 0x3f, r1 ; 63
		58	2a: cf e5 ldi r28, 0x5F ; 95
		59	2c: d4 e0 ldi r29, 0x04 ; 4
		60	2e: de bf out 0x3e, r29 ; 62
		61	30: cd bf out 0x3d, r28 ; 61
		62
		63	00000032 <__do_copy_data>:
		64	32: 10 e0 ldi r17, 0x00 ; 0
		65	34: a0 e6 ldi r26, 0x60 ; 96
		66	36: b0 e0 ldi r27, 0x00 ; 0
		67	38: e4 e6 ldi r30, 0x64 ; 100
		68	3a: f6 e0 ldi r31, 0x06 ; 6
		69	3c: 02 c0 rjmp .+4 ; 0x42 <.do_copy_data_start>
		70
		71	0000003e <.do_copy_data_loop>:
		72	3e: 05 90 lpm r0, Z+
		73	40: 0d 92 st X+, r0
		74
		75	00000042 <.do_copy_data_start>:
		76	42: a6 36 cpi r26, 0x66 ; 102
		77	44: b1 07 cpc r27, r17
		78	46: d9 f7 brne .-10 ; 0x3e <.do_copy_data_loop>
		79
		80	00000048 <__do_clear_bss>:
		81	48: 10 e0 ldi r17, 0x00 ; 0
		82	4a: a6 e6 ldi r26, 0x66 ; 102
		83	4c: b0 e0 ldi r27, 0x00 ; 0
		84	4e: 01 c0 rjmp .+2 ; 0x52 <.do_clear_bss_start>
		85
		86	00000050 <.do_clear_bss_loop>:
		87	50: 1d 92 st X+, r1
		88
		89	00000052 <.do_clear_bss_start>:
		90	52: ab 37 cpi r26, 0x7B ; 123
		91	54: b1 07 cpc r27, r17
		92	56: e1 f7 brne .-8 ; 0x50 <.do_clear_bss_loop>
		93	58: 18 d1 rcall .+560 ; 0x28a <main>
		94	5a: 03 c3 rjmp .+1542 ; 0x662 <_exit>
		95
		96	0000005c <__bad_interrupt>:
		97	5c: d1 cf rjmp .-94 ; 0x0 <__vectors>
		98
		99	0000005e <__vector_8>:
		100	volatile unsigned char IRbit = 0;
		101
		102
		103	SIGNAL(SIG_OVERFLOW1)
		104	{
		105	5e: 1f 92 push r1
		106	60: 0f 92 push r0
		107	62: 0f b6 in r0, 0x3f ; 63
		108	64: 0f 92 push r0
		109	66: 11 24 eor r1, r1
		110	68: 8f 93 push r24
		111	TMR1OvF++;
		112	6a: 80 91 69 00 lds r24, 0x0069
		113	6e: 8f 5f subi r24, 0xFF ; 255
		114	70: 80 93 69 00 sts 0x0069, r24
		115	74: 8f 91 pop r24
		116	76: 0f 90 pop r0
		117	78: 0f be out 0x3f, r0 ; 63
		118	7a: 0f 90 pop r0
		119	7c: 1f 90 pop r1
		120	7e: 18 95 reti
		121
		122	00000080 <__vector_5>:
		123	}
		124
		125
		126	SIGNAL(SIG_INPUT_CAPTURE1)
		127	{
		128	80: 1f 92 push r1
		129	82: 0f 92 push r0
		130	84: 0f b6 in r0, 0x3f ; 63
		131	86: 0f 92 push r0
		132	88: 11 24 eor r1, r1
		133	8a: 2f 93 push r18
		134	8c: 3f 93 push r19
		135	8e: 4f 93 push r20
		136	90: 8f 93 push r24
		137	92: 9f 93 push r25
		138	static unsigned int pos_ICR;
		139	static unsigned int ppm;
		140
		141	if ((TCCR1B & (1<<ICES1)) != 0)
		142	94: 0e b4 in r0, 0x2e ; 46
		143	96: 06 fe sbrs r0, 6
		144	98: 0c c0 rjmp .+24 ; 0xb2 <__vector_5+0x32>
		145	{
		146	TCCR1B &= ~(1<<ICES1); //invert trigger
		147	9a: 8e b5 in r24, 0x2e ; 46
		148	9c: 8f 7b andi r24, 0xBF ; 191
		149	9e: 8e bd out 0x2e, r24 ; 46
		150	TMR1OvF = 0;
		151	a0: 10 92 69 00 sts 0x0069, r1
		152	pos_ICR = ICR1;
		153	a4: 86 b5 in r24, 0x26 ; 38
		154	a6: 97 b5 in r25, 0x27 ; 39
		155	a8: 90 93 70 00 sts 0x0070, r25
		156	ac: 80 93 6f 00 sts 0x006F, r24
		157	b0: 49 c0 rjmp .+146 ; 0x144 <__vector_5+0xc4>
		158	}
		159	else //Negative Flanke
		160	{
		161	TCCR1B \|= (1<<ICES1);
		162	b2: 8e b5 in r24, 0x2e ; 46
		163	b4: 80 64 ori r24, 0x40 ; 64
		164	b6: 8e bd out 0x2e, r24 ; 46
		165	ppm = (ICR1 - pos_ICR + (int) TMR1OvF * 65536);
		166	b8: 26 b5 in r18, 0x26 ; 38
		167	ba: 37 b5 in r19, 0x27 ; 39
		168	bc: 80 91 69 00 lds r24, 0x0069
		169	c0: 80 91 6f 00 lds r24, 0x006F
		170	c4: 90 91 70 00 lds r25, 0x0070
		171	c8: 28 1b sub r18, r24
		172	ca: 39 0b sbc r19, r25
		173	cc: 30 93 6e 00 sts 0x006E, r19
		174	d0: 20 93 6d 00 sts 0x006D, r18
		175	if ((ppm > 600) && (ppm < 2400))
		176	d4: c9 01 movw r24, r18
		177	d6: 89 55 subi r24, 0x59 ; 89
		178	d8: 92 40 sbci r25, 0x02 ; 2
		179	da: 87 50 subi r24, 0x07 ; 7
		180	dc: 97 40 sbci r25, 0x07 ; 7
		181	de: 90 f5 brcc .+100 ; 0x144 <__vector_5+0xc4>
		182	{
		183	if (ppm > 2100) ppm = 2100;
		184	e0: 88 e0 ldi r24, 0x08 ; 8
		185	e2: 25 33 cpi r18, 0x35 ; 53
		186	e4: 38 07 cpc r19, r24
		187	e6: 18 f0 brcs .+6 ; 0xee <__vector_5+0x6e>
		188	e8: 84 e3 ldi r24, 0x34 ; 52
		189	ea: 98 e0 ldi r25, 0x08 ; 8
		190	ec: 05 c0 rjmp .+10 ; 0xf8 <__vector_5+0x78>
		191	if (ppm < 900) ppm = 900;
		192	ee: 24 58 subi r18, 0x84 ; 132
		193	f0: 33 40 sbci r19, 0x03 ; 3
		194	f2: 30 f4 brcc .+12 ; 0x100 <__vector_5+0x80>
		195	f4: 84 e8 ldi r24, 0x84 ; 132
		196	f6: 93 e0 ldi r25, 0x03 ; 3
		197	f8: 90 93 6e 00 sts 0x006E, r25
		198	fc: 80 93 6d 00 sts 0x006D, r24
		199	ppm = (ppm_signal * 7 + ppm) / 8;
		200	100: 20 91 66 00 lds r18, 0x0066
		201	104: 30 91 67 00 lds r19, 0x0067
		202	108: c9 01 movw r24, r18
		203	10a: 43 e0 ldi r20, 0x03 ; 3
		204	10c: 88 0f add r24, r24
		205	10e: 99 1f adc r25, r25
		206	110: 4a 95 dec r20
		207	112: e1 f7 brne .-8 ; 0x10c <__vector_5+0x8c>
		208	114: 82 1b sub r24, r18
		209	116: 93 0b sbc r25, r19
		210	118: 20 91 6d 00 lds r18, 0x006D
		211	11c: 30 91 6e 00 lds r19, 0x006E
		212	120: 82 0f add r24, r18
		213	122: 93 1f adc r25, r19
		214	124: 23 e0 ldi r18, 0x03 ; 3
		215	126: 96 95 lsr r25
		216	128: 87 95 ror r24
		217	12a: 2a 95 dec r18
		218	12c: e1 f7 brne .-8 ; 0x126 <__vector_5+0xa6>
		219	12e: 90 93 6e 00 sts 0x006E, r25
		220	132: 80 93 6d 00 sts 0x006D, r24
		221	ppm_signal = ppm;
		222	136: 90 93 67 00 sts 0x0067, r25
		223	13a: 80 93 66 00 sts 0x0066, r24
		224	ppm_new = 1;
		225	13e: 81 e0 ldi r24, 0x01 ; 1
		226	140: 80 93 68 00 sts 0x0068, r24
		227	144: 9f 91 pop r25
		228	146: 8f 91 pop r24
		229	148: 4f 91 pop r20
		230	14a: 3f 91 pop r19
		231	14c: 2f 91 pop r18
		232	14e: 0f 90 pop r0
		233	150: 0f be out 0x3f, r0 ; 63
		234	152: 0f 90 pop r0
		235	154: 1f 90 pop r1
		236	156: 18 95 reti
		237
		238	00000158 <StartIRModulation>:
		239	}
		240
		241	}
		242
		243	}
		244
		245
		246
		247	/##############################################################################/
		248	void StartIRModulation(void)
		249	{
		250	158: 89 e0 ldi r24, 0x09 ; 9
		251	15a: 85 bd out 0x25, r24 ; 37
		252	//Timer1 Config for generation the 38Khz IR Modulation
		253	TCCR2 = (0<<FOC2)\|(0<<WGM20)\|(0<<COM21)\|(0<<COM20)\|
		254	(1<<WGM21) \|(0<<CS22) \|(0<<CS21) \|(1<<CS20);
		255
		256	OCR2 = 108; //~38Khz @ 8Mhz
		257	15c: 8c e6 ldi r24, 0x6C ; 108
		258	15e: 83 bd out 0x23, r24 ; 35
		259
		260	//Timer 0 Config for getting right timing for IR Pattern
		261	TCCR0 = (1<<CS02)\|(0<<CS01)\|(1<<CS00); // clk(@8MHz) / 1024 = 128us / clk (resolution)
		262	160: 85 e0 ldi r24, 0x05 ; 5
		263	162: 83 bf out 0x33, r24 ; 51
		264	TIMSK &= ~(1<<TOIE0); //
		265	164: 89 b7 in r24, 0x39 ; 57
		266	166: 8e 7f andi r24, 0xFE ; 254
		267	168: 89 bf out 0x39, r24 ; 57
		268	16a: 08 95 ret
		269
		270	0000016c <__vector_9>:
		271
		272	}
		273
		274
		275	SIGNAL(SIG_OVERFLOW0)
		276	{
		277	16c: 1f 92 push r1
		278	16e: 0f 92 push r0
		279	170: 0f b6 in r0, 0x3f ; 63
		280	172: 0f 92 push r0
		281	174: 11 24 eor r1, r1
		282	176: 8f 93 push r24
		283	178: 9f 93 push r25
		284
		285	switch (IRstate)
		286	17a: 90 91 6a 00 lds r25, 0x006A
		287	17e: 92 30 cpi r25, 0x02 ; 2
		288	180: b1 f0 breq .+44 ; 0x1ae <__vector_9+0x42>
		289	182: 93 30 cpi r25, 0x03 ; 3
		290	184: 20 f4 brcc .+8 ; 0x18e <__vector_9+0x22>
		291	186: 91 30 cpi r25, 0x01 ; 1
		292	188: 09 f0 breq .+2 ; 0x18c <__vector_9+0x20>
		293	18a: 52 c0 rjmp .+164 ; 0x230 <__vector_9+0xc4>
		294	18c: 06 c0 rjmp .+12 ; 0x19a <__vector_9+0x2e>
		295	18e: 93 30 cpi r25, 0x03 ; 3
		296	190: e9 f0 breq .+58 ; 0x1cc <__vector_9+0x60>
		297	192: 94 30 cpi r25, 0x04 ; 4
		298	194: 09 f0 breq .+2 ; 0x198 <__vector_9+0x2c>
		299	196: 4c c0 rjmp .+152 ; 0x230 <__vector_9+0xc4>
		300	198: 36 c0 rjmp .+108 ; 0x206 <__vector_9+0x9a>
		301	{
		302	case 1:
		303	TCCR2 setbit (1<<COM20);
		304	19a: 85 b5 in r24, 0x25 ; 37
		305	19c: 80 61 ori r24, 0x10 ; 16
		306	19e: 85 bd out 0x25, r24 ; 37
		307	IRstate = 2;
		308	1a0: 82 e0 ldi r24, 0x02 ; 2
		309	1a2: 80 93 6a 00 sts 0x006A, r24
		310	IRbit = 0;
		311	1a6: 10 92 6c 00 sts 0x006C, r1
		312	TCNT0 = 255 - (13000 / 128);
		313	1aa: 8a e9 ldi r24, 0x9A ; 154
		314	1ac: 0b c0 rjmp .+22 ; 0x1c4 <__vector_9+0x58>
		315	break;
		316	case 2:
		317	TCCR2 clrbit (1<<COM20);
		318	1ae: 85 b5 in r24, 0x25 ; 37
		319	1b0: 8f 7e andi r24, 0xEF ; 239
		320	1b2: 85 bd out 0x25, r24 ; 37
		321	IRstate = 3;
		322	1b4: 83 e0 ldi r24, 0x03 ; 3
		323	1b6: 80 93 6a 00 sts 0x006A, r24
		324	if ((IRdat & 0x40) == 0) TCNT0 = 255 - (1000 / 128);
		325	1ba: 80 91 6b 00 lds r24, 0x006B
		326	1be: 86 fd sbrc r24, 6
		327	1c0: 03 c0 rjmp .+6 ; 0x1c8 <__vector_9+0x5c>
		328	1c2: 88 ef ldi r24, 0xF8 ; 248
		329	1c4: 82 bf out 0x32, r24 ; 50
		330	1c6: 39 c0 rjmp .+114 ; 0x23a <__vector_9+0xce>
		331	else TCNT0 = 255 - (3000 / 128);
		332	1c8: 88 ee ldi r24, 0xE8 ; 232
		333	1ca: fc cf rjmp .-8 ; 0x1c4 <__vector_9+0x58>
		334	break;
		335	case 3:
		336	TCCR2 setbit (1<<COM20);
		337	1cc: 85 b5 in r24, 0x25 ; 37
		338	1ce: 80 61 ori r24, 0x10 ; 16
		339	1d0: 85 bd out 0x25, r24 ; 37
		340	TCNT0 = 255 - (1000 / 128);
		341	1d2: 88 ef ldi r24, 0xF8 ; 248
		342	1d4: 82 bf out 0x32, r24 ; 50
		343	IRdat = IRdat << 1;
		344	1d6: 80 91 6b 00 lds r24, 0x006B
		345	1da: 88 0f add r24, r24
		346	1dc: 80 93 6b 00 sts 0x006B, r24
		347	IRbit++;
		348	1e0: 80 91 6c 00 lds r24, 0x006C
		349	1e4: 8f 5f subi r24, 0xFF ; 255
		350	1e6: 80 93 6c 00 sts 0x006C, r24
		351	if (IRbit < 7) IRstate = 2;
		352	1ea: 80 91 6c 00 lds r24, 0x006C
		353	1ee: 87 30 cpi r24, 0x07 ; 7
		354	1f0: 20 f4 brcc .+8 ; 0x1fa <__vector_9+0x8e>
		355	1f2: 82 e0 ldi r24, 0x02 ; 2
		356	1f4: 80 93 6a 00 sts 0x006A, r24
		357	1f8: 20 c0 rjmp .+64 ; 0x23a <__vector_9+0xce>
		358	else
		359	{
		360	IRstate = 4;
		361	1fa: 84 e0 ldi r24, 0x04 ; 4
		362	1fc: 80 93 6a 00 sts 0x006A, r24
		363	IRbit = 0;
		364	200: 10 92 6c 00 sts 0x006C, r1
		365	204: 1a c0 rjmp .+52 ; 0x23a <__vector_9+0xce>
		366	}
		367	break;
		368	case 4:
		369	TCCR2 clrbit (1<<COM20);
		370	206: 85 b5 in r24, 0x25 ; 37
		371	208: 8f 7e andi r24, 0xEF ; 239
		372	20a: 85 bd out 0x25, r24 ; 37
		373	TCNT0 = 255 - (25000 / 128);
		374	20c: 8c e3 ldi r24, 0x3C ; 60
		375	20e: 82 bf out 0x32, r24 ; 50
		376	if (IRbit < 20) IRstate = 4;
		377	210: 80 91 6c 00 lds r24, 0x006C
		378	214: 84 31 cpi r24, 0x14 ; 20
		379	216: 18 f4 brcc .+6 ; 0x21e <__vector_9+0xb2>
		380	218: 90 93 6a 00 sts 0x006A, r25
		381	21c: 03 c0 rjmp .+6 ; 0x224 <__vector_9+0xb8>
		382	else IRstate = 5;
		383	21e: 85 e0 ldi r24, 0x05 ; 5
		384	220: 80 93 6a 00 sts 0x006A, r24
		385	IRbit++;
		386	224: 80 91 6c 00 lds r24, 0x006C
		387	228: 8f 5f subi r24, 0xFF ; 255
		388	22a: 80 93 6c 00 sts 0x006C, r24
		389	22e: 05 c0 rjmp .+10 ; 0x23a <__vector_9+0xce>
		390	break;
		391	default:
		392	TIMSK &= ~(1<<TOIE0);
		393	230: 89 b7 in r24, 0x39 ; 57
		394	232: 8e 7f andi r24, 0xFE ; 254
		395	234: 89 bf out 0x39, r24 ; 57
		396	IRstate = 0;
		397	236: 10 92 6a 00 sts 0x006A, r1
		398	23a: 9f 91 pop r25
		399	23c: 8f 91 pop r24
		400	23e: 0f 90 pop r0
		401	240: 0f be out 0x3f, r0 ; 63
		402	242: 0f 90 pop r0
		403	244: 1f 90 pop r1
		404	246: 18 95 reti
		405
		406	00000248 <SendIRSignal>:
		407	break;
		408
		409	}
		410
		411	}
		412
		413
		414
		415
		416
		417	/##############################################################################/
		418	void SendIRSignal(unsigned char txbyte)
		419	{
		420	248: 98 2f mov r25, r24
		421	while (IRstate != 0) {} //IR already in action ?, if so, wait
		422	24a: 80 91 6a 00 lds r24, 0x006A
		423	24e: 88 23 and r24, r24
		424	250: e1 f7 brne .-8 ; 0x24a <SendIRSignal+0x2>
		425	IRstate = 1; //initial State
		426	252: 81 e0 ldi r24, 0x01 ; 1
		427	254: 80 93 6a 00 sts 0x006A, r24
		428	IRdat = txbyte; //copy IR Data
		429	258: 90 93 6b 00 sts 0x006B, r25
		430	TIFR &= TOV0; //set TMR0 Int Flag
		431	25c: 88 b7 in r24, 0x38 ; 56
		432	25e: 18 be out 0x38, r1 ; 56
		433	TIMSK setbit (1<<TOIE0); //Enable TMR0 Int
		434	260: 89 b7 in r24, 0x39 ; 57
		435	262: 81 60 ori r24, 0x01 ; 1
		436	264: 89 bf out 0x39, r24 ; 57
		437	266: 08 95 ret
		438
		439	00000268 <StartPPM>:
		440	}
		441
		442
		443
		444
		445
		446
		447
		448	/##############################################################################/
		449	void StartPPM(void)
		450	{
		451	268: 1f bc out 0x2f, r1 ; 47
		452
		453	//global timer1 Config
		454	TCCR1A = (0<<COM1A1)\|(0<<COM1A0)\|(0<<COM1B1)\|(0<<COM1B0)\|
		455	(0<<FOC1A) \|(0<<FOC1B) \|(0<<WGM10) \|(0<<WGM11);
		456	TCCR1B = (1<<ICNC1)\|(1<<ICES1)\|(0<<WGM13)\|
		457	26a: 82 ec ldi r24, 0xC2 ; 194
		458	26c: 8e bd out 0x2e, r24 ; 46
		459	(0<<WGM12)\|(0<<CS12)\|(1<<CS11)\|(0<<CS10); //ICP_POS_FLANKE
		460
		461	// interrupts
		462	TIMSK \|= (1<<TICIE1)\|(1<<TOIE1); //ICP_INT_ENABLE and TIMER1_INT_ENABLE
		463	26e: 89 b7 in r24, 0x39 ; 57
		464	270: 84 62 ori r24, 0x24 ; 36
		465	272: 89 bf out 0x39, r24 ; 57
		466	274: 08 95 ret
		467
		468	00000276 <GetPPM>:
		469
		470	}
		471
		472
		473	int GetPPM(void)
		474	{
		475	276: 29 b7 in r18, 0x39 ; 57
		476	//this routines seems to be nesseccary, as reading a 16 bit value
		477	//on a 8 bit machine is not atomic, so if an interrupt apears between reading
		478	//low and high byte of the 16 bit value a wrong result is possible
		479
		480	unsigned char intmask;
		481	unsigned int ppm_temp;
		482
		483	intmask = TIMSK; //backup interupt enable bits
		484	TIMSK &= ~(1<<TICIE1); //disable ppm interrupt
		485	278: 89 b7 in r24, 0x39 ; 57
		486	27a: 8f 7d andi r24, 0xDF ; 223
		487	27c: 89 bf out 0x39, r24 ; 57
		488	ppm_temp = ppm_signal;
		489	27e: 80 91 66 00 lds r24, 0x0066
		490	282: 90 91 67 00 lds r25, 0x0067
		491	TIMSK = intmask; //restore interupt enable bits
		492	286: 29 bf out 0x39, r18 ; 57
		493	288: 08 95 ret
		494
		495	0000028a <main>:
		496	return(ppm_temp); //return ppm_signal
		497
		498	}
		499
		500
		501	/##############################################################################/
		502	// MAIN
		503	/##############################################################################/
		504	int main (void)
		505	{
		506	28a: 88 e0 ldi r24, 0x08 ; 8
		507	28c: 84 bb out 0x14, r24 ; 20
		508
		509	DDRC = (1<<ledred);
		510	PORTC = 0x00;
		511	28e: 15 ba out 0x15, r1 ; 21
		512	DDRD = (1<<ledgreen);
		513	290: 80 e8 ldi r24, 0x80 ; 128
		514	292: 81 bb out 0x11, r24 ; 17
		515	PORTD = 0x00;
		516	294: 12 ba out 0x12, r1 ; 18
		517	DDRB = (1<<1)\|(1<<2)\|(1<<3);
		518	296: 8e e0 ldi r24, 0x0E ; 14
		519	298: 87 bb out 0x17, r24 ; 23
		520	PORTB = 0x00;
		521	29a: 18 ba out 0x18, r1 ; 24
		522
		523
		524	StartUART();
		525	29c: 54 d0 rcall .+168 ; 0x346 <StartUART>
		526	29e: 1f bc out 0x2f, r1 ; 47
		527	2a0: 82 ec ldi r24, 0xC2 ; 194
		528	2a2: 8e bd out 0x2e, r24 ; 46
		529	2a4: 89 b7 in r24, 0x39 ; 57
		530	2a6: 84 62 ori r24, 0x24 ; 36
		531	2a8: 89 bf out 0x39, r24 ; 57
		532	StartPPM();
		533	StartIRModulation();
		534	2aa: 56 df rcall .-340 ; 0x158 <StartIRModulation>
		535	sei();
		536	2ac: 78 94 sei
		537
		538
		539	while (1)
		540	{
		541	//printf("%d ",ppm_signal);
		542	if (ppm_new == 1)
		543	2ae: 80 91 68 00 lds r24, 0x0068
		544	2b2: 81 30 cpi r24, 0x01 ; 1
		545	2b4: e1 f7 brne .-8 ; 0x2ae <main+0x24>
		546	{
		547	ppm_new = 0;
		548	2b6: 10 92 68 00 sts 0x0068, r1
		549	2ba: 89 b7 in r24, 0x39 ; 57
		550	2bc: 99 b7 in r25, 0x39 ; 57
		551	2be: 9f 7d andi r25, 0xDF ; 223
		552	2c0: 99 bf out 0x39, r25 ; 57
		553	2c2: 20 91 66 00 lds r18, 0x0066
		554	2c6: 30 91 67 00 lds r19, 0x0067
		555	2ca: 89 bf out 0x39, r24 ; 57
		556	if (GetPPM() > 1750)
		557	2cc: 27 5d subi r18, 0xD7 ; 215
		558	2ce: 36 40 sbci r19, 0x06 ; 6
		559	2d0: 84 f0 brlt .+32 ; 0x2f2 <main+0x68>
		560	{
		561	SendIRSignal(ZOOM);
		562	2d2: 81 e4 ldi r24, 0x41 ; 65
		563	2d4: b9 df rcall .-142 ; 0x248 <SendIRSignal>
		564	PORTC \|= (1<<ledred);
		565	2d6: ab 9a sbi 0x15, 3 ; 21
		566	2d8: 89 b7 in r24, 0x39 ; 57
		567	2da: 99 b7 in r25, 0x39 ; 57
		568	2dc: 9f 7d andi r25, 0xDF ; 223
		569	2de: 99 bf out 0x39, r25 ; 57
		570	2e0: 20 91 66 00 lds r18, 0x0066
		571	2e4: 30 91 67 00 lds r19, 0x0067
		572	2e8: 89 bf out 0x39, r24 ; 57
		573	while (GetPPM() > 1650) {}
		574	2ea: 23 57 subi r18, 0x73 ; 115
		575	2ec: 36 40 sbci r19, 0x06 ; 6
		576	2ee: a4 f7 brge .-24 ; 0x2d8 <main+0x4e>
		577	PORTC &= ~(1<<ledred);
		578	2f0: ab 98 cbi 0x15, 3 ; 21
		579	2f2: 89 b7 in r24, 0x39 ; 57
		580	2f4: 99 b7 in r25, 0x39 ; 57
		581	2f6: 9f 7d andi r25, 0xDF ; 223
		582	2f8: 99 bf out 0x39, r25 ; 57
		583	2fa: 20 91 66 00 lds r18, 0x0066
		584	2fe: 30 91 67 00 lds r19, 0x0067
		585	302: 89 bf out 0x39, r24 ; 57
		586	}
		587
		588	if (GetPPM() < 1250)
		589	304: 22 5e subi r18, 0xE2 ; 226
		590	306: 34 40 sbci r19, 0x04 ; 4
		591	308: 94 f6 brge .-92 ; 0x2ae <main+0x24>
		592	{
		593	PORTD \|= (1<<ledgreen);
		594	30a: 97 9a sbi 0x12, 7 ; 18
		595	SendIRSignal(TRIGGER);
		596	30c: 80 e4 ldi r24, 0x40 ; 64
		597	30e: 9c df rcall .-200 ; 0x248 <SendIRSignal>
		598	310: 89 b7 in r24, 0x39 ; 57
		599	312: 99 b7 in r25, 0x39 ; 57
		600	314: 9f 7d andi r25, 0xDF ; 223
		601	316: 99 bf out 0x39, r25 ; 57
		602	318: 20 91 66 00 lds r18, 0x0066
		603	31c: 30 91 67 00 lds r19, 0x0067
		604	320: 89 bf out 0x39, r24 ; 57
		605	while (GetPPM() < 1350) {}
		606	322: 26 54 subi r18, 0x46 ; 70
		607	324: 35 40 sbci r19, 0x05 ; 5
		608	326: a4 f3 brlt .-24 ; 0x310 <main+0x86>
		609	PORTD &= ~(1<<ledgreen);
		610	328: 97 98 cbi 0x12, 7 ; 18
		611	32a: c1 cf rjmp .-126 ; 0x2ae <main+0x24>
		612
		613	0000032c <uart_putchar>:
		614
		615	}
		616
		617	int uart_putchar (char c)
		618	{
		619	32c: 1f 93 push r17
		620	32e: 18 2f mov r17, r24
		621	if (c == '\n') uart_putchar('\r');
		622	330: 8a 30 cpi r24, 0x0A ; 10
		623	332: 11 f4 brne .+4 ; 0x338 <uart_putchar+0xc>
		624	334: 8d e0 ldi r24, 0x0D ; 13
		625	336: fa df rcall .-12 ; 0x32c <uart_putchar>
		626	loop_until_bit_is_set(UCSRA, UDRE);
		627	338: 5d 9b sbis 0x0b, 5 ; 11
		628	33a: fe cf rjmp .-4 ; 0x338 <uart_putchar+0xc>
		629	UDR = c;
		630	33c: 1c b9 out 0x0c, r17 ; 12
		631
		632	return (0);
		633	}
		634	33e: 80 e0 ldi r24, 0x00 ; 0
		635	340: 90 e0 ldi r25, 0x00 ; 0
		636	342: 1f 91 pop r17
		637	344: 08 95 ret
		638
		639	00000346 <StartUART>:
		640	346: 59 9a sbi 0x0b, 1 ; 11
		641	348: 88 e1 ldi r24, 0x18 ; 24
		642	34a: 8a b9 out 0x0a, r24 ; 10
		643	34c: 86 e8 ldi r24, 0x86 ; 134
		644	34e: 80 bd out 0x20, r24 ; 32
		645	350: 89 e1 ldi r24, 0x19 ; 25
		646	352: 89 b9 out 0x09, r24 ; 9
		647	354: 60 e0 ldi r22, 0x00 ; 0
		648	356: 70 e0 ldi r23, 0x00 ; 0
		649	358: 86 e9 ldi r24, 0x96 ; 150
		650	35a: 91 e0 ldi r25, 0x01 ; 1
		651	35c: 01 d0 rcall .+2 ; 0x360 <fdevopen>
		652	35e: 08 95 ret
		653
		654	00000360 <fdevopen>:
		655	360: ef 92 push r14
		656	362: ff 92 push r15
		657	364: 0f 93 push r16
		658	366: 1f 93 push r17
		659	368: cf 93 push r28
		660	36a: df 93 push r29
		661	36c: 8c 01 movw r16, r24
		662	36e: 7b 01 movw r14, r22
		663	370: 89 2b or r24, r25
		664	372: 11 f4 brne .+4 ; 0x378 <fdevopen+0x18>
		665	374: 67 2b or r22, r23
		666	376: c9 f1 breq .+114 ; 0x3ea <fdevopen+0x8a>
		667	378: 6e e0 ldi r22, 0x0E ; 14
		668	37a: 70 e0 ldi r23, 0x00 ; 0
		669	37c: 81 e0 ldi r24, 0x01 ; 1
		670	37e: 90 e0 ldi r25, 0x00 ; 0
		671	380: 3b d0 rcall .+118 ; 0x3f8 <calloc>
		672	382: fc 01 movw r30, r24
		673	384: 00 97 sbiw r24, 0x00 ; 0
		674	386: 89 f1 breq .+98 ; 0x3ea <fdevopen+0x8a>
		675	388: dc 01 movw r26, r24
		676	38a: 80 e8 ldi r24, 0x80 ; 128
		677	38c: 83 83 std Z+3, r24 ; 0x03
		678	38e: e1 14 cp r14, r1
		679	390: f1 04 cpc r15, r1
		680	392: 71 f0 breq .+28 ; 0x3b0 <fdevopen+0x50>
		681	394: f3 86 std Z+11, r15 ; 0x0b
		682	396: e2 86 std Z+10, r14 ; 0x0a
		683	398: 81 e8 ldi r24, 0x81 ; 129
		684	39a: 83 83 std Z+3, r24 ; 0x03
		685	39c: 80 91 71 00 lds r24, 0x0071
		686	3a0: 90 91 72 00 lds r25, 0x0072
		687	3a4: 89 2b or r24, r25
		688	3a6: 21 f4 brne .+8 ; 0x3b0 <fdevopen+0x50>
		689	3a8: f0 93 72 00 sts 0x0072, r31
		690	3ac: e0 93 71 00 sts 0x0071, r30
		691	3b0: 01 15 cp r16, r1
		692	3b2: 11 05 cpc r17, r1
		693	3b4: e1 f0 breq .+56 ; 0x3ee <fdevopen+0x8e>
		694	3b6: 11 87 std Z+9, r17 ; 0x09
		695	3b8: 00 87 std Z+8, r16 ; 0x08
		696	3ba: 83 81 ldd r24, Z+3 ; 0x03
		697	3bc: 82 60 ori r24, 0x02 ; 2
		698	3be: 83 83 std Z+3, r24 ; 0x03
		699	3c0: 80 91 73 00 lds r24, 0x0073
		700	3c4: 90 91 74 00 lds r25, 0x0074
		701	3c8: 89 2b or r24, r25
		702	3ca: 89 f4 brne .+34 ; 0x3ee <fdevopen+0x8e>
		703	3cc: f0 93 74 00 sts 0x0074, r31
		704	3d0: e0 93 73 00 sts 0x0073, r30
		705	3d4: 80 91 75 00 lds r24, 0x0075
		706	3d8: 90 91 76 00 lds r25, 0x0076
		707	3dc: 89 2b or r24, r25
		708	3de: 39 f4 brne .+14 ; 0x3ee <fdevopen+0x8e>
		709	3e0: f0 93 76 00 sts 0x0076, r31
		710	3e4: e0 93 75 00 sts 0x0075, r30
		711	3e8: 02 c0 rjmp .+4 ; 0x3ee <fdevopen+0x8e>
		712	3ea: a0 e0 ldi r26, 0x00 ; 0
		713	3ec: b0 e0 ldi r27, 0x00 ; 0
		714	3ee: cd 01 movw r24, r26
		715	3f0: e6 e0 ldi r30, 0x06 ; 6
		716	3f2: cd b7 in r28, 0x3d ; 61
		717	3f4: de b7 in r29, 0x3e ; 62
		718	3f6: 26 c1 rjmp .+588 ; 0x644 <__epilogue_restores__+0x18>
		719
		720	000003f8 <calloc>:
		721	3f8: 0f 93 push r16
		722	3fa: 1f 93 push r17
		723	3fc: cf 93 push r28
		724	3fe: df 93 push r29
		725	400: 86 9f mul r24, r22
		726	402: 80 01 movw r16, r0
		727	404: 87 9f mul r24, r23
		728	406: 10 0d add r17, r0
		729	408: 96 9f mul r25, r22
		730	40a: 10 0d add r17, r0
		731	40c: 11 24 eor r1, r1
		732	40e: c8 01 movw r24, r16
		733	410: 0d d0 rcall .+26 ; 0x42c <malloc>
		734	412: ec 01 movw r28, r24
		735	414: 00 97 sbiw r24, 0x00 ; 0
		736	416: 21 f0 breq .+8 ; 0x420 <calloc+0x28>
		737	418: a8 01 movw r20, r16
		738	41a: 60 e0 ldi r22, 0x00 ; 0
		739	41c: 70 e0 ldi r23, 0x00 ; 0
		740	41e: ff d0 rcall .+510 ; 0x61e <memset>
		741	420: ce 01 movw r24, r28
		742	422: df 91 pop r29
		743	424: cf 91 pop r28
		744	426: 1f 91 pop r17
		745	428: 0f 91 pop r16
		746	42a: 08 95 ret
		747
		748	0000042c <malloc>:
		749	42c: cf 93 push r28
		750	42e: df 93 push r29
		751	430: ac 01 movw r20, r24
		752	432: 02 97 sbiw r24, 0x02 ; 2
		753	434: 10 f4 brcc .+4 ; 0x43a <malloc+0xe>
		754	436: 42 e0 ldi r20, 0x02 ; 2
		755	438: 50 e0 ldi r21, 0x00 ; 0
		756	43a: a0 91 79 00 lds r26, 0x0079
		757	43e: b0 91 7a 00 lds r27, 0x007A
		758	442: fd 01 movw r30, r26
		759	444: c0 e0 ldi r28, 0x00 ; 0
		760	446: d0 e0 ldi r29, 0x00 ; 0
		761	448: 20 e0 ldi r18, 0x00 ; 0
		762	44a: 30 e0 ldi r19, 0x00 ; 0
		763	44c: 20 c0 rjmp .+64 ; 0x48e <__stack+0x2f>
		764	44e: 80 81 ld r24, Z
		765	450: 91 81 ldd r25, Z+1 ; 0x01
		766	452: 84 17 cp r24, r20
		767	454: 95 07 cpc r25, r21
		768	456: 69 f4 brne .+26 ; 0x472 <__stack+0x13>
		769	458: 82 81 ldd r24, Z+2 ; 0x02
		770	45a: 93 81 ldd r25, Z+3 ; 0x03
		771	45c: 20 97 sbiw r28, 0x00 ; 0
		772	45e: 19 f0 breq .+6 ; 0x466 <__stack+0x7>
		773	460: 9b 83 std Y+3, r25 ; 0x03
		774	462: 8a 83 std Y+2, r24 ; 0x02
		775	464: 04 c0 rjmp .+8 ; 0x46e <__stack+0xf>
		776	466: 90 93 7a 00 sts 0x007A, r25
		777	46a: 80 93 79 00 sts 0x0079, r24
		778	46e: cf 01 movw r24, r30
		779	470: 32 c0 rjmp .+100 ; 0x4d6 <__stack+0x77>
		780	472: 48 17 cp r20, r24
		781	474: 59 07 cpc r21, r25
		782	476: 38 f4 brcc .+14 ; 0x486 <__stack+0x27>
		783	478: 21 15 cp r18, r1
		784	47a: 31 05 cpc r19, r1
		785	47c: 19 f0 breq .+6 ; 0x484 <__stack+0x25>
		786	47e: 82 17 cp r24, r18
		787	480: 93 07 cpc r25, r19
		788	482: 08 f4 brcc .+2 ; 0x486 <__stack+0x27>
		789	484: 9c 01 movw r18, r24
		790	486: ef 01 movw r28, r30
		791	488: 02 80 ldd r0, Z+2 ; 0x02
		792	48a: f3 81 ldd r31, Z+3 ; 0x03
		793	48c: e0 2d mov r30, r0
		794	48e: 30 97 sbiw r30, 0x00 ; 0
		795	490: f1 f6 brne .-68 ; 0x44e <malloc+0x22>
		796	492: 21 15 cp r18, r1
		797	494: 31 05 cpc r19, r1
		798	496: 89 f1 breq .+98 ; 0x4fa <__stack+0x9b>
		799	498: c9 01 movw r24, r18
		800	49a: 84 1b sub r24, r20
		801	49c: 95 0b sbc r25, r21
		802	49e: 04 97 sbiw r24, 0x04 ; 4
		803	4a0: 08 f4 brcc .+2 ; 0x4a4 <__stack+0x45>
		804	4a2: a9 01 movw r20, r18
		805	4a4: e0 e0 ldi r30, 0x00 ; 0
		806	4a6: f0 e0 ldi r31, 0x00 ; 0
		807	4a8: 26 c0 rjmp .+76 ; 0x4f6 <__stack+0x97>
		808	4aa: 8d 91 ld r24, X+
		809	4ac: 9c 91 ld r25, X
		810	4ae: 11 97 sbiw r26, 0x01 ; 1
		811	4b0: 82 17 cp r24, r18
		812	4b2: 93 07 cpc r25, r19
		813	4b4: e9 f4 brne .+58 ; 0x4f0 <__stack+0x91>
		814	4b6: 48 17 cp r20, r24
		815	4b8: 59 07 cpc r21, r25
		816	4ba: 79 f4 brne .+30 ; 0x4da <__stack+0x7b>
		817	4bc: ed 01 movw r28, r26
		818	4be: 8a 81 ldd r24, Y+2 ; 0x02
		819	4c0: 9b 81 ldd r25, Y+3 ; 0x03
		820	4c2: 30 97 sbiw r30, 0x00 ; 0
		821	4c4: 19 f0 breq .+6 ; 0x4cc <__stack+0x6d>
		822	4c6: 93 83 std Z+3, r25 ; 0x03
		823	4c8: 82 83 std Z+2, r24 ; 0x02
		824	4ca: 04 c0 rjmp .+8 ; 0x4d4 <__stack+0x75>
		825	4cc: 90 93 7a 00 sts 0x007A, r25
		826	4d0: 80 93 79 00 sts 0x0079, r24
		827	4d4: cd 01 movw r24, r26
		828	4d6: 02 96 adiw r24, 0x02 ; 2
		829	4d8: 49 c0 rjmp .+146 ; 0x56c <__stack+0x10d>
		830	4da: 84 1b sub r24, r20
		831	4dc: 95 0b sbc r25, r21
		832	4de: fd 01 movw r30, r26
		833	4e0: e8 0f add r30, r24
		834	4e2: f9 1f adc r31, r25
		835	4e4: 41 93 st Z+, r20
		836	4e6: 51 93 st Z+, r21
		837	4e8: 02 97 sbiw r24, 0x02 ; 2
		838	4ea: 8d 93 st X+, r24
		839	4ec: 9c 93 st X, r25
		840	4ee: 3a c0 rjmp .+116 ; 0x564 <__stack+0x105>
		841	4f0: fd 01 movw r30, r26
		842	4f2: a2 81 ldd r26, Z+2 ; 0x02
		843	4f4: b3 81 ldd r27, Z+3 ; 0x03
		844	4f6: 10 97 sbiw r26, 0x00 ; 0
		845	4f8: c1 f6 brne .-80 ; 0x4aa <__stack+0x4b>
		846	4fa: 80 91 77 00 lds r24, 0x0077
		847	4fe: 90 91 78 00 lds r25, 0x0078
		848	502: 89 2b or r24, r25
		849	504: 41 f4 brne .+16 ; 0x516 <__stack+0xb7>
		850	506: 80 91 62 00 lds r24, 0x0062
		851	50a: 90 91 63 00 lds r25, 0x0063
		852	50e: 90 93 78 00 sts 0x0078, r25
		853	512: 80 93 77 00 sts 0x0077, r24
		854	516: 20 91 64 00 lds r18, 0x0064
		855	51a: 30 91 65 00 lds r19, 0x0065
		856	51e: 21 15 cp r18, r1
		857	520: 31 05 cpc r19, r1
		858	522: 41 f4 brne .+16 ; 0x534 <__stack+0xd5>
		859	524: 2d b7 in r18, 0x3d ; 61
		860	526: 3e b7 in r19, 0x3e ; 62
		861	528: 80 91 60 00 lds r24, 0x0060
		862	52c: 90 91 61 00 lds r25, 0x0061
		863	530: 28 1b sub r18, r24
		864	532: 39 0b sbc r19, r25
		865	534: e0 91 77 00 lds r30, 0x0077
		866	538: f0 91 78 00 lds r31, 0x0078
		867	53c: 2e 1b sub r18, r30
		868	53e: 3f 0b sbc r19, r31
		869	540: 24 17 cp r18, r20
		870	542: 35 07 cpc r19, r21
		871	544: 88 f0 brcs .+34 ; 0x568 <__stack+0x109>
		872	546: ca 01 movw r24, r20
		873	548: 02 96 adiw r24, 0x02 ; 2
		874	54a: 28 17 cp r18, r24
		875	54c: 39 07 cpc r19, r25
		876	54e: 60 f0 brcs .+24 ; 0x568 <__stack+0x109>
		877	550: cf 01 movw r24, r30
		878	552: 84 0f add r24, r20
		879	554: 95 1f adc r25, r21
		880	556: 02 96 adiw r24, 0x02 ; 2
		881	558: 90 93 78 00 sts 0x0078, r25
		882	55c: 80 93 77 00 sts 0x0077, r24
		883	560: 41 93 st Z+, r20
		884	562: 51 93 st Z+, r21
		885	564: cf 01 movw r24, r30
		886	566: 02 c0 rjmp .+4 ; 0x56c <__stack+0x10d>
		887	568: 80 e0 ldi r24, 0x00 ; 0
		888	56a: 90 e0 ldi r25, 0x00 ; 0
		889	56c: df 91 pop r29
		890	56e: cf 91 pop r28
		891	570: 08 95 ret
		892
		893	00000572 <free>:
		894	572: cf 93 push r28
		895	574: df 93 push r29
		896	576: 00 97 sbiw r24, 0x00 ; 0
		897	578: 09 f4 brne .+2 ; 0x57c <free+0xa>
		898	57a: 4e c0 rjmp .+156 ; 0x618 <free+0xa6>
		899	57c: ec 01 movw r28, r24
		900	57e: 22 97 sbiw r28, 0x02 ; 2
		901	580: 1b 82 std Y+3, r1 ; 0x03
		902	582: 1a 82 std Y+2, r1 ; 0x02
		903	584: a0 91 79 00 lds r26, 0x0079
		904	588: b0 91 7a 00 lds r27, 0x007A
		905	58c: 10 97 sbiw r26, 0x00 ; 0
		906	58e: 11 f1 breq .+68 ; 0x5d4 <free+0x62>
		907	590: 40 e0 ldi r20, 0x00 ; 0
		908	592: 50 e0 ldi r21, 0x00 ; 0
		909	594: 01 c0 rjmp .+2 ; 0x598 <free+0x26>
		910	596: dc 01 movw r26, r24
		911	598: ac 17 cp r26, r28
		912	59a: bd 07 cpc r27, r29
		913	59c: 00 f1 brcs .+64 ; 0x5de <free+0x6c>
		914	59e: bb 83 std Y+3, r27 ; 0x03
		915	5a0: aa 83 std Y+2, r26 ; 0x02
		916	5a2: fe 01 movw r30, r28
		917	5a4: 21 91 ld r18, Z+
		918	5a6: 31 91 ld r19, Z+
		919	5a8: e2 0f add r30, r18
		920	5aa: f3 1f adc r31, r19
		921	5ac: ea 17 cp r30, r26
		922	5ae: fb 07 cpc r31, r27
		923	5b0: 71 f4 brne .+28 ; 0x5ce <free+0x5c>
		924	5b2: 2e 5f subi r18, 0xFE ; 254
		925	5b4: 3f 4f sbci r19, 0xFF ; 255
		926	5b6: 8d 91 ld r24, X+
		927	5b8: 9c 91 ld r25, X
		928	5ba: 11 97 sbiw r26, 0x01 ; 1
		929	5bc: 82 0f add r24, r18
		930	5be: 93 1f adc r25, r19
		931	5c0: 99 83 std Y+1, r25 ; 0x01
		932	5c2: 88 83 st Y, r24
		933	5c4: fd 01 movw r30, r26
		934	5c6: 82 81 ldd r24, Z+2 ; 0x02
		935	5c8: 93 81 ldd r25, Z+3 ; 0x03
		936	5ca: 9b 83 std Y+3, r25 ; 0x03
		937	5cc: 8a 83 std Y+2, r24 ; 0x02
		938	5ce: 41 15 cp r20, r1
		939	5d0: 51 05 cpc r21, r1
		940	5d2: 59 f4 brne .+22 ; 0x5ea <free+0x78>
		941	5d4: d0 93 7a 00 sts 0x007A, r29
		942	5d8: c0 93 79 00 sts 0x0079, r28
		943	5dc: 1d c0 rjmp .+58 ; 0x618 <free+0xa6>
		944	5de: fd 01 movw r30, r26
		945	5e0: 82 81 ldd r24, Z+2 ; 0x02
		946	5e2: 93 81 ldd r25, Z+3 ; 0x03
		947	5e4: ad 01 movw r20, r26
		948	5e6: 00 97 sbiw r24, 0x00 ; 0
		949	5e8: b1 f6 brne .-84 ; 0x596 <free+0x24>
		950	5ea: fa 01 movw r30, r20
		951	5ec: d3 83 std Z+3, r29 ; 0x03
		952	5ee: c2 83 std Z+2, r28 ; 0x02
		953	5f0: 21 91 ld r18, Z+
		954	5f2: 31 91 ld r19, Z+
		955	5f4: e2 0f add r30, r18
		956	5f6: f3 1f adc r31, r19
		957	5f8: ec 17 cp r30, r28
		958	5fa: fd 07 cpc r31, r29
		959	5fc: 69 f4 brne .+26 ; 0x618 <free+0xa6>
		960	5fe: 2e 5f subi r18, 0xFE ; 254
		961	600: 3f 4f sbci r19, 0xFF ; 255
		962	602: 88 81 ld r24, Y
		963	604: 99 81 ldd r25, Y+1 ; 0x01
		964	606: 82 0f add r24, r18
		965	608: 93 1f adc r25, r19
		966	60a: fa 01 movw r30, r20
		967	60c: 91 83 std Z+1, r25 ; 0x01
		968	60e: 80 83 st Z, r24
		969	610: 8a 81 ldd r24, Y+2 ; 0x02
		970	612: 9b 81 ldd r25, Y+3 ; 0x03
		971	614: 93 83 std Z+3, r25 ; 0x03
		972	616: 82 83 std Z+2, r24 ; 0x02
		973	618: df 91 pop r29
		974	61a: cf 91 pop r28
		975	61c: 08 95 ret
		976
		977	0000061e <memset>:
		978	61e: dc 01 movw r26, r24
		979	620: 01 c0 rjmp .+2 ; 0x624 <memset+0x6>
		980	622: 6d 93 st X+, r22
		981	624: 41 50 subi r20, 0x01 ; 1
		982	626: 50 40 sbci r21, 0x00 ; 0
		983	628: e0 f7 brcc .-8 ; 0x622 <memset+0x4>
		984	62a: 08 95 ret
		985
		986	0000062c <__epilogue_restores__>:
		987	62c: 2a 88 ldd r2, Y+18 ; 0x12
		988	62e: 39 88 ldd r3, Y+17 ; 0x11
		989	630: 48 88 ldd r4, Y+16 ; 0x10
		990	632: 5f 84 ldd r5, Y+15 ; 0x0f
		991	634: 6e 84 ldd r6, Y+14 ; 0x0e
		992	636: 7d 84 ldd r7, Y+13 ; 0x0d
		993	638: 8c 84 ldd r8, Y+12 ; 0x0c
		994	63a: 9b 84 ldd r9, Y+11 ; 0x0b
		995	63c: aa 84 ldd r10, Y+10 ; 0x0a
		996	63e: b9 84 ldd r11, Y+9 ; 0x09
		997	640: c8 84 ldd r12, Y+8 ; 0x08
		998	642: df 80 ldd r13, Y+7 ; 0x07
		999	644: ee 80 ldd r14, Y+6 ; 0x06
		1000	646: fd 80 ldd r15, Y+5 ; 0x05
		1001	648: 0c 81 ldd r16, Y+4 ; 0x04
		1002	64a: 1b 81 ldd r17, Y+3 ; 0x03
		1003	64c: aa 81 ldd r26, Y+2 ; 0x02
		1004	64e: b9 81 ldd r27, Y+1 ; 0x01
		1005	650: ce 0f add r28, r30
		1006	652: d1 1d adc r29, r1
		1007	654: 0f b6 in r0, 0x3f ; 63
		1008	656: f8 94 cli
		1009	658: de bf out 0x3e, r29 ; 62
		1010	65a: 0f be out 0x3f, r0 ; 63
		1011	65c: cd bf out 0x3d, r28 ; 61
		1012	65e: ed 01 movw r28, r26
		1013	660: 08 95 ret
		1014
		1015	00000662 <_exit>:
		1016	662: ff cf rjmp .-2 ; 0x662 <_exit>

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