WebSVN - Projects - Blame - Rev 52 - /IR-TX-BL/branches/LED-CTRL

Rev	Author	Line No.	Line
28	walter	1	//############################################################################
51	walter	2	// - PWM CTRL
		3	// - Main
28	walter	4	// - ATMEGA8 mit 8MHz
		5	// - Nur f�r den privaten Gebrauch
		6	// - Keine Garantie auf Fehlerfreiheit
		7	// - Kommerzielle Nutzung nur mit meiner Zustimmung
		8	// - walter Meyer @ www.freakware.de
		9	// - 11.12.2007
		10	// - Make sure Fuses are programmed for internal 8 MHz RC Oscilator
		11	//############################################################################*/
		12
		13	#include "main.h"
		14	#include "uart.h"
		15	#include "twislave.h"
		16
		17	volatile unsigned int ppm_signal = 1500;
		18	volatile unsigned char ppm_new = 0;
		19	volatile unsigned char TMR1OvF = 0;
51	walter	20	volatile unsigned int TMR1MS;
28	walter	21	volatile unsigned char ch0;
		22	volatile unsigned char ch1;
		23	volatile unsigned char ch2;
		24	volatile unsigned char ch3;
		25	volatile unsigned char ch4;
		26	volatile unsigned char ch5;
52	walter	27	volatile unsigned char ch0_tmp;
		28	volatile unsigned char ch1_tmp;
		29	volatile unsigned char ch2_tmp;
		30	volatile unsigned char ch3_tmp;
		31	volatile unsigned char ch4_tmp;
		32	volatile unsigned char ch5_tmp;
		33
		34
51	walter	35	unsigned int timer;
28	walter	36
		37	SIGNAL(SIG_OVERFLOW1)
		38	{
		39	TMR1OvF++;
		40	}
		41
		42
		43	SIGNAL(SIG_INPUT_CAPTURE1)
		44	{
		45	static unsigned int pos_ICR;
		46	static unsigned int ppm;
		47
		48	if ((TCCR1B & (1<<ICES1)) != 0) //rising edge
		49	{
		50	TCCR1B &= ~(1<<ICES1); //set falling egde
		51	TMR1OvF = 0;
		52	pos_ICR = ICR1;
		53	}
		54	else //falling edge
		55	{
		56	TCCR1B \|= (1<<ICES1); //set rising egde
		57	ppm = (ICR1 - pos_ICR + (int) TMR1OvF * 65536);
		58	if ((ppm > 600) && (ppm < 2400))
		59	{
		60	if (ppm > 2100) ppm = 2100;
		61	if (ppm < 900) ppm = 900;
		62	ppm = (ppm_signal * 7 + ppm) / 8;
		63	ppm_signal = ppm;
		64	ppm_new = 1;
		65	}
		66
		67	}
		68
		69	}
		70
		71
		72
		73
		74
		75	SIGNAL(SIG_OVERFLOW0)
		76	{
52	walter	77	// this function is called every 32us,
		78	// it is very important that it's execution time is as short as possible
		79	// currently it's about 20us
		80
		81	static unsigned char counter = 254;
		82	static unsigned char ms1 = 0;
28	walter	83	unsigned char PORTB_BAK;
		84	unsigned char PORTD_BAK;
		85
		86	PORTB_BAK = PORTB;
		87	PORTD_BAK = PORTD;
		88
51	walter	89	if (counter++ == 254)
28	walter	90	{
51	walter	91	PORTB_BAK LEDON (CH0_B \| CH1_B \| CH2_B);
		92	PORTD_BAK LEDON (CH3_D \| CH4_D \| CH5_D);
52	walter	93	ch0_tmp = ch0;
		94	ch1_tmp = ch1;
		95	ch2_tmp = ch2;
		96	ch3_tmp = ch3;
		97	ch4_tmp = ch4;
		98	ch5_tmp = ch5;
51	walter	99	counter = 0;
28	walter	100	}
		101
52	walter	102	if (ch0_tmp == counter) PORTB_BAK LEDOFF CH0_B;
		103	if (ch1_tmp == counter) PORTB_BAK LEDOFF CH1_B;
		104	if (ch2_tmp == counter) PORTB_BAK LEDOFF CH2_B;
		105	if (ch3_tmp == counter) PORTD_BAK LEDOFF CH3_D;
		106	if (ch4_tmp == counter) PORTD_BAK LEDOFF CH4_D;
		107	if (ch5_tmp == counter) PORTD_BAK LEDOFF CH5_D;
51	walter	108
		109	PORTB = PORTB_BAK;
		110	PORTD = PORTD_BAK;
28	walter	111
51	walter	112	if (ms1++ == 32)
28	walter	113	{
51	walter	114	ms1=0;
		115	TMR1MS++;
28	walter	116	}
51	walter	117
28	walter	118
		119
		120
51	walter	121	}
28	walter	122
		123
		124
51	walter	125	unsigned int SetDelay (unsigned int t)
		126	{
		127	unsigned char temp_hi;
		128	unsigned char temp_lo;
28	walter	129
51	walter	130	temp_hi = (TMR1MS >> 8);
		131	temp_lo = (TMR1MS & 0xff);
		132	if (temp_hi != (TMR1MS >> 8)) temp_hi = (TMR1MS >> 8);
28	walter	133
51	walter	134	return(((temp_hi << 8) \| temp_lo) + t + 1);
28	walter	135
51	walter	136	}
28	walter	137
		138
51	walter	139	char CheckDelay(unsigned int t)
		140	{
		141	unsigned char temp_hi;
		142	unsigned char temp_lo;
		143
		144	temp_hi = (TMR1MS >> 8);
		145	temp_lo = (TMR1MS & 0xff);
		146	if (temp_hi != (TMR1MS >> 8)) temp_hi = (TMR1MS >> 8);
		147
		148	return(((t - ((temp_hi << 8) \| temp_lo)) & 0x8000) >> 9);
		149
28	walter	150	}
		151
		152
		153
		154
		155	/##############################################################################/
51	walter	156	void StartPWM(void)
28	walter	157	{
		158	//Timer 0 Config for getting right timing for IR Pattern
		159	TCCR0 = (0<<CS02)\|(0<<CS01)\|(1<<CS00); // (@8MHz) = 1/8us Clk = 256/8 = 32us overflow
		160	TIMSK setbit (1<<TOIE0); // enable Int
		161
		162	}
		163
		164
		165
		166	/##############################################################################/
		167	void StartPPM(void)
		168	{
		169
		170	//global timer1 Config
		171	TCCR1A = (0<<COM1A1)\|(0<<COM1A0)\|(0<<COM1B1)\|(0<<COM1B0)\|
		172	(0<<FOC1A) \|(0<<FOC1B) \|(0<<WGM10) \|(0<<WGM11);
		173	TCCR1B = (1<<ICNC1)\|(1<<ICES1)\|(0<<WGM13)\|
		174	(0<<WGM12)\|(0<<CS12)\|(1<<CS11)\|(0<<CS10); //ICP_POS_FLANKE
		175
		176	// interrupts
		177	TIMSK \|= (1<<TICIE1)\|(1<<TOIE1); //ICP_INT_ENABLE and TIMER1_INT_ENABLE
		178
		179	}
		180
		181
		182
52	walter	183	/##############################################################################/
28	walter	184	int GetPPM(void)
		185	{
		186	//this routines seems to be nesseccary, as reading a 16 bit value
		187	//on a 8 bit machine is not atomic, so if an interrupt apears between reading
		188	//low and high byte of the 16 bit value a wrong result is possible
		189
		190	unsigned char intmask;
		191	unsigned int ppm_temp;
		192
		193	intmask = TIMSK; //backup interupt enable bits
		194	TIMSK &= ~(1<<TICIE1); //disable ppm interrupt
		195	ppm_temp = ppm_signal;
		196	TIMSK = intmask; //restore interupt enable bits
		197	return(ppm_temp); //return ppm_signal
		198
		199	}
		200
		201
		202	/##############################################################################/
		203	// MAIN
		204	/##############################################################################/
		205	int main (void)
		206	{
51	walter	207	unsigned int i;
		208	unsigned char colorState;
52	walter	209	unsigned char nextcolorState=0;
28	walter	210
51	walter	211	DDRB = (CH0_B\|CH1_B\|CH2_B);
		212	PORTB = 0x00;
		213
		214	DDRC = (ledred);
28	walter	215	PORTC = 0x00;
51	walter	216
		217	DDRD = (ledgreen\|CH3_D\|CH4_D\|CH5_D);
28	walter	218	PORTD = 0x00;
		219
		220	ch0 = 0;
		221	ch1 = 0;
		222	ch2 = 0;
		223	ch3 = 0;
		224	ch4 = 0;
		225	ch5 = 0;
		226
		227	//StartUART();
		228	StartPPM();
51	walter	229	//StartI2C();
28	walter	230	StartPWM();
		231	sei();
		232
51	walter	233
52	walter	234	// Farbablauf: rot > Violett > blau > tuerkis > gruen > gelb >
51	walter	235
		236
		237	colorState = 0;
28	walter	238
		239	while (1)
		240	{
51	walter	241
28	walter	242	//printf("%d ",ppm_signal);
		243
51	walter	244	for (i=0; i<=255; i++)
		245	{
		246	switch(colorState)
		247	{
		248	case 0:
52	walter	249	ch0 = i; //fade in (ch0) red
51	walter	250	nextcolorState = 2;
		251	break;
28	walter	252
51	walter	253	case 2:
52	walter	254	ch1 = i; //fade in (ch1) blue to get pure purple (red + blue)
51	walter	255	nextcolorState = 4;
		256	break;
		257
		258	case 4:
		259	ch0 = 255 - i; //fade out (ch0) red to get pure blue
		260	nextcolorState = 6;
		261	break;
		262
		263	case 6:
52	walter	264	ch2 = i; //fade in (ch2) green to get pure cyan (blue + green)
51	walter	265	nextcolorState = 8;
		266	break;
		267
		268	case 8:
		269	ch1 = 255 - i; //fade out (ch1) blue to get pure green
		270	nextcolorState = 10;
		271	break;
		272
		273	case 10:
52	walter	274	ch0 = i; //fade in (ch0) red to get yellow pure (green + red)
51	walter	275	nextcolorState = 12;
		276	break;
		277
		278	case 12:
		279	ch2 = 255 - i; //fade out (ch2) green to get pure red
		280	nextcolorState = 0;
		281	break;
		282	}
		283
		284
52	walter	285	timer = SetDelay(5); //wait 10ms
51	walter	286	while (!CheckDelay(timer));
		287	}
		288
		289	colorState = nextcolorState;
52	walter	290
		291	timer = SetDelay(3); //hold pure colors for additional 3ms
51	walter	292	while (!CheckDelay(timer));
		293
		294
28	walter	295	}
		296
		297
		298	}
52	walter	299
		300
		301
		302	/*
		303	170 00fa 1F92 push __zero_reg__
		304	171 00fc 0F92 push __tmp_reg__
		305	172 00fe 0FB6 in __tmp_reg__,__SREG__
		306	173 0100 0F92 push __tmp_reg__
		307	174 0102 1124 clr __zero_reg__
		308	175 0104 2F93 push r18
		309	176 0106 3F93 push r19
		310	177 0108 8F93 push r24
		311	178 010a 9F93 push r25
		312	181 010c 38B3 in r19,56-0x20
		313	184 010e 22B3 in r18,50-0x20
		314	187 0110 8091 0000 lds r24,counter.1797
		315	188 0114 8F5F subi r24,lo8(-(1))
		316	189 0116 8093 0000 sts counter.1797,r24
		317	190 011a 8F3F cpi r24,lo8(-1)
		318	191 011c 01F4 brne .L15
		319	193 011e 3E60 ori r19,lo8(14)
		320	195 0120 2863 ori r18,lo8(56)
		321	197 0122 8091 0000 lds r24,ch0
		322	198 0126 8093 0000 sts ch0_tmp,r24
		323	200 012a 8091 0000 lds r24,ch1
		324	201 012e 8093 0000 sts ch1_tmp,r24
		325	203 0132 8091 0000 lds r24,ch2
		326	204 0136 8093 0000 sts ch2_tmp,r24
		327	206 013a 8091 0000 lds r24,ch3
		328	207 013e 8093 0000 sts ch3_tmp,r24
		329	209 0142 8091 0000 lds r24,ch4
		330	210 0146 8093 0000 sts ch4_tmp,r24
		331	212 014a 8091 0000 lds r24,ch5
		332	213 014e 8093 0000 sts ch5_tmp,r24
		333	215 0152 1092 0000 sts counter.1797,__zero_reg__
		334	218 0156 8091 0000 lds r24,ch0_tmp
		335	219 015a 9091 0000 lds r25,counter.1797
		336	220 015e 8917 cp r24,r25
		337	221 0160 01F4 brne .L17
		338	222 0162 377F andi r19,lo8(-9)
		339	225 0164 8091 0000 lds r24,ch1_tmp
		340	226 0168 8917 cp r24,r25
		341	227 016a 01F4 brne .L19
		342	228 016c 3B7F andi r19,lo8(-5)
		343	231 016e 8091 0000 lds r24,ch2_tmp
		344	232 0172 8917 cp r24,r25
		345	233 0174 01F4 brne .L21
		346	234 0176 3D7F andi r19,lo8(-3)
		347	237 0178 8091 0000 lds r24,ch3_tmp
		348	238 017c 8917 cp r24,r25
		349	239 017e 01F4 brne .L23
		350	240 0180 277F andi r18,lo8(-9)
		351	243 0182 8091 0000 lds r24,ch4_tmp
		352	244 0186 8917 cp r24,r25
		353	245 0188 01F4 brne .L25
		354	246 018a 2F7E andi r18,lo8(-17)
		355	249 018c 8091 0000 lds r24,ch5_tmp
		356	250 0190 8917 cp r24,r25
		357	251 0192 01F4 brne .L27
		358	252 0194 2F7D andi r18,lo8(-33)
		359	255 0196 38BB out 56-0x20,r19
		360	257 0198 22BB out 50-0x20,r18
		361	259 019a 8091 0000 lds r24,ms1.1798
		362	260 019e 8F5F subi r24,lo8(-(1))
		363	261 01a0 8093 0000 sts ms1.1798,r24
		364	262 01a4 8132 cpi r24,lo8(33)
		365	263 01a6 01F4 brne .L31
		366	265 01a8 1092 0000 sts ms1.1798,__zero_reg__
		367	267 01ac 8091 0000 lds r24,TMR1MS
		368	268 01b0 9091 0000 lds r25,(TMR1MS)+1
		369	269 01b4 0196 adiw r24,1
		370	270 01b6 9093 0000 sts (TMR1MS)+1,r25
		371	271 01ba 8093 0000 sts TMR1MS,r24
		372	274 01be 9F91 pop r25
		373	275 01c0 8F91 pop r24
		374	276 01c2 3F91 pop r19
		375	277 01c4 2F91 pop r18
		376	278 01c6 0F90 pop __tmp_reg__
		377	279 01c8 0FBE out __SREG__,__tmp_reg__
		378	280 01ca 0F90 pop __tmp_reg__
		379	281 01cc 1F90 pop __zero_reg__
		380	282 01ce 1895 reti
		381	*/

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