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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 231 | killagreg | 1 | #include <inttypes.h> |
| 2 | #include <avr/io.h> |
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| 3 | #include <avr/interrupt.h> |
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| 4 | |||
| 5 | #include "main.h" |
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| 6 | |||
| 7 | volatile uint16_t CountMilliseconds = 0; |
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| 8 | |||
| 9 | |||
| 10 | |||
| 11 | /*****************************************************/ |
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| 12 | /* Initialize Timer 0 */ |
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| 13 | /*****************************************************/ |
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| 14 | // timer 0 is used for the PWM generation to control the offset voltage at the air pressure sensor |
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| 15 | // Its overflow interrupt routine is used to generate the beep signal and the flight control motor update rate |
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| 16 | void TIMER0_Init(void) |
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| 17 | { |
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| 18 | uint8_t sreg = SREG; |
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| 19 | |||
| 20 | // disable all interrupts before reconfiguration |
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| 21 | cli(); |
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| 22 | |||
| 23 | // Timer/Counter 0 Control Register A |
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| 24 | |||
| 25 | // Waveform Generation Mode is Fast PWM (Bits WGM02 = 0, WGM01 = 1, WGM00 = 1) |
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| 26 | // Clear OC0A on Compare Match, set OC0A at BOTTOM, noninverting PWM (Bits COM0A1 = 1, COM0A0 = 0) |
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| 27 | // Clear OC0B on Compare Match, set OC0B at BOTTOM, (Bits COM0B1 = 1, COM0B0 = 0) |
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| 28 | TCCR0A &= ~((1<<COM0A0)|(1<<COM0B0)); |
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| 29 | TCCR0A |= (1<<COM0A1)|(1<<COM0B1)|(1<<WGM01)|(1<<WGM00); |
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| 30 | |||
| 31 | // Timer/Counter 0 Control Register B |
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| 32 | |||
| 33 | // set clock devider for timer 0 to SYSKLOCK/8 = 20MHz / 8 = 2.5MHz |
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| 34 | // i.e. the timer increments from 0x00 to 0xFF with an update rate of 2.5 MHz |
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| 35 | // hence the timer overflow interrupt frequency is 2.5 MHz / 256 = 9.765 kHz |
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| 36 | |||
| 37 | // divider 8 (Bits CS02 = 0, CS01 = 1, CS00 = 0) |
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| 38 | TCCR0B &= ~((1<<FOC0A)|(1<<FOC0B)|(1<<WGM02)); |
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| 39 | TCCR0B = (TCCR0B & 0xF8)|(0<<CS02)|(1<<CS01)|(0<<CS00); |
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| 40 | |||
| 41 | // initialize the Output Compare Register A & B used for PWM generation on port PB3 & PB4 |
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| 42 | OCR0A = 0; // for PB3 |
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| 43 | OCR0B = 120; // for PB4 |
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| 44 | |||
| 45 | // init Timer/Counter 0 Register |
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| 46 | TCNT0 = 0; |
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| 47 | |||
| 48 | // Timer/Counter 0 Interrupt Mask Register |
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| 49 | // enable timer overflow interrupt only |
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| 50 | TIMSK0 &= ~((1<<OCIE0B)|(1<<OCIE0A)); |
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| 51 | TIMSK0 |= (1<<TOIE0); |
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| 52 | |||
| 53 | SREG = sreg; |
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| 54 | } |
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| 55 | |||
| 56 | |||
| 57 | |||
| 58 | /*****************************************************/ |
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| 59 | /* Interrupt Routine of Timer 0 */ |
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| 60 | /*****************************************************/ |
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| 61 | ISR(TIMER0_OVF_vect) // 9.765 kHz |
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| 62 | { |
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| 63 | static uint8_t cnt = 0; |
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| 64 | |||
| 65 | if(!cnt--) // every 10th run (9.765kHz/10 = 976Hz) |
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| 66 | { |
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| 67 | cnt = 9; |
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| 68 | CountMilliseconds++; // increment millisecond counter |
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| 69 | } |
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| 70 | } |
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| 71 | |||
| 72 | |||
| 73 | // ----------------------------------------------------------------------- |
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| 74 | uint16_t SetDelay (uint16_t t) |
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| 75 | { |
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| 76 | return(CountMilliseconds + t - 1); |
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| 77 | } |
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| 78 | |||
| 79 | // ----------------------------------------------------------------------- |
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| 80 | int8_t CheckDelay(uint16_t t) |
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| 81 | { |
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| 82 | return(((t - CountMilliseconds) & 0x8000) >> 8); // check sign bit |
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| 83 | } |
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| 84 | |||
| 85 | // ----------------------------------------------------------------------- |
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| 86 | void Delay_ms(uint16_t w) |
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| 87 | { |
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| 88 | unsigned int t_stop; |
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| 89 | t_stop = SetDelay(w); |
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| 90 | while (!CheckDelay(t_stop)); |
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| 91 | } |
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| 92 |