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Rev | Author | Line No. | Line |
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1 | ingob | 1 | |
2 | #ifndef __91x_CONF_H |
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173 | ingob | 3 | #define __91x_CONF_H |
1 | ingob | 4 | |
5 | /* To work in buffered mode just decomment the following line */ |
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6 | |||
7 | //#define Buffered |
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8 | |||
9 | /* Comment the line below to put the library in release mode */ |
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10 | //#define DEBUG |
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11 | |||
12 | #define _RCLK_Divisor SCU_RCLK_Div1 // Reference clock divisor |
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13 | #define _HCLK_Divisor SCU_HCLK_Div1 // ARM high speed bus divisor |
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14 | #define _PCLK_Divisor SCU_PCLK_Div1 // ARM Peripheral bus divisor |
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15 | #define _FMICLK_Divisor SCU_FMICLK_Div2 // FMI divisor |
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16 | /************************* AHBAPB *************************/ |
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17 | //#define _AHBAPB |
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18 | //#define _AHBAPB0 |
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19 | //#define _AHBAPB1 |
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20 | /************************* VIC *************************/ |
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21 | #define _VIC |
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22 | #define _VIC0 |
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23 | #define _VIC1 |
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24 | /************************* DMA *************************/ |
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25 | //#define _DMA |
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26 | //#define _DMA_Channel0 |
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27 | //#define _DMA_Channel1 |
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28 | //#define _DMA_Channel2 |
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29 | //#define _DMA_Channel3 |
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30 | //#define _DMA_Channel4 |
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31 | //#define _DMA_Channel5 |
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32 | //#define _DMA_Channel6 |
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33 | //#define _DMA_Channel7 |
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34 | |||
35 | /************************* EMI *************************/ |
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36 | //#define _EMI |
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37 | //#define _EMI_Bank0 |
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38 | //#define _EMI_Bank1 |
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39 | //#define _EMI_Bank2 |
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40 | //#define _EMI_Bank3 |
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41 | /************************* FMI *************************/ |
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42 | #define _FMI |
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43 | /************************* WIU *************************/ |
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41 | ingob | 44 | #define _WIU |
1 | ingob | 45 | /************************* TIM *************************/ |
46 | #define _TIM |
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47 | #define _TIM0 |
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48 | #define _TIM1 |
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49 | #define _TIM2 |
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50 | #define _TIM3 |
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51 | /************************* GPIO ************************/ |
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52 | #define _GPIO |
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53 | #define _GPIO0 |
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54 | #define _GPIO1 |
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55 | #define _GPIO2 |
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56 | #define _GPIO3 |
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57 | #define _GPIO4 |
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58 | #define _GPIO5 |
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59 | #define _GPIO6 |
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60 | #define _GPIO7 |
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61 | #define _GPIO8 |
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62 | #define _GPIO9 |
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63 | /************************* RTC *************************/ |
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64 | //#define _RTC |
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65 | /************************* SCU *************************/ |
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66 | #define _SCU |
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67 | /************************* MC **************************/ |
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68 | //#define _MC |
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69 | /************************* UART ************************/ |
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70 | #define _UART |
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71 | #define _UART0 |
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72 | #define _UART1 |
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73 | #define _UART2 |
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74 | /************************* SSP *************************/ |
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75 | #define _SSP |
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76 | #define _SSP0 |
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77 | #define _SSP1 |
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78 | /************************* CAN *************************/ |
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79 | //#define _CAN |
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80 | /************************* ADC *************************/ |
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81 | //#define _ADC |
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82 | /************************* WDG *************************/ |
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83 | //#define _WDG |
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84 | /************************* I2C *************************/ |
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85 | #define _I2C |
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86 | //#define _I2C0 |
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87 | #define _I2C1 |
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88 | |||
89 | /************************ ENET *************************/ |
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90 | //#define _ENET |
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91 | /************************ USB *************************/ |
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92 | #define _USB |
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93 | |||
94 | |||
95 | |||
96 | #endif /* __91x_CONF_H */ |
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97 | |||
98 | /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ |