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196 | killagreg | 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
1 | ingob | 2 | * File Name : 91x_scu.c |
3 | * Author : MCD Application Team |
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196 | killagreg | 4 | * Version : V2.1 |
5 | * Date : 12/22/2008 |
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6 | * Description : This file provides the SCU library firmware functions |
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1 | ingob | 7 | ******************************************************************************** |
8 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH |
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9 | * CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS |
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10 | * A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT |
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11 | * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT |
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12 | * OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION |
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13 | * CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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14 | *******************************************************************************/ |
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15 | |||
16 | /* Includes ------------------------------------------------------------------*/ |
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17 | #include "91x_scu.h" |
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18 | |||
19 | /* Include of other module interface headers ---------------------------------*/ |
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20 | /* Local includes ------------------------------------------------------------*/ |
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21 | /* Private typedef -----------------------------------------------------------*/ |
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22 | /* Private define ------------------------------------------------------------*/ |
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23 | #define SCU_PLLEN 0x80000 |
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24 | /* Private macro -------------------------------------------------------------*/ |
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25 | /* Private variables ---------------------------------------------------------*/ |
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26 | /* Private function prototypes -----------------------------------------------*/ |
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27 | /* Interface functions -------------------------------------------------------*/ |
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28 | /* Private functions ---------------------------------------------------------*/ |
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29 | |||
30 | /******************************************************************************* |
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31 | * Function Name : SCU_MCLKSourceConfig |
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32 | * Description : Configures the MCLK source clock |
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33 | * Input : MCLK_Source = SCU_MCLK_OSC, SCU_MCLK_PLL or SCU_MCLK_RTC |
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34 | * Output : None |
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35 | * Return : ErrorStatus: SUCCESS or ERROR |
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36 | * Note : this function returns ERROR if trying to select the PLL as |
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37 | * clock source while the PLL is disabled or not locked. |
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38 | *******************************************************************************/ |
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39 | ErrorStatus SCU_MCLKSourceConfig(u32 MCLK_Source) |
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40 | { |
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41 | u32 CLKCNTR_Value; |
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42 | |||
43 | CLKCNTR_Value = SCU->CLKCNTR; /*get CLKCNTR register value*/ |
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44 | CLKCNTR_Value &=~0x3; /*clear field MCLKSEL*/ |
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45 | if (MCLK_Source == SCU_MCLK_PLL) /*PLL selected as clock source*/ |
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46 | { |
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47 | /*check if PLL enabled & locked*/ |
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48 | if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK))) |
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49 | return ERROR; |
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50 | } |
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51 | else CLKCNTR_Value |=MCLK_Source; /*OSC or RTC selected as clock source*/ |
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52 | SCU->CLKCNTR = CLKCNTR_Value; /*Update CLKCNTR register value*/ |
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53 | return SUCCESS; |
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54 | } |
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55 | |||
56 | /******************************************************************************* |
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57 | * Function Name : SCU_PLLFactorsConfig |
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58 | * Description : Sets the PLL factors |
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59 | * Input : PLLN, PLLM and PLLP |
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60 | * Output : None |
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61 | * Return : ErrorStatus: ERROR or SUCCESS |
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62 | * Notes : -The PLL factors must respect the PLL specification requirements |
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63 | * -The function returns ERROR if trying to change PLL |
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64 | * factors while PLL is selected as Main Clock source (MCLK) |
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65 | * -This function disables the PLL, to enable the PLL use |
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66 | * function" SCU_PLLCmd(ENABLE)" after setting the PLL factors |
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67 | ******************************************************************************/ |
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68 | ErrorStatus SCU_PLLFactorsConfig(u8 PLLN, u8 PLLM, u8 PLLP) |
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69 | { |
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70 | if (SCU_PLLCmd(DISABLE)==SUCCESS) /*Disable PLL*/ |
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71 | { |
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72 | SCU->PLLCONF =0; /*clear PLLCONF register*/ |
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73 | SCU->PLLCONF |=(PLLN<<8); /*update PLLN field*/ |
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74 | SCU->PLLCONF |=PLLM; /*update PLLM field*/ |
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75 | SCU->PLLCONF |=PLLP<<16; /*update PLLP field*/ |
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76 | return SUCCESS; |
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77 | } |
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78 | return ERROR; |
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79 | } |
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80 | |||
81 | /******************************************************************************* |
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82 | * Function Name : SCU_PLLCmd |
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83 | * Description : Enable or Disable the PLL |
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84 | * Input : NewState = ENABLE or DISABLE |
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85 | * Output : None |
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86 | * Return : ErrorStatus: SUCCESS or ERROR |
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87 | * Note : -The function returns ERROR if: |
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88 | * *trying to disable the PLL while it is selected as the MCLK |
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89 | * *trying to enable the PLL while it is already enabled and |
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90 | * locked |
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91 | *******************************************************************************/ |
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92 | ErrorStatus SCU_PLLCmd(FunctionalState NewState) |
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93 | { |
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94 | if (NewState==ENABLE) |
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95 | { |
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96 | if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK))) |
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97 | { |
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98 | SCU->SYSSTATUS|=SCU_FLAG_LOCK; /*clear LOCK bit*/ |
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99 | SCU->PLLCONF |=SCU_PLLEN; /*PLL Enable*/ |
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196 | killagreg | 100 | while(!(SCU->SYSSTATUS&SCU_FLAG_LOCK)); /*Wait PLL to lock*/ |
1 | ingob | 101 | return SUCCESS; |
102 | } |
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103 | else return ERROR; |
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104 | } |
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105 | else /*NewState = DISABLE*/ |
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106 | { |
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107 | if(SCU->CLKCNTR&0x3) /*check if PLL not sys CLK*/ |
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108 | { |
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109 | SCU->PLLCONF &=~SCU_PLLEN; /*PLL Disable*/ |
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110 | return SUCCESS; |
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111 | } |
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112 | else return ERROR; |
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113 | } |
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114 | } |
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115 | |||
116 | /******************************************************************************* |
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117 | * Function Name : SCU_RCLKDivisorConfig |
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118 | * Description : Sets the RCLK divisor value |
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119 | * Input : RCLK_Divisor |
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120 | * Output : None |
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121 | * Return : None |
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122 | *******************************************************************************/ |
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123 | void SCU_RCLKDivisorConfig(u32 RCLK_Divisor) |
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124 | { |
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125 | SCU->CLKCNTR &=SCU_RCLK_Div1; /*clear RCLKDIV[2:0] field*/ |
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126 | if (RCLK_Divisor!=SCU_RCLK_Div1) |
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127 | SCU->CLKCNTR |= RCLK_Divisor; /*update field with RCLK divisor*/ |
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128 | } |
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129 | |||
130 | /******************************************************************************* |
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131 | * Function Name : SCU_HCLKDivisorConfig |
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132 | * Description : Sets the HCLK divisor value |
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133 | * Input : HCLK_Divisor |
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134 | * Output : None |
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135 | * Return : None |
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136 | *******************************************************************************/ |
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137 | void SCU_HCLKDivisorConfig(u32 HCLK_Divisor) |
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138 | { |
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139 | SCU->CLKCNTR &=SCU_HCLK_Div1; /*clear AHBDIV[1:0] field*/ |
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140 | if (HCLK_Divisor!=SCU_HCLK_Div1) |
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141 | SCU->CLKCNTR |= HCLK_Divisor; /*update field with HCLK divisor*/ |
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142 | } |
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143 | |||
144 | /******************************************************************************* |
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145 | * Function Name : SCU_PCLKDivisorConfig |
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146 | * Description : Sets the PCLK divisor value |
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147 | * Input : PCLK_Divisor |
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148 | * Output : None |
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149 | * Return : None |
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150 | *******************************************************************************/ |
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151 | void SCU_PCLKDivisorConfig(u32 PCLK_Divisor) |
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152 | { |
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153 | SCU->CLKCNTR &=SCU_PCLK_Div1; /*clear APBDIV[1:0] field*/ |
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154 | if (PCLK_Divisor!=SCU_PCLK_Div1) |
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155 | SCU->CLKCNTR |= PCLK_Divisor; /*update field with PCLK Divisor*/ |
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156 | } |
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157 | |||
158 | /******************************************************************************* |
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159 | * Function Name : SCU_APBPeriphClockConfig |
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160 | * Description : Enable the clock for an APB peripheral |
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161 | * Input : -APBPerip : APB peripherals(__RTC, __ADC ,...) |
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162 | * -NewState : ENABLE or DISABLE |
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163 | * Output : None |
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164 | * Return : None |
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165 | *******************************************************************************/ |
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166 | void SCU_APBPeriphClockConfig(u32 APBPeriph, FunctionalState NewState) |
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167 | { |
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168 | if (NewState==ENABLE) /*Enable clock for APB peripheral*/ |
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169 | SCU->PCGR1 |=APBPeriph; |
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170 | else |
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171 | SCU->PCGR1 &=~APBPeriph; /*Disable clock for APB peripheral*/ |
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172 | } |
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173 | |||
174 | /******************************************************************************* |
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175 | * Function Name : SCU_AHBPeriphClockConfig |
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176 | * Description : Enable the clock for an AHB peripheral |
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177 | * Input : -AHBPerip: AHB peripherals(__USB, __DMA,...) |
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178 | * -NewState : ENABLE or DISABLE |
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179 | * Output : None |
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180 | * Return : None |
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181 | *******************************************************************************/ |
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182 | void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState) |
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183 | { |
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184 | if (NewState==ENABLE) /*Enable clock for AHB peripheral*/ |
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196 | killagreg | 185 | SCU->PCGR0 |=AHBPeriph; |
1 | ingob | 186 | else |
196 | killagreg | 187 | SCU->PCGR0 &=~AHBPeriph; /*Disable clock for AHB peripheral*/ |
1 | ingob | 188 | } |
189 | |||
190 | /******************************************************************************* |
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191 | * Function Name : SCU_APBPeriphReset |
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192 | * Description : Assert or deassert Reset on APB peripheral |
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193 | * Input : -APBPeriph: APB peripherals(__RTC, __ADC,...) |
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194 | -NewState : ENABLE or DISABLE |
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195 | * Output : None |
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196 | * Return : None |
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197 | *******************************************************************************/ |
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198 | void SCU_APBPeriphReset(u32 APBPeriph, FunctionalState NewState) |
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199 | { |
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200 | if (NewState==DISABLE) /*APB peripheral not held in Reset*/ |
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201 | SCU->PRR1 |=APBPeriph; |
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202 | else |
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203 | SCU->PRR1 &=~APBPeriph; /*APB peripheral held in Reset*/ |
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204 | } |
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205 | |||
206 | /******************************************************************************* |
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207 | * Function Name : SCU_AHBPeriphReset |
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208 | * Description : Assert or deassert Reset on AHB peripheral |
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209 | * Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...) |
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210 | -NewState : ENABLE or DISABLE |
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211 | * Output : None |
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212 | * Return : None |
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213 | *******************************************************************************/ |
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214 | void SCU_AHBPeriphReset(u32 AHBPeriph, FunctionalState NewState) |
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215 | { |
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216 | if (NewState==DISABLE) |
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217 | SCU->PRR0 |=AHBPeriph; /*AHB peripheral not held in Reset*/ |
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218 | else |
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219 | SCU->PRR0 &=~AHBPeriph; /*AHB peripheral held in Reset*/ |
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220 | } |
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221 | |||
222 | /******************************************************************************* |
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223 | * Function Name : SCU_APBPeriphIdleConfig |
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224 | * Description : Enable or Disable Periph Clock during Idle mode |
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225 | * Input : -APBPeriph: APB peripherals(__RTC, __ADC,...) |
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226 | -NewState : ENABLE or DISABLE |
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227 | * Output : None |
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228 | * Return : None |
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229 | *******************************************************************************/ |
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230 | void SCU_APBPeriphIdleConfig(u32 APBPeriph, FunctionalState NewState) |
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231 | { |
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232 | if (NewState==ENABLE) |
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233 | SCU->MGR1 |=APBPeriph; /*APB peripheral clock enabled during Idle mode*/ |
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234 | else |
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235 | SCU->MGR1 &=~APBPeriph; /*APB peripheral clock disabled during Idle mode*/ |
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236 | } |
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237 | |||
238 | /******************************************************************************* |
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239 | * Function Name : SCU_AHBPeriphIdleConfig |
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240 | * Description : Enable or Disable Periph Clock during Idle mode |
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241 | * Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...) |
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242 | -NewState : ENABLE or DISABLE |
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243 | * Output : None |
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244 | * Return : None |
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245 | *******************************************************************************/ |
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246 | void SCU_AHBPeriphIdleConfig(u32 AHBPeriph, FunctionalState NewState) |
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247 | { |
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248 | if (NewState==ENABLE) |
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249 | SCU->MGR0 |=AHBPeriph; /*AHB peripheral clock enabled during Idle mode*/ |
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250 | else |
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251 | SCU->MGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during Idle mode*/ |
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252 | } |
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253 | |||
254 | /******************************************************************************* |
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255 | * Function Name : SCU_APBPeriphDebugConfig |
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256 | * Description : Enable or Disable Periph Clock during ARM debug state |
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257 | * Input : -APBPeriph: APB peripherals(__RTC, __ADC,...) |
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258 | -NewState : ENABLE or DISABLE |
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259 | * Output : None |
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260 | * Return : None |
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261 | *******************************************************************************/ |
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262 | void SCU_APBPeriphDebugConfig(u32 APBPeriph, FunctionalState NewState) |
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263 | { |
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264 | if (NewState==ENABLE) |
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265 | SCU->PECGR1 |=APBPeriph; /*APB peripheral clock enabled during ARM debug state*/ |
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266 | else |
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267 | SCU->PECGR1 &=~APBPeriph; /*APB peripheral clock disabled during ARM debug state*/ |
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268 | } |
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269 | |||
270 | /******************************************************************************* |
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271 | * Function Name : SCU_AHBPeriphDebugConfig |
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272 | * Description : Enable or Disable Periph Clock during ARM debug state |
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273 | * Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...) |
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274 | -NewState : ENABLE or DISABLE |
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275 | * Output : None |
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276 | * Return : None |
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277 | *******************************************************************************/ |
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278 | void SCU_AHBPeriphDebugConfig(u32 AHBPeriph, FunctionalState NewState) |
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279 | { |
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280 | if (NewState==ENABLE) |
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281 | SCU->PECGR0 |=AHBPeriph; /*AHB peripheral clock enabled during ARM debug state*/ |
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282 | else |
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283 | SCU->PECGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during ARM debug state*/ |
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284 | } |
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285 | /******************************************************************************* |
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286 | * Function Name : SCU_BRCLKDivisorConfig |
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287 | * Description : Sets the BRCLK divisor value |
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288 | * Input : BRCLK_Divisor |
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289 | * Output : None |
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290 | * Return : None |
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291 | *******************************************************************************/ |
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292 | void SCU_BRCLKDivisorConfig(u32 BRCLK_Divisor) |
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293 | { |
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294 | SCU->CLKCNTR &=SCU_BRCLK_Div2; /*Clear BRSEL bit*/ |
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295 | if (BRCLK_Divisor==SCU_BRCLK_Div1) |
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296 | SCU->CLKCNTR |= SCU_BRCLK_Div1; /*set bit BRSEL*/ |
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297 | } |
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298 | |||
299 | /******************************************************************************* |
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196 | killagreg | 300 | * Function Name : SCU_TIMExtCLKCmd |
301 | * Description : Enable or disable the TIMx external clock source |
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1 | ingob | 302 | * Input : - TIMx : SCU_TIM01 or SCU_TIM23 |
196 | killagreg | 303 | * - NewState : ENABLE or DISABLE |
304 | * Output : Non |
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1 | ingob | 305 | * Return : None |
306 | *******************************************************************************/ |
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196 | killagreg | 307 | void SCU_TIMExtCLKCmd (u8 TIMx, FunctionalState NewState) |
1 | ingob | 308 | { |
309 | if (TIMx== SCU_TIM01) /*TIM01 clock source configuration*/ |
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310 | { |
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311 | SCU->CLKCNTR &=0xFFFFDFFF; |
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196 | killagreg | 312 | if (NewState==ENABLE) |
1 | ingob | 313 | SCU->CLKCNTR |=0x2000; |
314 | } |
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315 | else |
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316 | { |
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317 | SCU->CLKCNTR &=0xFFFFBFFF; /*TIM23 clock source configuration*/ |
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196 | killagreg | 318 | if (NewState==ENABLE) |
1 | ingob | 319 | SCU->CLKCNTR |=0x4000; |
320 | } |
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321 | } |
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322 | |||
323 | /******************************************************************************* |
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324 | * Function Name : SCU_USBCLKConfig |
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325 | * Description : Configures the clock source for the 48MHz USBCLK |
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326 | * Input : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT |
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327 | * Output : None |
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328 | * Return : None |
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329 | *******************************************************************************/ |
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330 | void SCU_USBCLKConfig(u32 USBCLK_Source) |
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331 | { |
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332 | SCU->CLKCNTR &=SCU_USBCLK_MCLK; /*clear USBSEL[1:0] field*/ |
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333 | if (USBCLK_Source!=SCU_USBCLK_MCLK) |
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334 | SCU->CLKCNTR |= USBCLK_Source; /*update field with USBCLK_Source*/ |
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335 | } |
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336 | |||
337 | /******************************************************************************* |
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338 | * Function Name : SCU_PHYCLKConfig |
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339 | * Description : Enable or Disable PHY clock output |
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340 | * Input : NewState : ENABLE or DISABLE |
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341 | * Output : None |
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342 | * Return : None |
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343 | *******************************************************************************/ |
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344 | void SCU_PHYCLKConfig(FunctionalState NewState) |
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345 | { |
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346 | if (NewState==ENABLE) |
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347 | SCU->CLKCNTR |= 0x1000; /*enable MIIPHY clock*/ |
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348 | else |
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349 | SCU->CLKCNTR &=~0x1000; /*disable MIIPHY clock*/ |
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350 | } |
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351 | |||
352 | /******************************************************************************* |
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353 | * Function Name : SCU_FMICLKDivisorConfig |
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354 | * Description : Set the FMI clock divisor |
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355 | * Input : FMICLK_Divisor: SCU_FMICLK_Div1 or SCU_FMICLK_DIV2 |
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356 | * Output : None |
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357 | * Return : None |
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358 | *******************************************************************************/ |
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359 | void SCU_FMICLKDivisorConfig(u32 FMICLK_Divisor) |
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360 | { |
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361 | SCU->CLKCNTR &=SCU_FMICLK_Div1; /*FMICLK = RCLK*/ |
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362 | if (FMICLK_Divisor!=SCU_FMICLK_Div1) |
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363 | SCU->CLKCNTR |=SCU_FMICLK_Div2; /*FMICLK = RCLK/2 */ |
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364 | } |
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365 | |||
366 | /******************************************************************************* |
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367 | * Function Name : SCU_EMIBCLKDivisorConfig |
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368 | * Description : Set the EMI Bus clock divisor: EMIBCLK = HCLK or HCLK/2 |
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369 | * Input : SCU_EMICLK: SCU_EMIBCLK_Div1 , SCU_EMIBCLK_Div2 |
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370 | * Output : None |
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371 | * Return : None |
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372 | *******************************************************************************/ |
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373 | void SCU_EMIBCLKDivisorConfig(u32 SCU_EMIBCLK) |
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374 | { |
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375 | SCU->CLKCNTR &=SCU_EMIBCLK_Div1; /*EMIBCLK = HCLK */ |
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376 | if (SCU_EMIBCLK!=SCU_EMIBCLK_Div1) |
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377 | SCU->CLKCNTR |= SCU_EMIBCLK_Div2; /*EMIBCLK = HCLK/2 */ |
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378 | } |
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379 | |||
380 | /******************************************************************************* |
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381 | * Function Name : SCU_EMIModeConfig |
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382 | * Description : Configure the EMI as Multiplexed or Demultiplexed |
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383 | * Input : SCU_EMIMODE : SCU_EMI_MUX or SCU_EMI_DEMUX |
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384 | * Output : None |
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385 | * Return : None |
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386 | *******************************************************************************/ |
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387 | void SCU_EMIModeConfig(u32 SCU_EMIMODE) |
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388 | { |
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389 | SCU->SCR0 &=SCU_EMI_MUX; /*EMI mode = Multiplexed*/ |
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390 | if (SCU_EMIMODE!=SCU_EMI_MUX) |
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391 | SCU->SCR0 |= SCU_EMI_DEMUX; /*EMI mode = Demultiplexed*/ |
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392 | } |
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393 | |||
394 | /******************************************************************************* |
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395 | * Function Name : SCU_EMIALEConfig |
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396 | * Description : Configure the ALE signal (length & polarity) |
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397 | * Input : -SCU_EMIALE_LEN : SCU_EMIALE_LEN1 or SCU_EMIALE_LEN2 |
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398 | * -SCU_EMIALE_POL : SCU_EMIALE_POLLow or SCU_EMI_POLHigh |
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399 | * Output : None |
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400 | * Return : None |
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401 | *******************************************************************************/ |
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402 | void SCU_EMIALEConfig(u32 SCU_EMIALE_LEN, u32 SCU_EMIALE_POL) |
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403 | { |
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404 | /*Configure EMI ALE Length*/ |
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405 | SCU->SCR0 &=SCU_EMIALE_LEN1; |
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406 | if (SCU_EMIALE_LEN!=SCU_EMIALE_LEN1) |
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407 | SCU->SCR0 |= SCU_EMIALE_LEN2; |
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408 | |||
409 | /*Configure EMI ALE POL*/ |
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410 | SCU->SCR0 &=SCU_EMIALE_POLLow; |
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411 | if (SCU_EMIALE_POL!=SCU_EMIALE_POLLow) |
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412 | SCU->SCR0 |= SCU_EMIALE_POLHigh; |
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413 | } |
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414 | |||
415 | /******************************************************************************* |
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416 | * Function Name : SCU_ITConfig |
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417 | * Description : ENBALE or DISABLE an SCU interrupt |
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418 | * Input : -SCU_IT: interrupt mask |
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419 | * -NewState: ENABLE or DISABLE |
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420 | * Output : None |
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421 | * Return : None |
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422 | *******************************************************************************/ |
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423 | void SCU_ITConfig(u32 SCU_IT, FunctionalState NewState) |
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424 | { |
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425 | if (NewState==ENABLE) |
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426 | SCU->ITCMSK&=~SCU_IT; /*IT enable */ |
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427 | else |
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428 | SCU->ITCMSK|=SCU_IT; /*IT disable( mask)*/ |
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429 | } |
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430 | |||
431 | /******************************************************************************* |
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432 | * Function Name : SCU_GetFlagStatus |
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433 | * Description : Returns flag status |
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434 | * Input : SCU_Flag |
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435 | * Output : NONE |
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436 | * Return : SET or RESET |
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437 | *******************************************************************************/ |
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438 | FlagStatus SCU_GetFlagStatus(u32 SCU_Flag) |
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439 | { |
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440 | if (SCU->SYSSTATUS&SCU_Flag) |
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441 | return SET; |
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442 | else return RESET; |
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443 | } |
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444 | |||
445 | /******************************************************************************* |
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446 | * Function Name : SCU_ClearFlag |
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447 | * Description : Clears a SYSTATUS Flag |
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448 | * Input : SCU_Flag |
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449 | * Output : None |
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450 | * Return : None |
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451 | *******************************************************************************/ |
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452 | void SCU_ClearFlag(u32 SCU_Flag) |
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453 | { |
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454 | SCU->SYSSTATUS = SCU_Flag; |
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455 | } |
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456 | /******************************************************************************* |
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457 | * Function Name : SCU_GetPLLfreqValue |
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458 | * Description : Gets the current PLL frequency |
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459 | * Input : None |
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460 | * Output : None |
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461 | * Return : PLL frequency (KHz) |
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462 | *******************************************************************************/ |
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463 | u32 SCU_GetPLLFreqValue(void) |
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464 | { |
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465 | u8 PLL_M; |
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466 | u8 PLL_N; |
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467 | u8 PLL_P; |
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468 | |||
469 | PLL_M = SCU->PLLCONF&0xFF; |
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470 | PLL_N = (SCU->PLLCONF&0xFF00)>>8; |
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471 | PLL_P = (SCU->PLLCONF&0x70000)>>16; |
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472 | |||
473 | if ((PLL_M>0)&&(PLL_N>0)) |
||
474 | return (u32)(((_Main_Crystal*2)*PLL_N)/(PLL_M<<PLL_P)); |
||
475 | |||
476 | else return 0; |
||
477 | } |
||
478 | /******************************************************************************* |
||
479 | * Function Name : SCU_GetMCLKFreqValue |
||
480 | * Description : Gets the current MCLK frequency |
||
481 | * Input : None |
||
482 | * Output : None |
||
483 | * Return : MCLK frequency (KHz) |
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484 | *******************************************************************************/ |
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485 | u32 SCU_GetMCLKFreqValue(void) |
||
486 | { |
||
487 | if ((SCU->CLKCNTR&0x3) == 0x2) return (u32)(_Main_Crystal); |
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488 | if ((SCU->CLKCNTR&0x3) == 0x1) return (u32)(32); |
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489 | else return (SCU_GetPLLFreqValue()); |
||
490 | } |
||
491 | |||
492 | /******************************************************************************* |
||
493 | * Function Name : SCU_GetRCLKFreqValue |
||
494 | * Description : Gets the current RCLK frequency |
||
495 | * Input : None |
||
496 | * Output : None |
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497 | * Return : RCLK frequency (KHz) |
||
498 | *******************************************************************************/ |
||
499 | u32 SCU_GetRCLKFreqValue(void) |
||
500 | { |
||
501 | u8 RCLK_Div; |
||
502 | RCLK_Div = (SCU->CLKCNTR&0x1C)>>2; |
||
503 | if (RCLK_Div==0x5) RCLK_Div=10; |
||
504 | return (u32)(SCU_GetMCLKFreqValue() >>RCLK_Div); |
||
505 | } |
||
506 | |||
507 | /******************************************************************************* |
||
508 | * Function Name : SCU_GetHCLKFreqValue |
||
509 | * Description : Gets the current PCLK frequency |
||
510 | * Input : None |
||
511 | * Output : None |
||
512 | * Return : HCLK frequency (KHz) |
||
513 | *******************************************************************************/ |
||
514 | u32 SCU_GetHCLKFreqValue(void) |
||
515 | { |
||
516 | u8 HCLK_Div; |
||
517 | HCLK_Div = (SCU->CLKCNTR&0x60)>>5; |
||
518 | return (u32)(SCU_GetRCLKFreqValue() >>HCLK_Div); |
||
519 | } |
||
520 | |||
521 | /******************************************************************************* |
||
522 | * Function Name : SCU_GetPCLKFreqValue |
||
523 | * Description : Gets the current HCLK frequency |
||
524 | * Input : None |
||
525 | * Output : None |
||
526 | * Return : PCLK frequency (KHz) |
||
527 | *******************************************************************************/ |
||
528 | u32 SCU_GetPCLKFreqValue(void) |
||
529 | { |
||
530 | u8 PCLK_Div; |
||
531 | PCLK_Div = (SCU->CLKCNTR&0x180)>>7; |
||
532 | return (u32)(SCU_GetRCLKFreqValue() >>PCLK_Div); |
||
533 | } |
||
534 | |||
535 | /******************************************************************************* |
||
536 | * Function Name : SCU_WakeUpLineConfig |
||
537 | * Description : Configures an External interrupt as WakeUp line |
||
538 | * Input : EXTint : 0 -> 31 |
||
539 | * Output : None |
||
540 | * Return : None |
||
541 | *******************************************************************************/ |
||
542 | void SCU_WakeUpLineConfig(u8 EXTint) |
||
543 | { |
||
544 | if (EXTint < 8) |
||
545 | { |
||
546 | SCU->WKUPSEL&=~0x7; |
||
547 | SCU->WKUPSEL|=EXTint; |
||
548 | } |
||
549 | else if (EXTint<16) |
||
550 | { |
||
551 | SCU->WKUPSEL&=~0x38; |
||
552 | SCU->WKUPSEL|=(EXTint-8)<<3; |
||
553 | } |
||
554 | else if (EXTint<24) |
||
555 | { |
||
556 | SCU->WKUPSEL&=~0x1C0; |
||
557 | SCU->WKUPSEL|=(EXTint-16)<<6; |
||
558 | } |
||
559 | else |
||
560 | { |
||
561 | SCU->WKUPSEL&=~0xE00; |
||
562 | SCU->WKUPSEL|=(EXTint-24)<<9; |
||
563 | } |
||
564 | } |
||
565 | |||
566 | /******************************************************************************* |
||
567 | * Function Name : SCU_SpecIntRunModeConfig |
||
568 | * Description : Enables or Disables the Special Run mode |
||
569 | * Input : newstate = ENABLE or DISABLE |
||
570 | * Output : None |
||
571 | * Return : None |
||
572 | *******************************************************************************/ |
||
573 | void SCU_SpecIntRunModeConfig(FunctionalState NewState) |
||
574 | { |
||
575 | if (NewState == ENABLE) |
||
576 | SCU->PWRMNG |=0x8; |
||
577 | else |
||
578 | SCU->PWRMNG &=~0x8; |
||
579 | } |
||
580 | /******************************************************************************* |
||
581 | * Function Name : SCU_EnterIdleMode |
||
582 | * Description : Enters in Idle mode |
||
583 | * Input : None |
||
584 | * Output : None |
||
585 | * Return : None |
||
586 | *******************************************************************************/ |
||
587 | void SCU_EnterIdleMode(void) |
||
588 | { |
||
589 | SCU->PWRMNG |=0x1; |
||
590 | } |
||
591 | /******************************************************************************* |
||
592 | * Function Name : SCU_EnterSleepMode |
||
593 | * Description : Enters in Sleep mode |
||
594 | * Input : None |
||
595 | * Output : None |
||
596 | * Return : None |
||
597 | *******************************************************************************/ |
||
598 | void SCU_EnterSleepMode(void) |
||
599 | { |
||
600 | SCU->PWRMNG |=0x2; |
||
601 | } |
||
602 | |||
603 | /******************************************************************************* |
||
604 | * Function Name : SCU_UARTIrDAConfig |
||
605 | * Description : Enable or Disable the Irda mode for UARTx |
||
606 | * Input : - SCU_UARTx :x=0,1 or 2 |
||
607 | * - UART_IrDA_Mode : SCU_UARTMode_IrDA or SCU_UARTMode_UART |
||
608 | * Output : None |
||
609 | * Return : None |
||
610 | *******************************************************************************/ |
||
611 | void SCU_UARTIrDASelect(u8 SCU_UARTx, u8 UART_IrDA_Mode) |
||
612 | { |
||
613 | if (UART_IrDA_Mode == SCU_UARTMode_IrDA) |
||
614 | { |
||
615 | if (SCU_UARTx== SCU_UART0) SCU->SCR0 |=0x400; |
||
616 | else if (SCU_UARTx== SCU_UART1) SCU->SCR0 |=0x800; |
||
617 | else SCU->SCR0 |=0x1000; |
||
618 | } |
||
619 | else |
||
620 | { |
||
621 | if (SCU_UARTx== SCU_UART0) SCU->SCR0 &=~0x400; |
||
622 | else if (SCU_UARTx== SCU_UART1) SCU->SCR0 &=~0x800; |
||
623 | else SCU->SCR0 &=~0x1000; |
||
624 | } |
||
625 | } |
||
626 | /******************************************************************************* |
||
627 | * Function Name : SCU_PFQBCCmd |
||
628 | * Description : Enable or Disable PFQBC |
||
629 | * Input : NewState : ENABLE or DISABLE |
||
630 | * Output : None |
||
631 | * Return : None |
||
632 | *******************************************************************************/ |
||
633 | void SCU_PFQBCCmd(FunctionalState NewState) |
||
634 | { |
||
635 | if (NewState==ENABLE) |
||
636 | SCU->SCR0 |=0x1; |
||
637 | else SCU->SCR0 &=~0x1; |
||
638 | } |
||
639 | |||
196 | killagreg | 640 | |
641 | /******************************************************************************* |
||
642 | * Function Name : SCU_EMIByte_Select_Pinconfig |
||
643 | * Description : Enable or Disable the Byte selection pins behaviour(LFBGA only) |
||
644 | * Input : NewState : ENABLE or DISABLE |
||
645 | * Output : None |
||
646 | * Return : None |
||
647 | *******************************************************************************/ |
||
648 | void SCU_EMIByte_Select_Pinconfig(FunctionalState NewState) |
||
649 | { |
||
650 | if (NewState==ENABLE) |
||
651 | SCU->GPIOEMI |= 0x04; |
||
652 | else |
||
653 | SCU->GPIOEMI &=~0x04; |
||
654 | |||
655 | } |
||
656 | |||
657 | /******************************************************************************* |
||
658 | * Function Name : SCU_EMIclock_Pinconfig |
||
659 | * Description : Enable or Disable the BCLK pin clock driving (LFBGA only) |
||
660 | * Input : NewState : ENABLE or DISABLE |
||
661 | * Output : None |
||
662 | * Return : None |
||
663 | *******************************************************************************/ |
||
664 | |||
665 | void SCU_EMIclock_Pinconfig(FunctionalState NewState) |
||
666 | { |
||
667 | if (NewState==DISABLE) |
||
668 | SCU->GPIOEMI |= 0x02; |
||
669 | else |
||
670 | SCU->GPIOEMI &=~0x02; |
||
671 | |||
672 | } |
||
673 | |||
674 | |||
675 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ |