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196 | killagreg | 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
1 | ingob | 2 | * File Name : 91x_emi.c |
3 | * Author : MCD Application Team |
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196 | killagreg | 4 | * Version : V2.1 |
5 | * Date : 12/22/2008 |
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6 | * Description : This file provides all the EMI firmware functions. |
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1 | ingob | 7 | ******************************************************************************** |
8 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
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9 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. |
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10 | * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, |
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11 | * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE |
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12 | * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING |
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13 | * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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14 | *******************************************************************************/ |
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15 | |||
16 | /* Includes ------------------------------------------------------------------*/ |
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17 | #include "91x_emi.h" |
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18 | #include "91x_scu.h" |
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19 | /* Private typedef -----------------------------------------------------------*/ |
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20 | /* Private define ------------------------------------------------------------*/ |
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21 | |||
22 | /* These constant variables are used as masks to handle the EMI registers. */ |
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23 | |||
24 | |||
196 | killagreg | 25 | #define EMI_Burst_and_PageModeRead_TL_Mask 0xFFFFF3FF |
26 | #define EMI_Burst_and_PageModeRead_Sel_Mask 0xFFFFFEFF |
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27 | #define EMI_MemWidth_Mask 0xFFFFFFCF |
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28 | #define EMI_WriteProtect_Mask 0xFFFFFFF7 |
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29 | #define EMI_ByteLane_Mask 0xFFFFFFFE |
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30 | #define EMI_AccessRead_Dev_Mask 0xFFFFFDFF |
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31 | #define EMI_BurstModeWrite_Sel_Mask 0xFFFEFFFF |
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32 | #define EMI_AccessWrite_Dev_Mask 0xFFFDFFFF |
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33 | #define EMI_BurstModeWrite_TL_Mask 0xFFF3FFFF |
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1 | ingob | 34 | |
196 | killagreg | 35 | |
1 | ingob | 36 | /* Private macro -------------------------------------------------------------*/ |
37 | /* Private variables ---------------------------------------------------------*/ |
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38 | /* Registers reset value */ |
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39 | /* Private function prototypes -----------------------------------------------*/ |
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40 | /* Private functions ---------------------------------------------------------*/ |
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41 | |||
42 | /****************************************************************************** |
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43 | * Function Name : EMI_DeInit |
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44 | * Description : Deinitializes the EMI peripheral registers to their default |
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45 | * reset values. |
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46 | * Input : None |
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47 | * Output : None |
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48 | * Return : None |
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49 | *******************************************************************************/ |
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50 | |||
51 | void EMI_DeInit(void) |
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52 | { |
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53 | |||
54 | SCU_AHBPeriphReset(__EMI, ENABLE); /* EMI peripheral under Reset */ |
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55 | SCU_AHBPeriphReset(__EMI,DISABLE ); /* EMI not under Reset */ |
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56 | |||
57 | } |
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58 | |||
59 | /******************************************************************************* |
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60 | * Function Name : EMI_StructInit |
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61 | * Description : Fills the EMI_InitTypeDef structure member with its reset |
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62 | * value. |
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63 | * Input : EMI_InitStruct : pointer to a EMI_InitTypeDef structure |
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64 | * which will be initialized. |
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65 | * Output : None |
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66 | * Return : None |
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67 | *******************************************************************************/ |
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68 | |||
69 | void EMI_StructInit( EMI_InitTypeDef *EMI_InitStruct) |
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70 | { |
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71 | |||
72 | /* Number of bus turnaround cycles added between read and write accesses.*/ |
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73 | /*This member can be 0x01,0x02,0x03, ....0xF (Reset value:0xF "15 cycles"*/ |
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74 | |||
75 | EMI_InitStruct->EMI_Bank_IDCY =0xF; |
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76 | |||
77 | |||
78 | /* Number of wait states for read accesses*/ |
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79 | /*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
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80 | |||
81 | EMI_InitStruct->EMI_Bank_WSTRD =0x1F; |
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82 | |||
83 | |||
84 | /* Number of wait states for write accesses*/ |
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85 | /*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
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86 | |||
87 | EMI_InitStruct->EMI_Bank_WSTWR =0x1F; |
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88 | |||
89 | /*Output enable assertion delay from chip select assertion*/ |
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90 | /*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x01 "1 cycle"*/ |
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91 | |||
92 | EMI_InitStruct->EMI_Bank_WSTROEN =0x01; |
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93 | |||
94 | |||
95 | /*Write enable assertion delay from chip select assertion*/ |
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96 | /*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x00 "0 cycle"*/ |
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97 | |||
98 | EMI_InitStruct->EMI_Bank_WSTWEN =0x00; |
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196 | killagreg | 99 | |
100 | /*Number of wait states for burst read accesses after the first read.*/ |
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101 | /* They do not apply to non-burst devices.*/ |
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102 | /*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/ |
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103 | |||
104 | EMI_InitStruct->EMI_Bank_BRDCR =0x1F; |
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1 | ingob | 105 | |
106 | /*This member Controls the memory width*/ |
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107 | /*This member can be :"EMI_Width_Byte" = 8 bits width or "EMI_Width_HalfWord" = 16 bits width*/ |
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108 | |||
109 | EMI_InitStruct->EMI_Bank_MemWidth = EMI_Width_Byte; |
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110 | |||
111 | |||
112 | /*Write protection feature */ |
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113 | /*This member can be :"EMI_Bank_NonWriteProtect" = No write protection or "EMI_Bank_WriteProtect" = bank is write protected*/ |
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114 | |||
115 | EMI_InitStruct-> EMI_Bank_WriteProtection= EMI_Bank_NonWriteProtect; |
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116 | |||
117 | |||
196 | killagreg | 118 | /* Burst Read or page mode transfer length */ |
119 | /*This member can be :"EMI_Read_4Data" or "EMI_Read_8Data" for page mode*/ |
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120 | /*Read and it can be "EMI_Read_4Data","EMI_Read_8Data","EMI_Read_16Data" */ |
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121 | /*or "EMI_Read_Continuous"(synchronous only) for burst mode read*/ |
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122 | |||
123 | EMI_InitStruct->EMI_Burst_and_PageModeRead_TransferLength= EMI_Read_4Data; |
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1 | ingob | 124 | |
196 | killagreg | 125 | /*Select or deselect the Burst and page mode read*/ |
126 | /*This member can be :"EMI_NormalMode" or "EMI_BurstModeRead" */ |
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1 | ingob | 127 | |
196 | killagreg | 128 | EMI_InitStruct->EMI_Burst_and_PageModeRead_Selection = EMI_NormalMode; |
129 | |||
130 | |||
131 | /* Enables the byte select signals in 16-bit PSRAM bus mode*/ |
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132 | /*(EMI_UBn and EMI_LBn) are enabled. Bit 2 in the GPIO EMI register */ |
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133 | /*(SCU_EMI) must also be set to 1 */ |
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134 | |||
135 | EMI_InitStruct->EMI_ByteLane_Selection=EMI_Byte_Select_disabled; |
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136 | |||
137 | /*Access the device using synchronous accesses for reads*/ |
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138 | |||
139 | EMI_InitStruct-> EMI_AccessRead_Support=EMI_Read_Asyn; |
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140 | |||
141 | /*Access the device using synchronous accesses for Write*/ |
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142 | |||
143 | EMI_InitStruct->EMI_AccessWrite_Support=EMI_Write_Asyn; |
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144 | |||
145 | /* Burst Write transfer length */ |
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146 | /*This member can be :"EMI_Write_4Data", "EMI_Write_8Data" or */ |
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147 | /*"EMI_Write_Continuous" for synchronous only*/ |
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148 | |||
149 | EMI_InitStruct->EMI_BurstModeWrite_TransferLength = EMI_Write_4Data; |
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150 | |||
151 | /* Select burst or non-burst write to memory*/ |
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152 | |||
153 | EMI_InitStruct-> EMI_BurstModeWrite_Selection=EMI_NonBurstModeWrite; |
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154 | |||
1 | ingob | 155 | |
156 | } |
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157 | |||
158 | /******************************************************************************* |
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159 | * Function Name : EMI_Init |
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160 | * Description : Initializes EMI peripheral according to the specified |
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161 | * parameters in the EMI_InitStruct. |
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162 | |||
163 | * Input : EMI_Bankx:where x can be 0,1,2 or 3 to select the EMI Bank. |
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164 | EMI_InitStruct: pointer to a EMI_InitTypeDef structure |
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165 | ( Structure Config to be loaded in EMI Registers). . |
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166 | |||
167 | * Output : None |
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168 | * Return : None |
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169 | *******************************************************************************/ |
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170 | |||
171 | void EMI_Init( EMI_Bank_TypeDef* EMI_Bankx, EMI_InitTypeDef* EMI_InitStruct) |
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172 | |||
173 | { |
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174 | |||
175 | EMI_Bankx->ICR = EMI_InitStruct-> EMI_Bank_IDCY ; |
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176 | |||
177 | EMI_Bankx->RCR = EMI_InitStruct->EMI_Bank_WSTRD ; |
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178 | |||
179 | EMI_Bankx->WCR = EMI_InitStruct->EMI_Bank_WSTWR ; |
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180 | |||
181 | EMI_Bankx->OECR = EMI_InitStruct->EMI_Bank_WSTROEN; |
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182 | |||
183 | EMI_Bankx->WECR = EMI_InitStruct->EMI_Bank_WSTWEN ; |
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196 | killagreg | 184 | |
185 | EMI_Bankx->BRDCR = EMI_InitStruct->EMI_Bank_BRDCR ; |
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186 | |||
1 | ingob | 187 | EMI_Bankx->BCR &= EMI_MemWidth_Mask; |
188 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_MemWidth; |
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189 | |||
190 | EMI_Bankx->BCR &= EMI_WriteProtect_Mask; |
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191 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_WriteProtection; |
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192 | |||
196 | killagreg | 193 | |
194 | EMI_Bankx->BCR &= EMI_Burst_and_PageModeRead_TL_Mask; |
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195 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Burst_and_PageModeRead_TransferLength; |
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196 | |||
197 | EMI_Bankx->BCR &= EMI_Burst_and_PageModeRead_Sel_Mask; |
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198 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_Burst_and_PageModeRead_Selection; |
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199 | |||
200 | EMI_Bankx->BCR &= EMI_BurstModeWrite_TL_Mask; |
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201 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_BurstModeWrite_TransferLength; |
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202 | |||
203 | EMI_Bankx->BCR &= EMI_BurstModeWrite_Sel_Mask; |
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204 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_BurstModeWrite_Selection; |
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205 | |||
206 | EMI_Bankx->BCR &= EMI_ByteLane_Mask; |
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207 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_ByteLane_Selection; |
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208 | |||
209 | EMI_Bankx->BCR &= EMI_AccessRead_Dev_Mask; |
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210 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_AccessRead_Support; |
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211 | |||
212 | EMI_Bankx->BCR &= EMI_AccessWrite_Dev_Mask; |
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213 | EMI_Bankx->BCR |= EMI_InitStruct->EMI_AccessWrite_Support; |
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1 | ingob | 214 | |
215 | |||
216 | } |
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196 | killagreg | 217 | /******************************************************************************* |
218 | * Function Name : EMI_BCLKCmd |
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219 | * Description : Enable or Disable the activation of BCLK clock (LFBGA only) |
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220 | * Input : NewState : ENABLE or DISABLE |
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221 | * Output : None |
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222 | * Return : None |
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223 | *******************************************************************************/ |
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224 | void EMI_BCLKCmd(FunctionalState NewState) |
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225 | { |
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226 | if (NewState == ENABLE) |
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227 | *EMI_CCR |=0x1; |
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228 | else |
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229 | *EMI_CCR &=~0x1; |
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230 | } |
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1 | ingob | 231 | |
232 | |||
233 | |||
196 | killagreg | 234 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ |