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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1910 | - | 1 | #include <avr/io.h> |
| 2 | #include <avr/interrupt.h> |
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| 3 | #include <util/twi.h> |
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| 4 | #include <util/delay.h> |
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| 5 | //#include "eeprom.h" |
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| 6 | #include "twimaster.h" |
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| 7 | //#include "analog.h" |
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| 8 | #include "configuration.h" |
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| 9 | |||
| 10 | volatile uint8_t twi_state = TWI_STATE_IDLE; |
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| 11 | volatile uint8_t dac_channel = 0; |
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| 12 | volatile uint16_t I2CTimeout = 100; |
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| 13 | volatile uint8_t DACValues[4]; |
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| 14 | uint8_t DACChannel = 0; |
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| 15 | |||
| 16 | #define SCL_CLOCK 200000L |
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| 17 | #define I2C_TIMEOUT 30000 |
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| 18 | |||
| 19 | /************************************************** |
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| 20 | * Initialize I2C (TWI) |
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| 21 | **************************************************/ |
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| 22 | void I2C_init(void) { |
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| 23 | uint8_t i; |
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| 24 | uint8_t sreg = SREG; |
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| 25 | cli(); |
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| 26 | |||
| 27 | // SDA is INPUT |
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| 28 | DDRC &= ~(1 << DDC1); |
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| 29 | // SCL is output |
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| 30 | DDRC |= (1 << DDC0); |
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| 31 | // pull up SDA |
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| 32 | PORTC |= (1 << PORTC0) | (1 << PORTC1); |
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| 33 | |||
| 34 | // TWI Status Register |
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| 35 | // prescaler 1 (TWPS1 = 0, TWPS0 = 0) |
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| 36 | TWSR &= ~((1 << TWPS1) | (1 << TWPS0)); |
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| 37 | |||
| 38 | // set TWI Bit Rate Register |
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| 39 | TWBR = ((SYSCLK / SCL_CLOCK) - 16) / 2; |
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| 40 | |||
| 41 | twi_state = TWI_STATE_IDLE; |
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| 42 | SREG = sreg; |
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| 43 | } |
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| 44 | |||
| 45 | /**************************************** |
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| 46 | * Start I2C |
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| 47 | ****************************************/ |
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| 48 | void I2C_Start(uint8_t start_state) { |
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| 49 | twi_state = start_state; |
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| 50 | // TWI Control Register |
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| 51 | // clear TWI interrupt flag (TWINT=1) |
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| 52 | // disable TWI Acknowledge Bit (TWEA = 0) |
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| 53 | // enable TWI START Condition Bit (TWSTA = 1), MASTER |
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| 54 | // disable TWI STOP Condition Bit (TWSTO = 0) |
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| 55 | // disable TWI Write Collision Flag (TWWC = 0) |
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| 56 | // enable i2c (TWEN = 1) |
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| 57 | // enable TWI Interrupt (TWIE = 1) |
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| 58 | TWCR = (1 << TWINT) | (1 << TWSTA) | (1 << TWEN) | (1 << TWIE); |
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| 59 | } |
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| 60 | |||
| 61 | /**************************************** |
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| 62 | * Stop I2C |
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| 63 | ****************************************/ |
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| 64 | void I2C_Stop(uint8_t start_state) { |
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| 65 | twi_state = start_state; |
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| 66 | // TWI Control Register |
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| 67 | // clear TWI interrupt flag (TWINT=1) |
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| 68 | // disable TWI Acknowledge Bit (TWEA = 0) |
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| 69 | // diable TWI START Condition Bit (TWSTA = 1), no MASTER |
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| 70 | // enable TWI STOP Condition Bit (TWSTO = 1) |
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| 71 | // disable TWI Write Collision Flag (TWWC = 0) |
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| 72 | // enable i2c (TWEN = 1) |
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| 73 | // disable TWI Interrupt (TWIE = 0) |
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| 74 | TWCR = (1 << TWINT) | (1 << TWSTO) | (1 << TWEN); |
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| 75 | } |
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| 76 | |||
| 77 | /**************************************** |
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| 78 | * Write to I2C |
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| 79 | ****************************************/ |
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| 80 | void I2C_WriteByte(int8_t byte) { |
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| 81 | // move byte to send into TWI Data Register |
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| 82 | TWDR = byte; |
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| 83 | // clear interrupt flag (TWINT = 1) |
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| 84 | // enable i2c bus (TWEN = 1) |
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| 85 | // enable interrupt (TWIE = 1) |
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| 86 | TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWIE); |
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| 87 | } |
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| 88 | |||
| 89 | /**************************************** |
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| 90 | * Receive byte and send ACK |
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| 91 | ****************************************/ |
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| 92 | void I2C_ReceiveByte(void) { |
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| 93 | TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWIE) | (1 << TWEA); |
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| 94 | } |
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| 95 | |||
| 96 | /**************************************** |
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| 97 | * I2C receive last byte and send no ACK |
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| 98 | ****************************************/ |
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| 99 | void I2C_ReceiveLastByte(void) { |
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| 100 | TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWIE); |
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| 101 | } |
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| 102 | |||
| 103 | /**************************************** |
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| 104 | * Reset I2C |
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| 105 | ****************************************/ |
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| 106 | void I2C_Reset(void) { |
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| 107 | // stop i2c bus |
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| 108 | I2C_Stop(TWI_STATE_IDLE); |
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| 109 | TWCR = (1 << TWINT); // reset to original state incl. interrupt flag reset |
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| 110 | TWAMR = 0; |
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| 111 | TWAR = 0; |
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| 112 | TWDR = 0; |
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| 113 | TWSR = 0; |
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| 114 | TWBR = 0; |
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| 115 | I2C_init(); |
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| 116 | } |
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| 117 | |||
| 118 | /**************************************** |
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| 119 | * I2C ISR |
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| 120 | ****************************************/ |
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| 121 | ISR (TWI_vect) |
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| 122 | { |
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| 123 | switch (twi_state) { // First i2c_start from SendMotorData() |
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| 124 | case 0: break; |
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| 125 | |||
| 126 | // Writing ADC values. |
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| 127 | case 7: |
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| 128 | twi_state++; |
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| 129 | I2C_WriteByte(0x98); // Address the DAC |
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| 130 | break; |
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| 131 | |||
| 132 | case 8: |
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| 133 | twi_state++; |
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| 134 | I2C_WriteByte(0x10 + (DACChannel << 1)); // Select DAC Channel (0x10 = A, 0x12 = B, 0x14 = C) |
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| 135 | break; |
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| 136 | |||
| 137 | case 9: |
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| 138 | twi_state++; |
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| 139 | I2C_WriteByte(DACValues[DACChannel]); |
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| 140 | break; |
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| 141 | |||
| 142 | case 10: |
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| 143 | twi_state++; |
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| 144 | I2C_WriteByte(0x80); // 2nd byte for all channels is 0x80 |
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| 145 | break; |
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| 146 | |||
| 147 | case 11: |
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| 148 | twi_state++; |
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| 149 | I2C_Stop(TWI_STATE_IDLE); |
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| 150 | I2CTimeout = 10; |
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| 151 | // repeat case 7...10 until all DAC Channels are updated |
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| 152 | if (DACChannel < 2) { |
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| 153 | DACChannel++; // jump to next channel |
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| 154 | I2C_Start(TWI_STATE_GYRO_OFFSET_TX); // start transmission for next channel |
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| 155 | } else { |
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| 156 | DACChannel = 0; // reset dac channel counter |
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| 157 | } |
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| 158 | break; |
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| 159 | |||
| 160 | default: |
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| 161 | I2C_Stop(TWI_STATE_IDLE); |
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| 162 | I2CTimeout = 10; |
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| 163 | } |
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| 164 | } |