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66 jan-hendri 1
   1               		.file	"uart.c"
2
   2               	__SREG__ = 0x3f
3
   3               	__SP_H__ = 0x3e
4
   4               	__SP_L__ = 0x3d
5
   5               	__tmp_reg__ = 0
6
   6               	__zero_reg__ = 1
7
   7               		.global __do_copy_data
8
   8               		.global __do_clear_bss
9
  11               		.text
10
  12               	.Ltext0:
11
 100               	.global	__vector_13
12
 102               	__vector_13:
13
 103               		.stabd	46,0,0
14
   1:src/uart.c    **** // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
15
   2:src/uart.c    **** // + Regler für Brushless-Motoren
16
   3:src/uart.c    **** // + ATMEGA8 mit 8MHz
17
   4:src/uart.c    **** // + (c) 01.2007 Holger Buss
18
   5:src/uart.c    **** // + Nur für den privaten Gebrauch
19
   6:src/uart.c    **** // + Keine Garantie auf Fehlerfreiheit
20
   7:src/uart.c    **** // + Kommerzielle Nutzung nur mit meiner Zustimmung
21
   8:src/uart.c    **** // + Der Code ist für die Hardware BL_Ctrl V1.0 entwickelt worden
22
   9:src/uart.c    **** // + www.mikrocontroller.com
23
  10:src/uart.c    **** // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
24
  11:src/uart.c    ****
25
  12:src/uart.c    **** #include "main.h"
26
  13:src/uart.c    **** #include "uart.h"
27
  14:src/uart.c    ****
28
  15:src/uart.c    **** #define MAX_SENDE_BUFF     100
29
  16:src/uart.c    **** #define MAX_EMPFANGS_BUFF  100
30
  17:src/uart.c    ****
31
  18:src/uart.c    **** unsigned volatile char SIO_Sollwert = 0;
32
  19:src/uart.c    **** unsigned volatile char SioTmp = 0;
33
  20:src/uart.c    **** unsigned volatile char SendeBuffer[MAX_SENDE_BUFF];
34
  21:src/uart.c    **** unsigned volatile char RxdBuffer[MAX_EMPFANGS_BUFF];
35
  22:src/uart.c    **** unsigned volatile char NeuerDatensatzEmpfangen = 0;
36
  23:src/uart.c    **** unsigned volatile char UebertragungAbgeschlossen = 1;
37
  24:src/uart.c    **** unsigned char MeineSlaveAdresse;
38
  25:src/uart.c    **** unsigned char MotorTest[4] = {0,0,0,0};
39
  26:src/uart.c    **** unsigned volatile char AnzahlEmpfangsBytes = 0;
40
  27:src/uart.c    ****
41
  28:src/uart.c    **** struct str_DebugOut    DebugOut;
42
  29:src/uart.c    ****
43
  30:src/uart.c    ****
44
  31:src/uart.c    **** int Debug_Timer;
45
  32:src/uart.c    ****
46
  33:src/uart.c    ****
47
  34:src/uart.c    **** SIGNAL(INT_VEC_TX)
48
  35:src/uart.c    **** {
49
 105               	.LM0:
50
 106               	.LFBB1:
51
 107               	/* prologue: frame size=0 */
52
 108 0000 1F92      		push __zero_reg__
53
 109 0002 0F92      		push __tmp_reg__
54
 110 0004 0FB6      		in __tmp_reg__,__SREG__
55
 111 0006 0F92      		push __tmp_reg__
56
 112 0008 1124      		clr __zero_reg__
57
 113               	/* prologue end (size=5) */
58
 114               	/* epilogue: frame size=0 */
59
 115 000a 0F90      		pop __tmp_reg__
60
 116 000c 0FBE      		out __SREG__,__tmp_reg__
61
 117 000e 0F90      		pop __tmp_reg__
62
 118 0010 1F90      		pop __zero_reg__
63
 119 0012 1895      		reti
64
 120               	/* epilogue end (size=5) */
65
 121               	/* function __vector_13 size 10 (0) */
66
 123               	.Lscope1:
67
 125               		.stabd	78,0,0
68
 127               	.global	SendUart
69
 129               	SendUart:
70
 130               		.stabd	46,0,0
71
  36:src/uart.c    **** }
72
  37:src/uart.c    ****
73
  38:src/uart.c    **** void SendUart(void)
74
  39:src/uart.c    **** {
75
 132               	.LM1:
76
 133               	.LFBB2:
77
 134               	/* prologue: frame size=0 */
78
 135               	/* prologue end (size=0) */
79
  40:src/uart.c    ****  static unsigned int ptr = 0;
80
  41:src/uart.c    ****  unsigned char tmp_tx;
81
  42:src/uart.c    ****  if(!(UCSRA & 0x40)) return;
82
 137               	.LM2:
83
 138 0014 5E9B      		sbis 43-0x20,6
84
 139 0016 00C0      		rjmp .L11
85
  43:src/uart.c    ****  if(!UebertragungAbgeschlossen)
86
 141               	.LM3:
87
 142 0018 8091 0000 		lds r24,UebertragungAbgeschlossen
88
 143 001c 8823      		tst r24
89
 144 001e 01F4      		brne .L6
90
  44:src/uart.c    ****   {
91
  45:src/uart.c    ****    ptr++;                    // die [0] wurde schon gesendet
92
 146               	.LM4:
93
 147 0020 8091 0000 		lds r24,ptr.2069
94
 148 0024 9091 0000 		lds r25,(ptr.2069)+1
95
 149 0028 0196      		adiw r24,1
96
 150 002a 9093 0000 		sts (ptr.2069)+1,r25
97
 151 002e 8093 0000 		sts ptr.2069,r24
98
  46:src/uart.c    ****    tmp_tx = SendeBuffer[ptr];
99
 153               	.LM5:
100
 154 0032 FC01      		movw r30,r24
101
 155 0034 E050      		subi r30,lo8(-(SendeBuffer))
102
 156 0036 F040      		sbci r31,hi8(-(SendeBuffer))
103
 157 0038 E081      		ld r30,Z
104
  47:src/uart.c    ****    if((tmp_tx == '\r') || (ptr == MAX_SENDE_BUFF))
105
 159               	.LM6:
106
 160 003a ED30      		cpi r30,lo8(13)
107
 161 003c 01F0      		breq .L8
108
 162 003e 8436      		cpi r24,100
109
 163 0040 9105      		cpc r25,__zero_reg__
110
 164 0042 01F4      		brne .L10
111
 165               	.L8:
112
  48:src/uart.c    ****     {
113
  49:src/uart.c    ****      ptr = 0;
114
 167               	.LM7:
115
 168 0044 1092 0000 		sts (ptr.2069)+1,__zero_reg__
116
 169 0048 1092 0000 		sts ptr.2069,__zero_reg__
117
  50:src/uart.c    ****      UebertragungAbgeschlossen = 1;
118
 171               	.LM8:
119
 172 004c 81E0      		ldi r24,lo8(1)
120
 173 004e 8093 0000 		sts UebertragungAbgeschlossen,r24
121
 174               	.L10:
122
  51:src/uart.c    ****     }
123
  52:src/uart.c    ****    USR |= (1<TXC);
124
 176               	.LM9:
125
 177 0052 589A      		sbi 43-0x20,0
126
  53:src/uart.c    ****    UDR = tmp_tx;
127
 179               	.LM10:
128
 180 0054 ECB9      		out 44-0x20,r30
129
 181 0056 0895      		ret
130
 182               	.L6:
131
  54:src/uart.c    ****   }
132
  55:src/uart.c    ****   else ptr = 0;
133
 184               	.LM11:
134
 185 0058 1092 0000 		sts (ptr.2069)+1,__zero_reg__
135
 186 005c 1092 0000 		sts ptr.2069,__zero_reg__
136
 187               	.L11:
137
 188 0060 0895      		ret
138
 189               	/* epilogue: frame size=0 */
139
 190               	/* epilogue: noreturn */
140
 191               	/* epilogue end (size=0) */
141
 192               	/* function SendUart size 39 (39) */
142
 198               	.Lscope2:
143
 200               		.stabd	78,0,0
144
 206               	.global	Decode64
145
 208               	Decode64:
146
 209               		.stabd	46,0,0
147
  56:src/uart.c    **** }
148
  57:src/uart.c    ****
149
  58:src/uart.c    **** // --------------------------------------------------------------------------
150
  59:src/uart.c    **** void Decode64(unsigned char *ptrOut, unsigned char len, unsigned char ptrIn,unsigned char max)  //
151
  60:src/uart.c    **** {
152
 211               	.LM12:
153
 212               	.LFBB3:
154
 213               	/* prologue: frame size=0 */
155
 214 0062 1F93      		push r17
156
 215 0064 CF93      		push r28
157
 216 0066 DF93      		push r29
158
 217               	/* prologue end (size=3) */
159
 218 0068 EC01      		movw r28,r24
160
 219 006a 70E0      		ldi r23,lo8(0)
161
  61:src/uart.c    ****  unsigned char a,b,c,d;
162
  62:src/uart.c    ****  unsigned char ptr = 0;
163
  63:src/uart.c    ****  unsigned char x,y,z;
164
  64:src/uart.c    ****  while(len)
165
  65:src/uart.c    ****   {
166
  66:src/uart.c    ****    a = RxdBuffer[ptrIn++] - '=';
167
  67:src/uart.c    ****    b = RxdBuffer[ptrIn++] - '=';
168
  68:src/uart.c    ****    c = RxdBuffer[ptrIn++] - '=';
169
  69:src/uart.c    ****    d = RxdBuffer[ptrIn++] - '=';
170
  70:src/uart.c    ****    if(ptrIn > max - 2) break;     // nicht mehr Daten verarbeiten, als empfangen wurden
171
 221               	.LM13:
172
 222 006c A22F      		mov r26,r18
173
 223 006e BB27      		clr r27
174
 224 0070 1297      		sbiw r26,2
175
 225 0072 00C0      		rjmp .L13
176
 226               	.L14:
177
 228               	.LM14:
178
 229 0074 E42F      		mov r30,r20
179
 230 0076 FF27      		clr r31
180
 231 0078 E050      		subi r30,lo8(-(RxdBuffer))
181
 232 007a F040      		sbci r31,hi8(-(RxdBuffer))
182
 233 007c 3081      		ld r19,Z
183
 235               	.LM15:
184
 236 007e 4F5F      		subi r20,lo8(-(1))
185
 237 0080 E42F      		mov r30,r20
186
 238 0082 FF27      		clr r31
187
 239 0084 E050      		subi r30,lo8(-(RxdBuffer))
188
 240 0086 F040      		sbci r31,hi8(-(RxdBuffer))
189
 241 0088 5081      		ld r21,Z
190
 243               	.LM16:
191
 244 008a 4F5F      		subi r20,lo8(-(1))
192
 245 008c E42F      		mov r30,r20
193
 246 008e FF27      		clr r31
194
 247 0090 E050      		subi r30,lo8(-(RxdBuffer))
195
 248 0092 F040      		sbci r31,hi8(-(RxdBuffer))
196
 249 0094 1081      		ld r17,Z
197
 251               	.LM17:
198
 252 0096 4F5F      		subi r20,lo8(-(1))
199
 253 0098 E42F      		mov r30,r20
200
 254 009a FF27      		clr r31
201
 255 009c E050      		subi r30,lo8(-(RxdBuffer))
202
 256 009e F040      		sbci r31,hi8(-(RxdBuffer))
203
 257 00a0 2081      		ld r18,Z
204
 258 00a2 4F5F      		subi r20,lo8(-(1))
205
 260               	.LM18:
206
 261 00a4 842F      		mov r24,r20
207
 262 00a6 9927      		clr r25
208
 263 00a8 A817      		cp r26,r24
209
 264 00aa B907      		cpc r27,r25
210
 265 00ac 04F0      		brlt .L19
211
 267               	.LM19:
212
 268 00ae 5D53      		subi r21,lo8(-(-61))
213
  71:src/uart.c    ****
214
  72:src/uart.c    ****    x = (a << 2) | (b >> 4);
215
  73:src/uart.c    ****    y = ((b & 0x0f) << 4) | (c >> 2);
216
  74:src/uart.c    ****    z = ((c & 0x03) << 6) | d;
217
  75:src/uart.c    ****
218
  76:src/uart.c    ****    if(len--) ptrOut[ptr++] = x; else break;
219
 270               	.LM20:
220
 271 00b0 FE01      		movw r30,r28
221
 272 00b2 E70F      		add r30,r23
222
 273 00b4 F11D      		adc r31,__zero_reg__
223
 274 00b6 852F      		mov r24,r21
224
 275 00b8 8295      		swap r24
225
 276 00ba 8F70      		andi r24,0x0f
226
 277 00bc 3D53      		subi r19,lo8(-(-61))
227
 278 00be 330F      		lsl r19
228
 279 00c0 330F      		lsl r19
229
 280 00c2 382B      		or r19,r24
230
 281 00c4 3083      		st Z,r19
231
  77:src/uart.c    ****    if(len--) ptrOut[ptr++] = y; else break;
232
 283               	.LM21:
233
 284 00c6 6130      		cpi r22,lo8(1)
234
 285 00c8 01F0      		breq .L19
235
 287               	.LM22:
236
 288 00ca 912F      		mov r25,r17
237
 289 00cc 9D53      		subi r25,lo8(-(-61))
238
 291               	.LM23:
239
 292 00ce 7F5F      		subi r23,lo8(-(1))
240
 293 00d0 FE01      		movw r30,r28
241
 294 00d2 E70F      		add r30,r23
242
 295 00d4 F11D      		adc r31,__zero_reg__
243
 296 00d6 7150      		subi r23,lo8(-(-1))
244
 297 00d8 5295      		swap r21
245
 298 00da 507F      		andi r21,0xf0
246
 299 00dc 892F      		mov r24,r25
247
 300 00de 8695      		lsr r24
248
 301 00e0 8695      		lsr r24
249
 302 00e2 582B      		or r21,r24
250
 303 00e4 5083      		st Z,r21
251
 304 00e6 6350      		subi r22,lo8(-(-3))
252
  78:src/uart.c    ****    if(len--) ptrOut[ptr++] = z;	else break;
253
 306               	.LM24:
254
 307 00e8 6F3F      		cpi r22,lo8(-1)
255
 308 00ea 01F0      		breq .L19
256
 309 00ec 7E5F      		subi r23,lo8(-(2))
257
 310 00ee FE01      		movw r30,r28
258
 311 00f0 E70F      		add r30,r23
259
 312 00f2 F11D      		adc r31,__zero_reg__
260
 313 00f4 9295      		swap r25
261
 314 00f6 990F      		lsl r25
262
 315 00f8 990F      		lsl r25
263
 316 00fa 907C      		andi r25,0xc0
264
 317 00fc 2D53      		subi r18,lo8(-(-61))
265
 318 00fe 922B      		or r25,r18
266
 319 0100 9083      		st Z,r25
267
 320 0102 7F5F      		subi r23,lo8(-(1))
268
 321               	.L13:
269
 323               	.LM25:
270
 324 0104 6623      		tst r22
271
 325 0106 01F0      		breq .+2
272
 326 0108 00C0      		rjmp .L14
273
 327               	.L19:
274
 328               	/* epilogue: frame size=0 */
275
 329 010a DF91      		pop r29
276
 330 010c CF91      		pop r28
277
 331 010e 1F91      		pop r17
278
 332 0110 0895      		ret
279
 333               	/* epilogue end (size=4) */
280
 334               	/* function Decode64 size 88 (81) */
281
 341               	.Lscope3:
282
 343               		.stabd	78,0,0
283
 346               	.global	AddCRC
284
 348               	AddCRC:
285
 349               		.stabd	46,0,0
286
  79:src/uart.c    ****   }
287
  80:src/uart.c    ****
288
  81:src/uart.c    **** }
289
  82:src/uart.c    ****
290
  83:src/uart.c    ****
291
  84:src/uart.c    **** //+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
292
  85:src/uart.c    **** //++ Empfangs-Part der Datenübertragung
293
  86:src/uart.c    **** //+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
294
  87:src/uart.c    **** SIGNAL(INT_VEC_RX)
295
  88:src/uart.c    **** {
296
  89:src/uart.c    ****
297
  90:src/uart.c    **** #if  X3D_SIO == 1
298
  91:src/uart.c    ****  static unsigned char serPacketCounter = 100;
299
  92:src/uart.c    ****     SioTmp = UDR;
300
  93:src/uart.c    **** 	if(SioTmp == 0xF5)     // Startzeichen
301
  94:src/uart.c    **** 	 {
302
  95:src/uart.c    ****   	  serPacketCounter = 0;
303
  96:src/uart.c    **** 	 }
304
  97:src/uart.c    **** 	else
305
  98:src/uart.c    **** 	 {
306
  99:src/uart.c    ****     	  if(++serPacketCounter == MotorAdresse) // (1-4)
307
 100:src/uart.c    ****     	  {
308
 101:src/uart.c    ****     		SIO_Sollwert = SioTmp;
309
 102:src/uart.c    ****             SIO_Timeout = 200; // werte für 200ms gültig
310
 103:src/uart.c    ****     	  }
311
 104:src/uart.c    ****     	  else
312
 105:src/uart.c    ****     	  {
313
 106:src/uart.c    ****     	   if(serPacketCounter > 100) serPacketCounter = 100;
314
 107:src/uart.c    **** 		  }
315
 108:src/uart.c    **** 	 }
316
 109:src/uart.c    **** #else
317
 110:src/uart.c    ****  static unsigned int crc;
318
 111:src/uart.c    ****  static unsigned char crc1,crc2,buf_ptr;
319
 112:src/uart.c    ****  static unsigned char UartState = 0;
320
 113:src/uart.c    ****  unsigned char CrcOkay = 0;
321
 114:src/uart.c    ****
322
 115:src/uart.c    ****  SioTmp = UDR;
323
 116:src/uart.c    ****  if(buf_ptr >= MAX_EMPFANGS_BUFF)    UartState = 0;
324
 117:src/uart.c    ****  if(SioTmp == '\r' && UartState == 2)
325
 118:src/uart.c    ****   {
326
 119:src/uart.c    ****    UartState = 0;
327
 120:src/uart.c    ****    crc -= RxdBuffer[buf_ptr-2];
328
 121:src/uart.c    ****    crc -= RxdBuffer[buf_ptr-1];
329
 122:src/uart.c    ****    crc %= 4096;
330
 123:src/uart.c    ****    crc1 = '=' + crc / 64;
331
 124:src/uart.c    ****    crc2 = '=' + crc % 64;
332
 125:src/uart.c    ****    CrcOkay = 0;
333
 126:src/uart.c    ****    if((crc1 == RxdBuffer[buf_ptr-2]) && (crc2 == RxdBuffer[buf_ptr-1])) CrcOkay = 1; else { CrcOkay
334
 127:src/uart.c    ****    if(CrcOkay) // Datensatz schon verarbeitet
335
 128:src/uart.c    ****     {
336
 129:src/uart.c    ****      //NeuerDatensatzEmpfangen = 1;
337
 130:src/uart.c    **** 	 AnzahlEmpfangsBytes = buf_ptr;
338
 131:src/uart.c    ****
339
 132:src/uart.c    ****      RxdBuffer[buf_ptr] = '\r';
340
 133:src/uart.c    **** 	 if(/*(RxdBuffer[1] == MeineSlaveAdresse || (RxdBuffer[1] == 'a')) && */(RxdBuffer[2] == 'R')) wdt
341
 134:src/uart.c    ****      uart_putchar(RxdBuffer[2]);
342
 135:src/uart.c    **** 	 if (RxdBuffer[2] == 't') // Motortest
343
 136:src/uart.c    ****             { Decode64((unsigned char *) &MotorTest[0],sizeof(MotorTest),3,AnzahlEmpfangsBytes);
344
 137:src/uart.c    **** 			  SIO_Sollwert = MotorTest[MotorAdresse - 1];
345
 138:src/uart.c    ****               SIO_Timeout = 500; // werte für 500ms gültig
346
 139:src/uart.c    ****
347
 140:src/uart.c    **** 			}
348
 141:src/uart.c    **** 	}
349
 142:src/uart.c    ****   }
350
 143:src/uart.c    ****   else
351
 144:src/uart.c    ****   switch(UartState)
352
 145:src/uart.c    ****   {
353
 146:src/uart.c    ****    case 0:
354
 147:src/uart.c    ****           if(SioTmp == '#' && !NeuerDatensatzEmpfangen) UartState = 1;  // Startzeichen und Daten s
355
 148:src/uart.c    **** 		  buf_ptr = 0;
356
 149:src/uart.c    **** 		  RxdBuffer[buf_ptr++] = SioTmp;
357
 150:src/uart.c    **** 		  crc = SioTmp;
358
 151:src/uart.c    ****           break;
359
 152:src/uart.c    ****    case 1: // Adresse auswerten
360
 153:src/uart.c    **** 		  UartState++;
361
 154:src/uart.c    **** 		  RxdBuffer[buf_ptr++] = SioTmp;
362
 155:src/uart.c    **** 		  crc += SioTmp;
363
 156:src/uart.c    **** 		  break;
364
 157:src/uart.c    ****    case 2: //  Eingangsdaten sammeln
365
 158:src/uart.c    **** 		  RxdBuffer[buf_ptr] = SioTmp;
366
 159:src/uart.c    **** 		  if(buf_ptr < MAX_EMPFANGS_BUFF) buf_ptr++;
367
 160:src/uart.c    **** 		  else UartState = 0;
368
 161:src/uart.c    **** 		  crc += SioTmp;
369
 162:src/uart.c    **** 		  break;
370
 163:src/uart.c    ****    default:
371
 164:src/uart.c    ****           UartState = 0;
372
 165:src/uart.c    ****           break;
373
 166:src/uart.c    ****   }
374
 167:src/uart.c    ****
375
 168:src/uart.c    ****
376
 169:src/uart.c    **** #endif
377
 170:src/uart.c    **** };
378
 171:src/uart.c    ****
379
 172:src/uart.c    ****
380
 173:src/uart.c    **** // --------------------------------------------------------------------------
381
 174:src/uart.c    **** void AddCRC(unsigned int wieviele)
382
 175:src/uart.c    **** {
383
 351               	.LM26:
384
 352               	.LFBB4:
385
 353               	/* prologue: frame size=0 */
386
 354               	/* prologue end (size=0) */
387
 355 0112 DC01      		movw r26,r24
388
 356 0114 20E0      		ldi r18,lo8(0)
389
 357 0116 30E0      		ldi r19,hi8(0)
390
 358 0118 40E0      		ldi r20,lo8(0)
391
 359 011a 50E0      		ldi r21,hi8(0)
392
 360 011c 00C0      		rjmp .L21
393
 361               	.L22:
394
 176:src/uart.c    ****  unsigned int tmpCRC = 0,i;
395
 177:src/uart.c    ****  for(i = 0; i < wieviele;i++)
396
 178:src/uart.c    ****   {
397
 179:src/uart.c    ****    tmpCRC += SendeBuffer[i];
398
 363               	.LM27:
399
 364 011e FA01      		movw r30,r20
400
 365 0120 E050      		subi r30,lo8(-(SendeBuffer))
401
 366 0122 F040      		sbci r31,hi8(-(SendeBuffer))
402
 367 0124 8081      		ld r24,Z
403
 368 0126 280F      		add r18,r24
404
 369 0128 311D      		adc r19,__zero_reg__
405
 371               	.LM28:
406
 372 012a 4F5F      		subi r20,lo8(-(1))
407
 373 012c 5F4F      		sbci r21,hi8(-(1))
408
 374               	.L21:
409
 375 012e 4A17      		cp r20,r26
410
 376 0130 5B07      		cpc r21,r27
411
 377 0132 01F4      		brne .L22
412
 180:src/uart.c    ****   }
413
 181:src/uart.c    ****    tmpCRC %= 4096;
414
 379               	.LM29:
415
 380 0134 3F70      		andi r19,hi8(4095)
416
 182:src/uart.c    ****    SendeBuffer[i++] = '=' + tmpCRC / 64;
417
 382               	.LM30:
418
 383 0136 C901      		movw r24,r18
419
 384 0138 36E0      		ldi r19,6
420
 385 013a 9695      	1:	lsr r25
421
 386 013c 8795      		ror r24
422
 387 013e 3A95      		dec r19
423
 388 0140 01F4      		brne 1b
424
 389 0142 835C      		subi r24,lo8(-(61))
425
 390 0144 FD01      		movw r30,r26
426
 391 0146 E050      		subi r30,lo8(-(SendeBuffer))
427
 392 0148 F040      		sbci r31,hi8(-(SendeBuffer))
428
 393 014a 8083      		st Z,r24
429
 394 014c 1196      		adiw r26,1
430
 183:src/uart.c    ****    SendeBuffer[i++] = '=' + tmpCRC % 64;
431
 396               	.LM31:
432
 397 014e 2F73      		andi r18,lo8(63)
433
 398 0150 235C      		subi r18,lo8(-(61))
434
 399 0152 FD01      		movw r30,r26
435
 400 0154 E050      		subi r30,lo8(-(SendeBuffer))
436
 401 0156 F040      		sbci r31,hi8(-(SendeBuffer))
437
 402 0158 2083      		st Z,r18
438
 184:src/uart.c    ****    SendeBuffer[i++] = '\r';
439
 404               	.LM32:
440
 405 015a A050      		subi r26,lo8(-(SendeBuffer+1))
441
 406 015c B040      		sbci r27,hi8(-(SendeBuffer+1))
442
 407 015e 8DE0      		ldi r24,lo8(13)
443
 408 0160 8C93      		st X,r24
444
 185:src/uart.c    ****   UebertragungAbgeschlossen = 0;
445
 410               	.LM33:
446
 411 0162 1092 0000 		sts UebertragungAbgeschlossen,__zero_reg__
447
 186:src/uart.c    ****   UDR = SendeBuffer[0];
448
 413               	.LM34:
449
 414 0166 8091 0000 		lds r24,SendeBuffer
450
 415 016a 8CB9      		out 44-0x20,r24
451
 416               	/* epilogue: frame size=0 */
452
 417 016c 0895      		ret
453
 418               	/* epilogue end (size=1) */
454
 419               	/* function AddCRC size 47 (46) */
455
 425               	.Lscope4:
456
 427               		.stabd	78,0,0
457
 433               	.global	SendOutData
458
 435               	SendOutData:
459
 436               		.stabd	46,0,0
460
 187:src/uart.c    **** }
461
 188:src/uart.c    ****
462
 189:src/uart.c    ****
463
 190:src/uart.c    **** // --------------------------------------------------------------------------
464
 191:src/uart.c    **** void SendOutData(unsigned char cmd,unsigned char modul, unsigned char *snd, unsigned char len)
465
 192:src/uart.c    **** {
466
 438               	.LM35:
467
 439               	.LFBB5:
468
 440               	/* prologue: frame size=0 */
469
 441 016e 1F93      		push r17
470
 442 0170 CF93      		push r28
471
 443 0172 DF93      		push r29
472
 444               	/* prologue end (size=3) */
473
 445 0174 EA01      		movw r28,r20
474
 446 0176 722F      		mov r23,r18
475
 193:src/uart.c    ****  unsigned int pt = 0;
476
 194:src/uart.c    ****  unsigned char a,b,c;
477
 195:src/uart.c    ****  unsigned char ptr = 0;
478
 196:src/uart.c    ****
479
 197:src/uart.c    ****
480
 198:src/uart.c    ****  SendeBuffer[pt++] = '#';               // Startzeichen
481
 448               	.LM36:
482
 449 0178 93E2      		ldi r25,lo8(35)
483
 450 017a 9093 0000 		sts SendeBuffer,r25
484
 199:src/uart.c    ****  SendeBuffer[pt++] = modul;             // Adresse (a=0; b=1,...)
485
 452               	.LM37:
486
 453 017e 6093 0000 		sts SendeBuffer+1,r22
487
 200:src/uart.c    ****  SendeBuffer[pt++] = cmd;		        // Commando
488
 455               	.LM38:
489
 456 0182 8093 0000 		sts SendeBuffer+2,r24
490
 457 0186 A3E0      		ldi r26,lo8(3)
491
 458 0188 B0E0      		ldi r27,hi8(3)
492
 459 018a 60E0      		ldi r22,lo8(0)
493
 460 018c 00C0      		rjmp .L26
494
 461               	.L27:
495
 201:src/uart.c    ****
496
 202:src/uart.c    ****  while(len)
497
 203:src/uart.c    ****   {
498
 204:src/uart.c    ****    if(len) { a = snd[ptr++]; len--;} else a = 0;
499
 463               	.LM39:
500
 464 018e FE01      		movw r30,r28
501
 465 0190 E60F      		add r30,r22
502
 466 0192 F11D      		adc r31,__zero_reg__
503
 467 0194 9081      		ld r25,Z
504
 468 0196 6F5F      		subi r22,lo8(-(1))
505
 469 0198 7150      		subi r23,lo8(-(-1))
506
 205:src/uart.c    ****    if(len) { b = snd[ptr++]; len--;} else b = 0;
507
 471               	.LM40:
508
 472 019a 01F4      		brne .L28
509
 473 019c 10E0      		ldi r17,lo8(0)
510
 474 019e 40E0      		ldi r20,lo8(0)
511
 475 01a0 00C0      		rjmp .L30
512
 476               	.L28:
513
 477 01a2 FE01      		movw r30,r28
514
 478 01a4 E60F      		add r30,r22
515
 479 01a6 F11D      		adc r31,__zero_reg__
516
 480 01a8 4081      		ld r20,Z
517
 481 01aa 6F5F      		subi r22,lo8(-(1))
518
 482 01ac 7150      		subi r23,lo8(-(-1))
519
 206:src/uart.c    ****    if(len) { c = snd[ptr++]; len--;} else c = 0;
520
 484               	.LM41:
521
 485 01ae 01F4      		brne .L31
522
 486 01b0 10E0      		ldi r17,lo8(0)
523
 487 01b2 00C0      		rjmp .L30
524
 488               	.L31:
525
 489 01b4 FE01      		movw r30,r28
526
 490 01b6 E60F      		add r30,r22
527
 491 01b8 F11D      		adc r31,__zero_reg__
528
 492 01ba 1081      		ld r17,Z
529
 493 01bc 6F5F      		subi r22,lo8(-(1))
530
 494 01be 7150      		subi r23,lo8(-(-1))
531
 495               	.L30:
532
 207:src/uart.c    ****    SendeBuffer[pt++] = '=' + (a >> 2);
533
 497               	.LM42:
534
 498 01c0 892F      		mov r24,r25
535
 499 01c2 8695      		lsr r24
536
 500 01c4 8695      		lsr r24
537
 501 01c6 835C      		subi r24,lo8(-(61))
538
 502 01c8 FD01      		movw r30,r26
539
 503 01ca E050      		subi r30,lo8(-(SendeBuffer))
540
 504 01cc F040      		sbci r31,hi8(-(SendeBuffer))
541
 505 01ce 8083      		st Z,r24
542
 208:src/uart.c    ****    SendeBuffer[pt++] = '=' + (((a & 0x03) << 4) | ((b & 0xf0) >> 4));
543
 507               	.LM43:
544
 508 01d0 5527      		clr r21
545
 509 01d2 9A01      		movw r18,r20
546
 510 01d4 84E0      		ldi r24,4
547
 511 01d6 3695      	1:	lsr r19
548
 512 01d8 2795      		ror r18
549
 513 01da 8A95      		dec r24
550
 514 01dc 01F4      		brne 1b
551
 515 01de 892F      		mov r24,r25
552
 516 01e0 9927      		clr r25
553
 517 01e2 8370      		andi r24,lo8(3)
554
 518 01e4 9070      		andi r25,hi8(3)
555
 519 01e6 F4E0      		ldi r31,4
556
 520 01e8 880F      	1:	lsl r24
557
 521 01ea 991F      		rol r25
558
 522 01ec FA95      		dec r31
559
 523 01ee 01F4      		brne 1b
560
 524 01f0 282B      		or r18,r24
561
 525 01f2 235C      		subi r18,lo8(-(61))
562
 526 01f4 FD01      		movw r30,r26
563
 527 01f6 E050      		subi r30,lo8(-(SendeBuffer+1))
564
 528 01f8 F040      		sbci r31,hi8(-(SendeBuffer+1))
565
 529 01fa 2083      		st Z,r18
566
 209:src/uart.c    ****    SendeBuffer[pt++] = '=' + (((b & 0x0f) << 2) | ((c & 0xc0) >> 6));
567
 531               	.LM44:
568
 532 01fc 812F      		mov r24,r17
569
 533 01fe 8295      		swap r24
570
 534 0200 8695      		lsr r24
571
 535 0202 8695      		lsr r24
572
 536 0204 8370      		andi r24,0x3
573
 537 0206 4F70      		andi r20,lo8(15)
574
 538 0208 5070      		andi r21,hi8(15)
575
 539 020a 440F      		lsl r20
576
 540 020c 551F      		rol r21
577
 541 020e 440F      		lsl r20
578
 542 0210 551F      		rol r21
579
 543 0212 842B      		or r24,r20
580
 544 0214 835C      		subi r24,lo8(-(61))
581
 545 0216 FD01      		movw r30,r26
582
 546 0218 E050      		subi r30,lo8(-(SendeBuffer+2))
583
 547 021a F040      		sbci r31,hi8(-(SendeBuffer+2))
584
 548 021c 8083      		st Z,r24
585
 210:src/uart.c    ****    SendeBuffer[pt++] = '=' + ( c & 0x3f);
586
 550               	.LM45:
587
 551 021e 1F73      		andi r17,lo8(63)
588
 552 0220 135C      		subi r17,lo8(-(61))
589
 553 0222 FD01      		movw r30,r26
590
 554 0224 E050      		subi r30,lo8(-(SendeBuffer+3))
591
 555 0226 F040      		sbci r31,hi8(-(SendeBuffer+3))
592
 556 0228 1083      		st Z,r17
593
 557 022a 1496      		adiw r26,4
594
 558               	.L26:
595
 560               	.LM46:
596
 561 022c 7723      		tst r23
597
 562 022e 01F0      		breq .+2
598
 563 0230 00C0      		rjmp .L27
599
 211:src/uart.c    ****   }
600
 212:src/uart.c    ****  AddCRC(pt);
601
 565               	.LM47:
602
 566 0232 CD01      		movw r24,r26
603
 567 0234 00D0      		rcall AddCRC
604
 568               	/* epilogue: frame size=0 */
605
 569 0236 DF91      		pop r29
606
 570 0238 CF91      		pop r28
607
 571 023a 1F91      		pop r17
608
 572 023c 0895      		ret
609
 573               	/* epilogue end (size=4) */
610
 574               	/* function SendOutData size 106 (99) */
611
 583               	.Lscope5:
612
 585               		.stabd	78,0,0
613
 588               	.global	uart_putchar
614
 590               	uart_putchar:
615
 591               		.stabd	46,0,0
616
 213:src/uart.c    **** }
617
 214:src/uart.c    ****
618
 215:src/uart.c    ****
619
 216:src/uart.c    ****
620
 217:src/uart.c    **** //############################################################################
621
 218:src/uart.c    **** //Routine für die Serielle Ausgabe
622
 219:src/uart.c    **** int uart_putchar (char c)
623
 220:src/uart.c    **** //############################################################################
624
 221:src/uart.c    **** {
625
 593               	.LM48:
626
 594               	.LFBB6:
627
 595               	/* prologue: frame size=0 */
628
 596 023e 1F93      		push r17
629
 597               	/* prologue end (size=1) */
630
 598 0240 182F      		mov r17,r24
631
 222:src/uart.c    **** 	if (c == '\n')
632
 600               	.LM49:
633
 601 0242 8A30      		cpi r24,lo8(10)
634
 602 0244 01F4      		brne .L40
635
 223:src/uart.c    **** 		uart_putchar('\r');
636
 604               	.LM50:
637
 605 0246 8DE0      		ldi r24,lo8(13)
638
 606 0248 00D0      		rcall uart_putchar
639
 607               	.L40:
640
 224:src/uart.c    **** 	//Warten solange bis Zeichen gesendet wurde
641
 225:src/uart.c    **** 	loop_until_bit_is_set(USR, UDRE);
642
 609               	.LM51:
643
 610 024a 5D9B      		sbis 43-0x20,5
644
 611 024c 00C0      		rjmp .L40
645
 226:src/uart.c    **** 	//Ausgabe des Zeichens
646
 227:src/uart.c    **** 	UDR = c;
647
 613               	.LM52:
648
 614 024e 1CB9      		out 44-0x20,r17
649
 228:src/uart.c    ****
650
 229:src/uart.c    **** 	return (0);
651
 230:src/uart.c    **** }
652
 616               	.LM53:
653
 617 0250 80E0      		ldi r24,lo8(0)
654
 618 0252 90E0      		ldi r25,hi8(0)
655
 619               	/* epilogue: frame size=0 */
656
 620 0254 1F91      		pop r17
657
 621 0256 0895      		ret
658
 622               	/* epilogue end (size=2) */
659
 623               	/* function uart_putchar size 13 (10) */
660
 625               	.Lscope6:
661
 627               		.stabd	78,0,0
662
 629               	.global	__vector_11
663
 631               	__vector_11:
664
 632               		.stabd	46,0,0
665
 634               	.LM54:
666
 635               	.LFBB7:
667
 636               	/* prologue: frame size=0 */
668
 637 0258 1F92      		push __zero_reg__
669
 638 025a 0F92      		push __tmp_reg__
670
 639 025c 0FB6      		in __tmp_reg__,__SREG__
671
 640 025e 0F92      		push __tmp_reg__
672
 641 0260 1124      		clr __zero_reg__
673
 642 0262 2F93      		push r18
674
 643 0264 3F93      		push r19
675
 644 0266 4F93      		push r20
676
 645 0268 5F93      		push r21
677
 646 026a 6F93      		push r22
678
 647 026c 7F93      		push r23
679
 648 026e 8F93      		push r24
680
 649 0270 9F93      		push r25
681
 650 0272 AF93      		push r26
682
 651 0274 BF93      		push r27
683
 652 0276 CF93      		push r28
684
 653 0278 DF93      		push r29
685
 654 027a EF93      		push r30
686
 655 027c FF93      		push r31
687
 656               	/* prologue end (size=19) */
688
 658               	.LM55:
689
 659 027e 8CB1      		in r24,44-0x20
690
 660 0280 8093 0000 		sts SioTmp,r24
691
 662               	.LM56:
692
 663 0284 4091 0000 		lds r20,buf_ptr.2137
693
 664 0288 4436      		cpi r20,lo8(100)
694
 665 028a 00F0      		brlo .L44
695
 667               	.LM57:
696
 668 028c 1092 0000 		sts UartState.2138,__zero_reg__
697
 669               	.L44:
698
 671               	.LM58:
699
 672 0290 5091 0000 		lds r21,SioTmp
700
 673 0294 5D30      		cpi r21,lo8(13)
701
 674 0296 01F0      		breq .+2
702
 675 0298 00C0      		rjmp .L46
703
 676 029a 8091 0000 		lds r24,UartState.2138
704
 677 029e 8230      		cpi r24,lo8(2)
705
 678 02a0 01F0      		breq .+2
706
 679 02a2 00C0      		rjmp .L46
707
 681               	.LM59:
708
 682 02a4 1092 0000 		sts UartState.2138,__zero_reg__
709
 684               	.LM60:
710
 685 02a8 A42F      		mov r26,r20
711
 686 02aa BB27      		clr r27
712
 687 02ac FD01      		movw r30,r26
713
 688 02ae E050      		subi r30,lo8(-(RxdBuffer-2))
714
 689 02b0 F040      		sbci r31,hi8(-(RxdBuffer-2))
715
 690 02b2 3081      		ld r19,Z
716
 692               	.LM61:
717
 693 02b4 ED01      		movw r28,r26
718
 694 02b6 C050      		subi r28,lo8(-(RxdBuffer-1))
719
 695 02b8 D040      		sbci r29,hi8(-(RxdBuffer-1))
720
 696 02ba 2881      		ld r18,Y
721
 698               	.LM62:
722
 699 02bc 8091 0000 		lds r24,crc.2134
723
 700 02c0 9091 0000 		lds r25,(crc.2134)+1
724
 701 02c4 831B      		sub r24,r19
725
 702 02c6 9109      		sbc r25,__zero_reg__
726
 703 02c8 821B      		sub r24,r18
727
 704 02ca 9109      		sbc r25,__zero_reg__
728
 705 02cc 9F70      		andi r25,hi8(4095)
729
 706 02ce 9093 0000 		sts (crc.2134)+1,r25
730
 707 02d2 8093 0000 		sts crc.2134,r24
731
 709               	.LM63:
732
 710 02d6 9C01      		movw r18,r24
733
 711 02d8 96E0      		ldi r25,6
734
 712 02da 3695      	1:	lsr r19
735
 713 02dc 2795      		ror r18
736
 714 02de 9A95      		dec r25
737
 715 02e0 01F4      		brne 1b
738
 716 02e2 235C      		subi r18,lo8(-(61))
739
 717 02e4 2093 0000 		sts crc1.2135,r18
740
 719               	.LM64:
741
 720 02e8 982F      		mov r25,r24
742
 721 02ea 9F73      		andi r25,lo8(63)
743
 722 02ec 935C      		subi r25,lo8(-(61))
744
 723 02ee 9093 0000 		sts crc2.2136,r25
745
 725               	.LM65:
746
 726 02f2 8081      		ld r24,Z
747
 727 02f4 2817      		cp r18,r24
748
 728 02f6 01F0      		breq .+2
749
 729 02f8 00C0      		rjmp .L65
750
 730 02fa 8881      		ld r24,Y
751
 731 02fc 9817      		cp r25,r24
752
 732 02fe 01F0      		breq .+2
753
 733 0300 00C0      		rjmp .L65
754
 735               	.LM66:
755
 736 0302 4093 0000 		sts AnzahlEmpfangsBytes,r20
756
 738               	.LM67:
757
 739 0306 A050      		subi r26,lo8(-(RxdBuffer))
758
 740 0308 B040      		sbci r27,hi8(-(RxdBuffer))
759
 741 030a 5C93      		st X,r21
760
 743               	.LM68:
761
 744 030c 8091 0000 		lds r24,RxdBuffer+2
762
 745 0310 8235      		cpi r24,lo8(82)
763
 746 0312 01F4      		brne .L52
764
 747 0314 88E1      		ldi r24,lo8(24)
765
 748 0316 90E0      		ldi r25,hi8(24)
766
 749 0318 2CE0      		ldi r18,lo8(12)
767
 750               	/* #APP */
768
 751 031a 0FB6      		in __tmp_reg__,__SREG__
769
 752 031c F894      		cli
770
 753 031e A895      		wdr
771
 754 0320 81BD      		out 33,r24
772
 755 0322 0FBE      		out __SREG__,__tmp_reg__
773
 756 0324 21BD      		out 33,r18
774
 757               	/* #NOAPP */
775
 758               	.L52:
776
 760               	.LM69:
777
 761 0326 8091 0000 		lds r24,RxdBuffer+2
778
 762 032a 00D0      		rcall uart_putchar
779
 764               	.LM70:
780
 765 032c 8091 0000 		lds r24,RxdBuffer+2
781
 766 0330 8437      		cpi r24,lo8(116)
782
 767 0332 01F0      		breq .+2
783
 768 0334 00C0      		rjmp .L65
784
 770               	.LM71:
785
 771 0336 2091 0000 		lds r18,AnzahlEmpfangsBytes
786
 772 033a 43E0      		ldi r20,lo8(3)
787
 773 033c 64E0      		ldi r22,lo8(4)
788
 774 033e 80E0      		ldi r24,lo8(MotorTest)
789
 775 0340 90E0      		ldi r25,hi8(MotorTest)
790
 776 0342 00D0      		rcall Decode64
791
 778               	.LM72:
792
 779 0344 E091 0000 		lds r30,MotorAdresse
793
 780 0348 FF27      		clr r31
794
 781 034a E050      		subi r30,lo8(-(MotorTest-1))
795
 782 034c F040      		sbci r31,hi8(-(MotorTest-1))
796
 783 034e 8081      		ld r24,Z
797
 784 0350 8093 0000 		sts SIO_Sollwert,r24
798
 786               	.LM73:
799
 787 0354 84EF      		ldi r24,lo8(500)
800
 788 0356 91E0      		ldi r25,hi8(500)
801
 789 0358 9093 0000 		sts (SIO_Timeout)+1,r25
802
 790 035c 8093 0000 		sts SIO_Timeout,r24
803
 791 0360 00C0      		rjmp .L65
804
 792               	.L46:
805
 794               	.LM74:
806
 795 0362 8091 0000 		lds r24,UartState.2138
807
 796 0366 8130      		cpi r24,lo8(1)
808
 797 0368 01F0      		breq .L57
809
 798 036a 8130      		cpi r24,lo8(1)
810
 799 036c 00F0      		brlo .L56
811
 800 036e 8230      		cpi r24,lo8(2)
812
 801 0370 01F4      		brne .L66
813
 802 0372 00C0      		rjmp .L58
814
 803               	.L56:
815
 805               	.LM75:
816
 806 0374 8091 0000 		lds r24,SioTmp
817
 807 0378 8332      		cpi r24,lo8(35)
818
 808 037a 01F4      		brne .L59
819
 809 037c 8091 0000 		lds r24,NeuerDatensatzEmpfangen
820
 810 0380 8823      		tst r24
821
 811 0382 01F4      		brne .L59
822
 812 0384 81E0      		ldi r24,lo8(1)
823
 813 0386 8093 0000 		sts UartState.2138,r24
824
 814               	.L59:
825
 816               	.LM76:
826
 817 038a 8091 0000 		lds r24,SioTmp
827
 818 038e 8093 0000 		sts RxdBuffer,r24
828
 819 0392 81E0      		ldi r24,lo8(1)
829
 820 0394 8093 0000 		sts buf_ptr.2137,r24
830
 822               	.LM77:
831
 823 0398 8091 0000 		lds r24,SioTmp
832
 824 039c 9927      		clr r25
833
 825 039e 00C0      		rjmp .L67
834
 826               	.L57:
835
 828               	.LM78:
836
 829 03a0 82E0      		ldi r24,lo8(2)
837
 830 03a2 8093 0000 		sts UartState.2138,r24
838
 832               	.LM79:
839
 833 03a6 E42F      		mov r30,r20
840
 834 03a8 FF27      		clr r31
841
 835 03aa 8091 0000 		lds r24,SioTmp
842
 836 03ae E050      		subi r30,lo8(-(RxdBuffer))
843
 837 03b0 F040      		sbci r31,hi8(-(RxdBuffer))
844
 838 03b2 8083      		st Z,r24
845
 839 03b4 00C0      		rjmp .L68
846
 840               	.L58:
847
 842               	.LM80:
848
 843 03b6 E42F      		mov r30,r20
849
 844 03b8 FF27      		clr r31
850
 845 03ba 8091 0000 		lds r24,SioTmp
851
 846 03be E050      		subi r30,lo8(-(RxdBuffer))
852
 847 03c0 F040      		sbci r31,hi8(-(RxdBuffer))
853
 848 03c2 8083      		st Z,r24
854
 850               	.LM81:
855
 851 03c4 4436      		cpi r20,lo8(100)
856
 852 03c6 00F4      		brsh .L62
857
 853               	.L68:
858
 854 03c8 4F5F      		subi r20,lo8(-(1))
859
 855 03ca 4093 0000 		sts buf_ptr.2137,r20
860
 856 03ce 00C0      		rjmp .L64
861
 857               	.L62:
862
 859               	.LM82:
863
 860 03d0 1092 0000 		sts UartState.2138,__zero_reg__
864
 861               	.L64:
865
 863               	.LM83:
866
 864 03d4 2091 0000 		lds r18,SioTmp
867
 865 03d8 8091 0000 		lds r24,crc.2134
868
 866 03dc 9091 0000 		lds r25,(crc.2134)+1
869
 867 03e0 820F      		add r24,r18
870
 868 03e2 911D      		adc r25,__zero_reg__
871
 869               	.L67:
872
 870 03e4 9093 0000 		sts (crc.2134)+1,r25
873
 871 03e8 8093 0000 		sts crc.2134,r24
874
 872 03ec 00C0      		rjmp .L65
875
 873               	.L66:
876
 875               	.LM84:
877
 876 03ee 1092 0000 		sts UartState.2138,__zero_reg__
878
 877               	.L65:
879
 878               	/* epilogue: frame size=0 */
880
 879 03f2 FF91      		pop r31
881
 880 03f4 EF91      		pop r30
882
 881 03f6 DF91      		pop r29
883
 882 03f8 CF91      		pop r28
884
 883 03fa BF91      		pop r27
885
 884 03fc AF91      		pop r26
886
 885 03fe 9F91      		pop r25
887
 886 0400 8F91      		pop r24
888
 887 0402 7F91      		pop r23
889
 888 0404 6F91      		pop r22
890
 889 0406 5F91      		pop r21
891
 890 0408 4F91      		pop r20
892
 891 040a 3F91      		pop r19
893
 892 040c 2F91      		pop r18
894
 893 040e 0F90      		pop __tmp_reg__
895
 894 0410 0FBE      		out __SREG__,__tmp_reg__
896
 895 0412 0F90      		pop __tmp_reg__
897
 896 0414 1F90      		pop __zero_reg__
898
 897 0416 1895      		reti
899
 898               	/* epilogue end (size=19) */
900
 899               	/* function __vector_11 size 231 (193) */
901
 908               	.Lscope7:
902
 910               		.stabd	78,0,0
903
 914               	.global	WriteProgramData
904
 916               	WriteProgramData:
905
 917               		.stabd	46,0,0
906
 231:src/uart.c    ****
907
 232:src/uart.c    **** // --------------------------------------------------------------------------
908
 233:src/uart.c    **** void WriteProgramData(unsigned int pos, unsigned char wert)
909
 234:src/uart.c    **** {
910
 919               	.LM85:
911
 920               	.LFBB8:
912
 921               	/* prologue: frame size=0 */
913
 922               	/* prologue end (size=0) */
914
 923               	/* epilogue: frame size=0 */
915
 924 0418 0895      		ret
916
 925               	/* epilogue end (size=1) */
917
 926               	/* function WriteProgramData size 1 (0) */
918
 928               	.Lscope8:
919
 930               		.stabd	78,0,0
920
 932               	.global	DatenUebertragung
921
 934               	DatenUebertragung:
922
 935               		.stabd	46,0,0
923
 235:src/uart.c    **** }
924
 236:src/uart.c    ****
925
 237:src/uart.c    **** //############################################################################
926
 238:src/uart.c    **** //INstallation der Seriellen Schnittstelle
927
 239:src/uart.c    **** void UART_Init (void)
928
 240:src/uart.c    **** //############################################################################
929
 241:src/uart.c    **** {
930
 242:src/uart.c    **** 	//Enable TXEN im Register UCR TX-Data Enable & RX Enable
931
 243:src/uart.c    ****
932
 244:src/uart.c    **** 	UCR=(1 << TXEN) | (1 << RXEN);
933
 245:src/uart.c    ****     // UART Double Speed (U2X)
934
 246:src/uart.c    **** 	USR   |= (1<<U2X);
935
 247:src/uart.c    **** 	// RX-Interrupt Freigabe
936
 248:src/uart.c    ****
937
 249:src/uart.c    **** 	UCSRB |= (1<<RXCIE);    // serieller Empfangsinterrupt
938
 250:src/uart.c    ****
939
 251:src/uart.c    **** 	// TX-Interrupt Freigabe
940
 252:src/uart.c    **** //	UCSRB |= (1<<TXCIE);
941
 253:src/uart.c    ****
942
 254:src/uart.c    **** 	//Teiler wird gesetzt
943
 255:src/uart.c    **** 	UBRR= (SYSCLK / (BAUD_RATE * 8L) -1 );
944
 256:src/uart.c    **** 	//öffnet einen Kanal für printf (STDOUT)
945
 257:src/uart.c    **** 	fdevopen (uart_putchar, NULL);
946
 258:src/uart.c    ****     Debug_Timer = SetDelay(200);
947
 259:src/uart.c    ****     // Version beim Start ausgeben (nicht schön, aber geht... )
948
 260:src/uart.c    **** 	uart_putchar ('\n');uart_putchar ('B');uart_putchar ('L');uart_putchar (':');
949
 261:src/uart.c    **** 	uart_putchar ('V');uart_putchar (0x30 + VERSION_HAUPTVERSION);uart_putchar ('.');uart_putchar (0x3
950
 262:src/uart.c    **** 	uart_putchar ('\n');uart_putchar ('A');uart_putchar ('D');uart_putchar ('R'); uart_putchar (':');
951
 263:src/uart.c    ****
952
 264:src/uart.c    **** }
953
 265:src/uart.c    ****
954
 266:src/uart.c    ****
955
 267:src/uart.c    ****
956
 268:src/uart.c    ****
957
 269:src/uart.c    **** //---------------------------------------------------------------------------------------------
958
 270:src/uart.c    **** void DatenUebertragung(void)
959
 271:src/uart.c    **** {
960
 937               	.LM86:
961
 938               	.LFBB9:
962
 939               	/* prologue: frame size=0 */
963
 940               	/* prologue end (size=0) */
964
 272:src/uart.c    ****  if((CheckDelay(Debug_Timer) && UebertragungAbgeschlossen))	 // im Singlestep-Betrieb in jedem Scht
965
 942               	.LM87:
966
 943 041a 8091 0000 		lds r24,Debug_Timer
967
 944 041e 9091 0000 		lds r25,(Debug_Timer)+1
968
 945 0422 00D0      		rcall CheckDelay
969
 946 0424 8823      		tst r24
970
 947 0426 01F0      		breq .L75
971
 949               	.LM88:
972
 950 0428 8091 0000 		lds r24,UebertragungAbgeschlossen
973
 951 042c 8823      		tst r24
974
 952 042e 01F0      		breq .L75
975
 273:src/uart.c    ****     	 {
976
 274:src/uart.c    ****     	  SendOutData('D',MeineSlaveAdresse,(unsigned char *) &DebugOut,sizeof(DebugOut));
977
 954               	.LM89:
978
 955 0430 6091 0000 		lds r22,MeineSlaveAdresse
979
 956 0434 22E2      		ldi r18,lo8(34)
980
 957 0436 40E0      		ldi r20,lo8(DebugOut)
981
 958 0438 50E0      		ldi r21,hi8(DebugOut)
982
 959 043a 84E4      		ldi r24,lo8(68)
983
 960 043c 00D0      		rcall SendOutData
984
 275:src/uart.c    ****        	  Debug_Timer = SetDelay(50);   // Sendeintervall
985
 962               	.LM90:
986
 963 043e 82E3      		ldi r24,lo8(50)
987
 964 0440 90E0      		ldi r25,hi8(50)
988
 965 0442 00D0      		rcall SetDelay
989
 966 0444 9093 0000 		sts (Debug_Timer)+1,r25
990
 967 0448 8093 0000 		sts Debug_Timer,r24
991
 968               	.L75:
992
 969 044c 0895      		ret
993
 970               	/* epilogue: frame size=0 */
994
 971               	/* epilogue: noreturn */
995
 972               	/* epilogue end (size=0) */
996
 973               	/* function DatenUebertragung size 26 (26) */
997
 975               	.Lscope9:
998
 977               		.stabd	78,0,0
999
 979               	.global	UART_Init
1000
 981               	UART_Init:
1001
 982               		.stabd	46,0,0
1002
 984               	.LM91:
1003
 985               	.LFBB10:
1004
 986               	/* prologue: frame size=0 */
1005
 987               	/* prologue end (size=0) */
1006
 989               	.LM92:
1007
 990 044e 88E1      		ldi r24,lo8(24)
1008
 991 0450 8AB9      		out 42-0x20,r24
1009
 993               	.LM93:
1010
 994 0452 599A      		sbi 43-0x20,1
1011
 996               	.LM94:
1012
 997 0454 579A      		sbi 42-0x20,7
1013
 999               	.LM95:
1014
 1000 0456 80E1      		ldi r24,lo8(16)
1015
 1001 0458 89B9      		out 41-0x20,r24
1016
 1003               	.LM96:
1017
 1004 045a 60E0      		ldi r22,lo8(0)
1018
 1005 045c 70E0      		ldi r23,hi8(0)
1019
 1006 045e 80E0      		ldi r24,lo8(pm(uart_putchar))
1020
 1007 0460 90E0      		ldi r25,hi8(pm(uart_putchar))
1021
 1008 0462 00D0      		rcall fdevopen
1022
 1010               	.LM97:
1023
 1011 0464 88EC      		ldi r24,lo8(200)
1024
 1012 0466 90E0      		ldi r25,hi8(200)
1025
 1013 0468 00D0      		rcall SetDelay
1026
 1014 046a 9093 0000 		sts (Debug_Timer)+1,r25
1027
 1015 046e 8093 0000 		sts Debug_Timer,r24
1028
 1017               	.LM98:
1029
 1018 0472 8AE0      		ldi r24,lo8(10)
1030
 1019 0474 00D0      		rcall uart_putchar
1031
 1020 0476 82E4      		ldi r24,lo8(66)
1032
 1021 0478 00D0      		rcall uart_putchar
1033
 1022 047a 8CE4      		ldi r24,lo8(76)
1034
 1023 047c 00D0      		rcall uart_putchar
1035
 1024 047e 8AE3      		ldi r24,lo8(58)
1036
 1025 0480 00D0      		rcall uart_putchar
1037
 1027               	.LM99:
1038
 1028 0482 86E5      		ldi r24,lo8(86)
1039
 1029 0484 00D0      		rcall uart_putchar
1040
 1030 0486 80E3      		ldi r24,lo8(48)
1041
 1031 0488 00D0      		rcall uart_putchar
1042
 1032 048a 8EE2      		ldi r24,lo8(46)
1043
 1033 048c 00D0      		rcall uart_putchar
1044
 1034 048e 83E3      		ldi r24,lo8(51)
1045
 1035 0490 00D0      		rcall uart_putchar
1046
 1036 0492 87E3      		ldi r24,lo8(55)
1047
 1037 0494 00D0      		rcall uart_putchar
1048
 1039               	.LM100:
1049
 1040 0496 8AE0      		ldi r24,lo8(10)
1050
 1041 0498 00D0      		rcall uart_putchar
1051
 1042 049a 81E4      		ldi r24,lo8(65)
1052
 1043 049c 00D0      		rcall uart_putchar
1053
 1044 049e 84E4      		ldi r24,lo8(68)
1054
 1045 04a0 00D0      		rcall uart_putchar
1055
 1046 04a2 82E5      		ldi r24,lo8(82)
1056
 1047 04a4 00D0      		rcall uart_putchar
1057
 1048 04a6 8AE3      		ldi r24,lo8(58)
1058
 1049 04a8 00D0      		rcall uart_putchar
1059
 1050 04aa 8091 0000 		lds r24,MotorAdresse
1060
 1051 04ae 805D      		subi r24,lo8(-(48))
1061
 1052 04b0 00D0      		rcall uart_putchar
1062
 1053               	/* epilogue: frame size=0 */
1063
 1054 04b2 0895      		ret
1064
 1055               	/* epilogue end (size=1) */
1065
 1056               	/* function UART_Init size 51 (50) */
1066
 1058               	.Lscope10:
1067
 1060               		.stabd	78,0,0
1068
 1061               	.global	SIO_Sollwert
1069
 1062               	.global	SIO_Sollwert
1070
 1063               		.section .bss
1071
 1066               	SIO_Sollwert:
1072
 1067 0000 00        		.skip 1,0
1073
 1068               	.global	SioTmp
1074
 1069               	.global	SioTmp
1075
 1072               	SioTmp:
1076
 1073 0001 00        		.skip 1,0
1077
 1074               	.global	NeuerDatensatzEmpfangen
1078
 1075               	.global	NeuerDatensatzEmpfangen
1079
 1078               	NeuerDatensatzEmpfangen:
1080
 1079 0002 00        		.skip 1,0
1081
 1080               	.global	UebertragungAbgeschlossen
1082
 1081               		.data
1083
 1084               	UebertragungAbgeschlossen:
1084
 1085 0000 01        		.byte	1
1085
 1086               	.global	MotorTest
1086
 1087               	.global	MotorTest
1087
 1088               		.section .bss
1088
 1091               	MotorTest:
1089
 1092 0003 0000 0000 		.skip 4,0
1090
 1093               	.global	AnzahlEmpfangsBytes
1091
 1094               	.global	AnzahlEmpfangsBytes
1092
 1097               	AnzahlEmpfangsBytes:
1093
 1098 0007 00        		.skip 1,0
1094
 1099               		.lcomm UartState.2138,1
1095
 1100               		.lcomm buf_ptr.2137,1
1096
 1101               		.lcomm crc2.2136,1
1097
 1102               		.lcomm crc1.2135,1
1098
 1103               		.lcomm crc.2134,2
1099
 1104               		.lcomm ptr.2069,2
1100
 1105               		.comm MeineSlaveAdresse,1,1
1101
 1106               		.comm Debug_Timer,2,1
1102
 1107               		.comm DebugOut,34,1
1103
 1108               		.comm SendeBuffer,100,1
1104
 1109               		.comm RxdBuffer,100,1
1105
 1127               		.text
1106
 1129               	.Letext0:
1107
 1130               	/* File "src/uart.c": code  612 = 0x0264 ( 544), prologues  31, epilogues  37 */
1108
DEFINED SYMBOLS
1109
                            *ABS*:00000000 uart.c
1110
     /tmp/ccYvbISt.s:2      *ABS*:0000003f __SREG__
1111
     /tmp/ccYvbISt.s:3      *ABS*:0000003e __SP_H__
1112
     /tmp/ccYvbISt.s:4      *ABS*:0000003d __SP_L__
1113
     /tmp/ccYvbISt.s:5      *ABS*:00000000 __tmp_reg__
1114
     /tmp/ccYvbISt.s:6      *ABS*:00000001 __zero_reg__
1115
     /tmp/ccYvbISt.s:102    .text:00000000 __vector_13
1116
     /tmp/ccYvbISt.s:129    .text:00000014 SendUart
1117
     /tmp/ccYvbISt.s:1084   .data:00000000 UebertragungAbgeschlossen
1118
     /tmp/ccYvbISt.s:1103   .bss:0000000e ptr.2069
1119
                            *COM*:00000064 SendeBuffer
1120
     /tmp/ccYvbISt.s:208    .text:00000062 Decode64
1121
                            *COM*:00000064 RxdBuffer
1122
     /tmp/ccYvbISt.s:348    .text:00000112 AddCRC
1123
     /tmp/ccYvbISt.s:435    .text:0000016e SendOutData
1124
     /tmp/ccYvbISt.s:590    .text:0000023e uart_putchar
1125
     /tmp/ccYvbISt.s:631    .text:00000258 __vector_11
1126
     /tmp/ccYvbISt.s:1072   .bss:00000001 SioTmp
1127
     /tmp/ccYvbISt.s:1099   .bss:00000009 buf_ptr.2137
1128
                             .bss:00000008 UartState.2138
1129
     /tmp/ccYvbISt.s:1102   .bss:0000000c crc.2134
1130
     /tmp/ccYvbISt.s:1101   .bss:0000000b crc1.2135
1131
     /tmp/ccYvbISt.s:1100   .bss:0000000a crc2.2136
1132
     /tmp/ccYvbISt.s:1097   .bss:00000007 AnzahlEmpfangsBytes
1133
     /tmp/ccYvbISt.s:1091   .bss:00000003 MotorTest
1134
     /tmp/ccYvbISt.s:1066   .bss:00000000 SIO_Sollwert
1135
     /tmp/ccYvbISt.s:1078   .bss:00000002 NeuerDatensatzEmpfangen
1136
     /tmp/ccYvbISt.s:916    .text:00000418 WriteProgramData
1137
     /tmp/ccYvbISt.s:934    .text:0000041a DatenUebertragung
1138
                            *COM*:00000002 Debug_Timer
1139
                            *COM*:00000001 MeineSlaveAdresse
1140
                            *COM*:00000022 DebugOut
1141
     /tmp/ccYvbISt.s:981    .text:0000044e UART_Init
1142
 
1143
UNDEFINED SYMBOLS
1144
__do_copy_data
1145
__do_clear_bss
1146
MotorAdresse
1147
SIO_Timeout
1148
CheckDelay
1149
SetDelay
1150
fdevopen