Go to most recent revision | Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1 | ingob | 1 | #ifndef _TWI_SLAVE_H_ |
| 2 | #define _TWI_SLAVE_H_ |
||
| 3 | |||
| 3 | ingob | 4 | #define I2C_SLAVE_ADDRESS 0x50 |
| 1 | ingob | 5 | |
| 3 | ingob | 6 | #define I2C_CMD_VERSION 0x01 |
| 7 | struct str_I2C_Version |
||
| 8 | { |
||
| 9 | unsigned char Hauptversion; |
||
| 10 | unsigned char Nebenversion; |
||
| 11 | unsigned char Comp; |
||
| 12 | } ; |
||
| 1 | ingob | 13 | |
| 3 | ingob | 14 | #define I2C_CMD_WRITE_EEPROM 0x0A |
| 15 | #define I2C_CMD_READ_EEPROM 0x0B |
||
| 16 | struct str_I2C_EEPROM |
||
| 17 | { |
||
| 18 | unsigned char Adresse; |
||
| 19 | unsigned int Inhalt; |
||
| 20 | } ; |
||
| 21 | |||
| 22 | #define I2C_CMD_READ_MAG 0x02 |
||
| 23 | struct str_I2C_Mag |
||
| 24 | { |
||
| 25 | int MagX; |
||
| 26 | int MagY; |
||
| 27 | int MagZ; |
||
| 28 | } ; |
||
| 29 | |||
| 30 | #define I2C_CMD_READ_HEADING 0x03 |
||
| 31 | struct str_I2C_WriteNickRoll |
||
| 32 | { |
||
| 33 | int Nick; |
||
| 34 | int Roll; |
||
| 35 | } ; |
||
| 36 | |||
| 7 | hbuss | 37 | #define I2C_CMD_WRITE_CAL 0x04 |
| 38 | struct str_I2C_WriteCal |
||
| 39 | { |
||
| 40 | unsigned char CalByte; |
||
| 41 | unsigned char Dummy1; |
||
| 42 | unsigned char Dummy2; |
||
| 43 | } ; |
||
| 44 | |||
| 3 | ingob | 45 | struct str_I2C_Heading |
| 46 | { |
||
| 47 | unsigned int Heading; |
||
| 48 | } ; |
||
| 49 | |||
| 50 | |||
| 51 | extern unsigned char Tx_Idx, Rx_Idx, I2C_Direction; |
||
| 52 | |||
| 53 | extern struct str_I2C_Heading I2C_Heading; |
||
| 54 | extern struct str_I2C_WriteNickRoll I2C_WriteNickRoll; |
||
| 55 | extern struct str_I2C_Mag I2C_Mag; |
||
| 56 | extern struct str_I2C_EEPROM I2C_ReadEEPROM, I2C_WriteEEPROM; |
||
| 57 | extern struct str_I2C_Version I2C_Version; |
||
| 7 | hbuss | 58 | extern struct str_I2C_WriteCal I2C_WriteCal; |
| 3 | ingob | 59 | |
| 60 | |||
| 61 | extern void InitIC2_Slave (void); |
||
| 62 | |||
| 1 | ingob | 63 | #define TWI_BUS_ERR_1 0x00 |
| 64 | #define TWI_BUS_ERR_2 0xF8 |
||
| 65 | |||
| 66 | // Status Slave RX Mode |
||
| 67 | #define SR_SLA_ACK 0x60 |
||
| 68 | #define SR_LOST_ACK 0x68 |
||
| 69 | #define SR_GEN_CALL_ACK 0x70 |
||
| 70 | #define GEN_LOST_ACK 0x78 |
||
| 71 | #define SR_PREV_ACK 0x80 |
||
| 72 | #define SR_PREV_NACK 0x88 |
||
| 73 | #define GEN_PREV_ACK 0x90 |
||
| 74 | #define GEN_PREV_NACK 0x98 |
||
| 75 | #define STOP_CONDITION 0xA0 |
||
| 76 | #define REPEATED_START 0xA0 |
||
| 77 | |||
| 78 | // Status Slave TX mode |
||
| 79 | #define SW_SLA_ACK 0xA8 |
||
| 80 | #define SW_LOST_ACK 0xB0 |
||
| 81 | #define SW_DATA_ACK 0xB8 |
||
| 82 | #define SW_DATA_NACK 0xC0 |
||
| 83 | #define SW_LAST_ACK 0xC8 |
||
| 84 | |||
| 85 | #endif |
||
| 86 |