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Rev | Author | Line No. | Line |
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1140 | - | 1 | #ifndef _MEGAxx4_H_ |
2 | #define _MEGAxx4_H_ |
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3 | |||
4 | #ifndef UART_USE_SECOND |
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5 | /* UART 0 */ |
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6 | #define UART_BAUD_HIGH UBRR0H |
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7 | #define UART_BAUD_LOW UBRR0L |
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8 | #define UART_STATUS UCSR0A |
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9 | #define UART_TXREADY UDRE0 |
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10 | #define UART_RXREADY RXC0 |
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11 | #define UART_DOUBLE U2X0 |
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12 | #define UART_CTRL UCSR0B |
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13 | #define UART_CTRL_DATA ((1<<TXEN0) | (1<<RXEN0)) |
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14 | #define UART_CTRL2 UCSR0C |
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15 | #define UART_CTRL2_DATA ( (1<<UCSZ01) | (1<<UCSZ00)) |
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16 | #define UART_DATA UDR0 |
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17 | #else |
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18 | /* UART 1 */ |
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19 | #define UART_BAUD_HIGH UBRR1H |
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20 | #define UART_BAUD_LOW UBRR1L |
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21 | #define UART_STATUS UCSR1A |
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22 | #define UART_TXREADY UDRE1 |
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23 | #define UART_RXREADY RXC1 |
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24 | #define UART_DOUBLE U2X1 |
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25 | #define UART_CTRL UCSR1B |
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26 | #define UART_CTRL_DATA ((1<<TXEN1) | (1<<RXEN1)) |
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27 | #define UART_CTRL2 UCSR1C |
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28 | #define UART_CTRL2_DATA ( (1<<UCSZ11) | (1<<UCSZ10)) |
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29 | #define UART_DATA UDR1 |
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30 | #endif |
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31 | |||
32 | #define WDT_OFF_SPECIAL |
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33 | |||
34 | static inline void bootloader_wdt_off(void) |
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35 | { |
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36 | cli(); |
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37 | wdt_reset(); |
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38 | /* Clear WDRF in MCUSR */ |
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39 | MCUSR &= ~(1<<WDRF); |
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40 | /* Write logical one to WDCE and WDE */ |
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41 | /* Keep old prescaler setting to prevent unintentional time-out */ |
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42 | WDTCSR |= (1<<WDCE) | (1<<WDE); |
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43 | /* Turn off WDT */ |
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44 | WDTCSR = 0x00; |
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45 | } |
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46 | |||
47 | #endif // #ifndef _MEGA644_H_ |