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2194 | - | 1 | /***************************************************************************** |
2 | * |
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3 | * Atmel Corporation |
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4 | * |
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5 | * File : TWI_Slave.h |
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6 | * Compiler : IAR EWAAVR 2.28a/3.10c |
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7 | * Revision : $Revision: 2475 $ |
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8 | * Date : $Date: 2007-09-20 12:00:43 +0200 (to, 20 sep 2007) $ |
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9 | * Updated by : $Author: mlarsson $ |
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10 | * |
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11 | * Support mail : avr@atmel.com |
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12 | * |
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13 | * Supported devices : All devices with a TWI module can be used. |
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14 | * The example is written for the ATmega16 |
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15 | * |
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16 | * AppNote : AVR311 - TWI Slave Implementation |
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17 | * |
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18 | * Description : Header file for TWI_slave.c |
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19 | * Include this file in the application. |
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20 | * |
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21 | ****************************************************************************/ |
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22 | /*! \page MISRA |
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23 | * |
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24 | * General disabling of MISRA rules: |
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25 | * * (MISRA C rule 1) compiler is configured to allow extensions |
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26 | * * (MISRA C rule 111) bit fields shall only be defined to be of type unsigned int or signed int |
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27 | * * (MISRA C rule 37) bitwise operations shall not be performed on signed integer types |
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28 | * As it does not work well with 8bit architecture and/or IAR |
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29 | |||
30 | * Other disabled MISRA rules |
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31 | * * (MISRA C rule 109) use of union - overlapping storage shall not be used |
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32 | * * (MISRA C rule 61) every non-empty case clause in a switch statement shall be terminated with a break statement |
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33 | */ |
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34 | |||
35 | /**************************************************************************** |
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36 | TWI Status/Control register definitions |
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37 | ****************************************************************************/ |
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38 | |||
39 | #define TWI_BUFFER_SIZE 4 // Reserves memory for the drivers transceiver buffer. |
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40 | // Set this to the largest message size that will be sent including address byte. |
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41 | |||
42 | /**************************************************************************** |
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43 | Global definitions |
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44 | ****************************************************************************/ |
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45 | |||
46 | union TWI_statusReg_t // Status byte holding flags. |
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47 | { |
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48 | unsigned char all; |
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49 | struct |
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50 | { |
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51 | unsigned char lastTransOK:1; |
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52 | unsigned char RxDataInBuf:1; |
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53 | unsigned char genAddressCall:1; // TRUE = General call, FALSE = TWI Address; |
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54 | unsigned char unusedBits:5; |
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55 | }; |
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56 | }; |
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57 | |||
58 | extern union TWI_statusReg_t TWI_statusReg; |
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59 | |||
60 | |||
61 | /**************************************************************************** |
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62 | Function definitions |
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63 | ****************************************************************************/ |
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64 | void twi_slave_init( unsigned char ); |
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65 | unsigned char twi_slave_busy( void ); |
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66 | unsigned char twi_slave_get_status( void ); |
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67 | void twi_slave_start_with_data( unsigned char * , unsigned char ); |
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68 | void twi_slave_start( void ); |
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69 | unsigned char twi_slave_get_data( unsigned char *, unsigned char ); |
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70 | |||
71 | /**************************************************************************** |
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72 | Bit and byte definitions |
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73 | ****************************************************************************/ |
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74 | #define TWI_READ_BIT 0 // Bit position for R/W bit in "address byte". |
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75 | #define TWI_ADR_BITS 1 // Bit position for LSB of the slave address bits in the init byte. |
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76 | #define TWI_GEN_BIT 0 // Bit position for LSB of the general call bit in the init byte. |
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77 | |||
78 | #define TRUE 1 |
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79 | #define FALSE 0 |
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80 | |||
81 | /**************************************************************************** |
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82 | TWI State codes |
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83 | ****************************************************************************/ |
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84 | // General TWI Master staus codes |
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85 | #define TWI_START 0x08 // START has been transmitted |
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86 | #define TWI_REP_START 0x10 // Repeated START has been transmitted |
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87 | #define TWI_ARB_LOST 0x38 // Arbitration lost |
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88 | |||
89 | // TWI Master Transmitter staus codes |
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90 | #define TWI_MTX_ADR_ACK 0x18 // SLA+W has been tramsmitted and ACK received |
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91 | #define TWI_MTX_ADR_NACK 0x20 // SLA+W has been tramsmitted and NACK received |
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92 | #define TWI_MTX_DATA_ACK 0x28 // Data byte has been tramsmitted and ACK received |
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93 | #define TWI_MTX_DATA_NACK 0x30 // Data byte has been tramsmitted and NACK received |
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94 | |||
95 | // TWI Master Receiver staus codes |
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96 | #define TWI_MRX_ADR_ACK 0x40 // SLA+R has been tramsmitted and ACK received |
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97 | #define TWI_MRX_ADR_NACK 0x48 // SLA+R has been tramsmitted and NACK received |
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98 | #define TWI_MRX_DATA_ACK 0x50 // Data byte has been received and ACK tramsmitted |
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99 | #define TWI_MRX_DATA_NACK 0x58 // Data byte has been received and NACK tramsmitted |
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100 | |||
101 | // TWI Slave Transmitter staus codes |
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102 | #define TWI_STX_ADR_ACK 0xA8 // Own SLA+R has been received; ACK has been returned |
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103 | #define TWI_STX_ADR_ACK_M_ARB_LOST 0xB0 // Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned |
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104 | #define TWI_STX_DATA_ACK 0xB8 // Data byte in TWDR has been transmitted; ACK has been received |
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105 | #define TWI_STX_DATA_NACK 0xC0 // Data byte in TWDR has been transmitted; NOT ACK has been received |
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106 | #define TWI_STX_DATA_ACK_LAST_BYTE 0xC8 // Last data byte in TWDR has been transmitted (TWEA = �0�); ACK has been received |
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107 | |||
108 | // TWI Slave Receiver staus codes |
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109 | #define TWI_SRX_ADR_ACK 0x60 // Own SLA+W has been received ACK has been returned |
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110 | #define TWI_SRX_ADR_ACK_M_ARB_LOST 0x68 // Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned |
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111 | #define TWI_SRX_GEN_ACK 0x70 // General call address has been received; ACK has been returned |
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112 | #define TWI_SRX_GEN_ACK_M_ARB_LOST 0x78 // Arbitration lost in SLA+R/W as Master; General call address has been received; ACK has been returned |
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113 | #define TWI_SRX_ADR_DATA_ACK 0x80 // Previously addressed with own SLA+W; data has been received; ACK has been returned |
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114 | #define TWI_SRX_ADR_DATA_NACK 0x88 // Previously addressed with own SLA+W; data has been received; NOT ACK has been returned |
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115 | #define TWI_SRX_GEN_DATA_ACK 0x90 // Previously addressed with general call; data has been received; ACK has been returned |
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116 | #define TWI_SRX_GEN_DATA_NACK 0x98 // Previously addressed with general call; data has been received; NOT ACK has been returned |
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117 | #define TWI_SRX_STOP_RESTART 0xA0 // A STOP condition or repeated START condition has been received while still addressed as Slave |
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118 | |||
119 | // TWI Miscellaneous status codes |
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120 | #define TWI_NO_STATE 0xF8 // No relevant state information available; TWINT = �0� |
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121 | #define TWI_BUS_ERROR 0x00 // Bus error due to an illegal START or STOP condition |