Subversion Repositories Projects

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
1704 - 1
#include <avr/io.h>
2
#include <avr/interrupt.h>
3
 
4
#include "main.h"
5
#include "uart1.h"
6
#include "printf_P.h"
7
#include "ubx.h"
8
 
9
 
10
/****************************************************************/
11
/*              Initialization of the USART1                    */
12
/****************************************************************/
13
void USART1_Init (void)
14
{
15
        printf("\r\n UART1 init...");
16
        // USART1 Control and Status Register A, B, C and baud rate register
17
        uint8_t sreg = SREG;
18
        uint16_t ubrr = (uint16_t) ((uint32_t) SYSCLK/(8 * USART1_BAUD) - 1);
19
 
20
        // disable all interrupts before reconfiguration
21
        cli();
22
 
23
        // disable RX-Interrupt
24
        UCSR1B &= ~(1 << RXCIE1);
25
        // disable TX-Interrupt
26
        UCSR1B &= ~(1 << TXCIE1);
27
        // disable DRE-Interrupt
28
        UCSR1B &= ~(1 << UDRIE1);
29
 
30
        // set direction of RXD1 and TXD1 pins
31
        // set RXD1 (PD2) as an input pin
32
        PORTD |= (1 << PORTD2);
33
        DDRD &= ~(1 << DDD2);
34
 
35
        // set TXD1 (PD3) as an output pin
36
        PORTD |= (1 << PORTD3);
37
        DDRD  |= (1 << DDD3);
38
 
39
        // USART0 Baud Rate Register
40
        // set clock divider
41
        UBRR1H = (uint8_t)(ubrr>>8);
42
        UBRR1L = (uint8_t)ubrr;
43
 
44
        // enable double speed operation
45
        UCSR1A |= (1 << U2X1);
46
        // enable receiver and transmitter
47
        UCSR1B = (1 << TXEN1) | (1 << RXEN1);
48
        // set asynchronous mode
49
        UCSR1C &= ~(1 << UMSEL11);
50
        UCSR1C &= ~(1 << UMSEL10);
51
        // no parity
52
        UCSR1C &= ~(1 << UPM11);
53
        UCSR1C &= ~(1 << UPM10);
54
        // 1 stop bit
55
        UCSR1C &= ~(1 << USBS1);
56
        // 8-bit
57
        UCSR1B &= ~(1 << UCSZ12);
58
        UCSR1C |=  (1 << UCSZ11);
59
        UCSR1C |=  (1 << UCSZ10);
60
 
61
        // flush receive buffer explicit
62
        while ( UCSR1A & (1<<RXC1) ) UDR1;
63
 
64
        // enable interrupts at the end
65
        // enable RX-Interrupt
66
        UCSR1B |= (1 << RXCIE1);
67
        // enable TX-Interrupt
68
        UCSR1B |= (1 << TXCIE1);
69
        // enable DRE interrupt
70
        //UCSR1B |= (1 << UDRIE1);
71
 
72
 
73
        // restore global interrupt flags
74
    SREG = sreg;
75
        sei();
76
        printf("ok");
77
}
78
 
79
/****************************************************************/
80
/*               USART1 transmitter ISR                         */
81
/****************************************************************/
82
/*ISR(USART1_TX_vect)
83
{
84
 
85
}
86
*/
87
/****************************************************************/
88
/*               USART1 receiver ISR                            */
89
/****************************************************************/
90
ISR(USART1_RX_vect)
91
{
92
        uint8_t c;
93
        c = UDR1; // get data byte
94
 
95
        UBX_Parser(c); // and put it into the ubx protocol parser
96
 
97
}