Rev 1199 | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
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| 1199 | - | 1 | /**************************************************************************** |
| 1437 | - | 2 | * Copyright (C) 2011-2012 by Claas Anders "CaScAdE" Rathje * |
| 1199 | - | 3 | * admiralcascade@gmail.com * |
| 4 | * Project-URL: http://www.mylifesucks.de/oss/c-epilepsy/ * |
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| 5 | * * |
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| 6 | * This program is free software; you can redistribute it and/or modify * |
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| 7 | * it under the terms of the GNU General Public License as published by * |
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| 8 | * the Free Software Foundation; either version 2 of the License. * |
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| 9 | * * |
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| 10 | * This program is distributed in the hope that it will be useful, * |
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| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
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| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
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| 13 | * GNU General Public License for more details. * |
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| 14 | * * |
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| 15 | * You should have received a copy of the GNU General Public License * |
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| 16 | * along with this program; if not, write to the * |
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| 17 | * Free Software Foundation, Inc., * |
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| 18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * |
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| 19 | ****************************************************************************/ |
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| 20 | |||
| 21 | #include "usart1.h" |
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| 22 | |||
| 23 | #ifdef __AVR_ATmega644P__ |
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| 24 | |||
| 25 | /** |
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| 26 | * init usart1 |
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| 27 | */ |
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| 28 | void usart1_init() { |
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| 29 | UBRR1H = ((F_CPU / (16UL * USART1_BAUD)) - 1) >> 8; |
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| 30 | UBRR1L = (F_CPU / (16UL * USART1_BAUD)) - 1; |
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| 31 | |||
| 32 | // Enable receiver and transmitter; enable RX interrupt |
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| 33 | UCSR1B = (1 << RXEN1) | (1 << TXEN1) | (1 << RXCIE1); |
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| 34 | |||
| 35 | // set asynchronous mode |
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| 36 | UCSR1C &= ~(1 << UMSEL11); |
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| 37 | UCSR1C &= ~(1 << UMSEL10); |
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| 38 | // no parity |
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| 39 | UCSR1C &= ~(1 << UPM11); |
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| 40 | UCSR1C &= ~(1 << UPM10); |
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| 41 | // 1 stop bit |
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| 42 | UCSR1C &= ~(1 << USBS1); |
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| 43 | // 8-bit |
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| 44 | UCSR1B &= ~(1 << UCSZ12); |
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| 45 | UCSR1C |= (1 << UCSZ11); |
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| 46 | UCSR1C |= (1 << UCSZ10); |
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| 47 | |||
| 48 | // set direction of RXD1 and TXD1 pins |
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| 49 | // set RXD1 (PD2) as an input pin |
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| 50 | PORTD &= ~(1 << PORTD2); |
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| 51 | DDRD &= ~(1 << DDD2); |
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| 52 | // set TXD1 (PD3) as an output pin |
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| 53 | //PORTD |= (1 << PORTD3); |
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| 54 | //DDRD &= ~(1 << DDD3); |
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| 55 | |||
| 56 | } |
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| 57 | |||
| 58 | ISR(USART1_TX_vect, ISR_BLOCK) { |
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| 59 | } |
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| 60 | |||
| 61 | ISR(USART1_RX_vect, ISR_BLOCK) { |
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| 62 | } |
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| 63 | |||
| 64 | |||
| 65 | |||
| 66 | #endif // __AVR_ATmega644P__ |