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| 1199 | - | 1 | /**************************************************************************** |
| 2 | * Copyright (C) 2011 by Claas Anders "CaScAdE" Rathje * |
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| 3 | * admiralcascade@gmail.com * |
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| 4 | * Project-URL: http://www.mylifesucks.de/oss/c-epilepsy/ * |
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| 5 | * * |
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| 6 | * This program is free software; you can redistribute it and/or modify * |
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| 7 | * it under the terms of the GNU General Public License as published by * |
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| 8 | * the Free Software Foundation; either version 2 of the License. * |
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| 9 | * * |
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| 10 | * This program is distributed in the hope that it will be useful, * |
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| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
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| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
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| 13 | * GNU General Public License for more details. * |
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| 14 | * * |
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| 15 | * You should have received a copy of the GNU General Public License * |
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| 16 | * along with this program; if not, write to the * |
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| 17 | * Free Software Foundation, Inc., * |
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| 18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * |
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| 19 | ****************************************************************************/ |
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| 20 | |||
| 21 | #include "timer1.h" |
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| 22 | |||
| 23 | // 16 bit timer |
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| 24 | // critical for pwm and stuff |
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| 25 | // periodic uncritical stuff should go to the non-blocking timer0 |
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| 26 | |||
| 27 | void timer1_init() { |
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| 28 | // CTC Mode |
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| 29 | TCCR1B = (1 << WGM12); |
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| 30 | |||
| 31 | // Prescale 8 |
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| 32 | TCCR1B &= ~(1 << CS10); |
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| 33 | TCCR1B |= (1 << CS11); |
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| 34 | TCCR1B &= ~(1 << CS12); |
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| 35 | |||
| 36 | // Compare every 100us at 20MHz |
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| 37 | OCR1A = 250; |
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| 38 | |||
| 39 | // Compare Interrupt enable |
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| 40 | TIMSK1 |= (1 << OCIE1A); |
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| 41 | } |
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| 42 | |||
| 43 | // every 100us |
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| 44 | |||
| 45 | ISR(TIMER1_COMPA_vect, ISR_BLOCK) { |
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| 46 | |||
| 47 | // every 100us |
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| 48 | led_timer_callback(); |
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| 49 | } |