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IR-Tx_V0_02.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         00000664  00000000  00000000  00000094  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         00000006  00800060  00000664  000006f8  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          00000015  00800066  00800066  000006fe  2**0
                  ALLOC
  3 .stab         00000378  00000000  00000000  00000700  2**2
                  CONTENTS, READONLY, DEBUGGING
  4 .stabstr      00000071  00000000  00000000  00000a78  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_aranges 00000040  00000000  00000000  00000ae9  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_pubnames 000000ff  00000000  00000000  00000b29  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_info   0000036d  00000000  00000000  00000c28  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_abbrev 000001b4  00000000  00000000  00000f95  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_line   0000059c  00000000  00000000  00001149  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_frame  000000c0  00000000  00000000  000016e8  2**2
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_str    00000147  00000000  00000000  000017a8  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_loc    00000130  00000000  00000000  000018ef  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00000000 <__vectors>:
   0:   12 c0           rjmp    .+36            ; 0x26 <__ctors_end>
   2:   2c c0           rjmp    .+88            ; 0x5c <__bad_interrupt>
   4:   2b c0           rjmp    .+86            ; 0x5c <__bad_interrupt>
   6:   2a c0           rjmp    .+84            ; 0x5c <__bad_interrupt>
   8:   29 c0           rjmp    .+82            ; 0x5c <__bad_interrupt>
   a:   3a c0           rjmp    .+116           ; 0x80 <__vector_5>
   c:   27 c0           rjmp    .+78            ; 0x5c <__bad_interrupt>
   e:   26 c0           rjmp    .+76            ; 0x5c <__bad_interrupt>
  10:   26 c0           rjmp    .+76            ; 0x5e <__vector_8>
  12:   ac c0           rjmp    .+344           ; 0x16c <__vector_9>
  14:   23 c0           rjmp    .+70            ; 0x5c <__bad_interrupt>
  16:   22 c0           rjmp    .+68            ; 0x5c <__bad_interrupt>
  18:   21 c0           rjmp    .+66            ; 0x5c <__bad_interrupt>
  1a:   20 c0           rjmp    .+64            ; 0x5c <__bad_interrupt>
  1c:   1f c0           rjmp    .+62            ; 0x5c <__bad_interrupt>
  1e:   1e c0           rjmp    .+60            ; 0x5c <__bad_interrupt>
  20:   1d c0           rjmp    .+58            ; 0x5c <__bad_interrupt>
  22:   1c c0           rjmp    .+56            ; 0x5c <__bad_interrupt>
  24:   1b c0           rjmp    .+54            ; 0x5c <__bad_interrupt>

00000026 <__ctors_end>:
  26:   11 24           eor     r1, r1
  28:   1f be           out     0x3f, r1        ; 63
  2a:   cf e5           ldi     r28, 0x5F       ; 95
  2c:   d4 e0           ldi     r29, 0x04       ; 4
  2e:   de bf           out     0x3e, r29       ; 62
  30:   cd bf           out     0x3d, r28       ; 61

00000032 <__do_copy_data>:
  32:   10 e0           ldi     r17, 0x00       ; 0
  34:   a0 e6           ldi     r26, 0x60       ; 96
  36:   b0 e0           ldi     r27, 0x00       ; 0
  38:   e4 e6           ldi     r30, 0x64       ; 100
  3a:   f6 e0           ldi     r31, 0x06       ; 6
  3c:   02 c0           rjmp    .+4             ; 0x42 <.do_copy_data_start>

0000003e <.do_copy_data_loop>:
  3e:   05 90           lpm     r0, Z+
  40:   0d 92           st      X+, r0

00000042 <.do_copy_data_start>:
  42:   a6 36           cpi     r26, 0x66       ; 102
  44:   b1 07           cpc     r27, r17
  46:   d9 f7           brne    .-10            ; 0x3e <.do_copy_data_loop>

00000048 <__do_clear_bss>:
  48:   10 e0           ldi     r17, 0x00       ; 0
  4a:   a6 e6           ldi     r26, 0x66       ; 102
  4c:   b0 e0           ldi     r27, 0x00       ; 0
  4e:   01 c0           rjmp    .+2             ; 0x52 <.do_clear_bss_start>

00000050 <.do_clear_bss_loop>:
  50:   1d 92           st      X+, r1

00000052 <.do_clear_bss_start>:
  52:   ab 37           cpi     r26, 0x7B       ; 123
  54:   b1 07           cpc     r27, r17
  56:   e1 f7           brne    .-8             ; 0x50 <.do_clear_bss_loop>
  58:   18 d1           rcall   .+560           ; 0x28a <main>
  5a:   03 c3           rjmp    .+1542          ; 0x662 <_exit>

0000005c <__bad_interrupt>:
  5c:   d1 cf           rjmp    .-94            ; 0x0 <__vectors>

0000005e <__vector_8>:
volatile unsigned char IRbit = 0;


SIGNAL(SIG_OVERFLOW1)
{
  5e:   1f 92           push    r1
  60:   0f 92           push    r0
  62:   0f b6           in      r0, 0x3f        ; 63
  64:   0f 92           push    r0
  66:   11 24           eor     r1, r1
  68:   8f 93           push    r24
        TMR1OvF++;
  6a:   80 91 69 00     lds     r24, 0x0069
  6e:   8f 5f           subi    r24, 0xFF       ; 255
  70:   80 93 69 00     sts     0x0069, r24
  74:   8f 91           pop     r24
  76:   0f 90           pop     r0
  78:   0f be           out     0x3f, r0        ; 63
  7a:   0f 90           pop     r0
  7c:   1f 90           pop     r1
  7e:   18 95           reti

00000080 <__vector_5>:
}


SIGNAL(SIG_INPUT_CAPTURE1)
{
  80:   1f 92           push    r1
  82:   0f 92           push    r0
  84:   0f b6           in      r0, 0x3f        ; 63
  86:   0f 92           push    r0
  88:   11 24           eor     r1, r1
  8a:   2f 93           push    r18
  8c:   3f 93           push    r19
  8e:   4f 93           push    r20
  90:   8f 93           push    r24
  92:   9f 93           push    r25
        static unsigned int pos_ICR;
        static unsigned int ppm;
        
        if ((TCCR1B & (1<<ICES1)) != 0)
  94:   0e b4           in      r0, 0x2e        ; 46
  96:   06 fe           sbrs    r0, 6
  98:   0c c0           rjmp    .+24            ; 0xb2 <__vector_5+0x32>
        {
                TCCR1B &= ~(1<<ICES1);                                                          //invert trigger
  9a:   8e b5           in      r24, 0x2e       ; 46
  9c:   8f 7b           andi    r24, 0xBF       ; 191
  9e:   8e bd           out     0x2e, r24       ; 46
                TMR1OvF = 0;
  a0:   10 92 69 00     sts     0x0069, r1
                pos_ICR = ICR1; 
  a4:   86 b5           in      r24, 0x26       ; 38
  a6:   97 b5           in      r25, 0x27       ; 39
  a8:   90 93 70 00     sts     0x0070, r25
  ac:   80 93 6f 00     sts     0x006F, r24
  b0:   49 c0           rjmp    .+146           ; 0x144 <__vector_5+0xc4>
        }
        else                                                                                    //Negative Flanke
        {
                TCCR1B |= (1<<ICES1);
  b2:   8e b5           in      r24, 0x2e       ; 46
  b4:   80 64           ori     r24, 0x40       ; 64
  b6:   8e bd           out     0x2e, r24       ; 46
                ppm = (ICR1 - pos_ICR + (int) TMR1OvF * 65536);
  b8:   26 b5           in      r18, 0x26       ; 38
  ba:   37 b5           in      r19, 0x27       ; 39
  bc:   80 91 69 00     lds     r24, 0x0069
  c0:   80 91 6f 00     lds     r24, 0x006F
  c4:   90 91 70 00     lds     r25, 0x0070
  c8:   28 1b           sub     r18, r24
  ca:   39 0b           sbc     r19, r25
  cc:   30 93 6e 00     sts     0x006E, r19
  d0:   20 93 6d 00     sts     0x006D, r18
                if ((ppm > 600) && (ppm < 2400)) 
  d4:   c9 01           movw    r24, r18
  d6:   89 55           subi    r24, 0x59       ; 89
  d8:   92 40           sbci    r25, 0x02       ; 2
  da:   87 50           subi    r24, 0x07       ; 7
  dc:   97 40           sbci    r25, 0x07       ; 7
  de:   90 f5           brcc    .+100           ; 0x144 <__vector_5+0xc4>
                {
                        if (ppm > 2100) ppm = 2100;
  e0:   88 e0           ldi     r24, 0x08       ; 8
  e2:   25 33           cpi     r18, 0x35       ; 53
  e4:   38 07           cpc     r19, r24
  e6:   18 f0           brcs    .+6             ; 0xee <__vector_5+0x6e>
  e8:   84 e3           ldi     r24, 0x34       ; 52
  ea:   98 e0           ldi     r25, 0x08       ; 8
  ec:   05 c0           rjmp    .+10            ; 0xf8 <__vector_5+0x78>
                        if (ppm < 900) ppm = 900;
  ee:   24 58           subi    r18, 0x84       ; 132
  f0:   33 40           sbci    r19, 0x03       ; 3
  f2:   30 f4           brcc    .+12            ; 0x100 <__vector_5+0x80>
  f4:   84 e8           ldi     r24, 0x84       ; 132
  f6:   93 e0           ldi     r25, 0x03       ; 3
  f8:   90 93 6e 00     sts     0x006E, r25
  fc:   80 93 6d 00     sts     0x006D, r24
                        ppm = (ppm_signal * 7 + ppm) / 8;
 100:   20 91 66 00     lds     r18, 0x0066
 104:   30 91 67 00     lds     r19, 0x0067
 108:   c9 01           movw    r24, r18
 10a:   43 e0           ldi     r20, 0x03       ; 3
 10c:   88 0f           add     r24, r24
 10e:   99 1f           adc     r25, r25
 110:   4a 95           dec     r20
 112:   e1 f7           brne    .-8             ; 0x10c <__vector_5+0x8c>
 114:   82 1b           sub     r24, r18
 116:   93 0b           sbc     r25, r19
 118:   20 91 6d 00     lds     r18, 0x006D
 11c:   30 91 6e 00     lds     r19, 0x006E
 120:   82 0f           add     r24, r18
 122:   93 1f           adc     r25, r19
 124:   23 e0           ldi     r18, 0x03       ; 3
 126:   96 95           lsr     r25
 128:   87 95           ror     r24
 12a:   2a 95           dec     r18
 12c:   e1 f7           brne    .-8             ; 0x126 <__vector_5+0xa6>
 12e:   90 93 6e 00     sts     0x006E, r25
 132:   80 93 6d 00     sts     0x006D, r24
                        ppm_signal = ppm;
 136:   90 93 67 00     sts     0x0067, r25
 13a:   80 93 66 00     sts     0x0066, r24
                        ppm_new = 1;
 13e:   81 e0           ldi     r24, 0x01       ; 1
 140:   80 93 68 00     sts     0x0068, r24
 144:   9f 91           pop     r25
 146:   8f 91           pop     r24
 148:   4f 91           pop     r20
 14a:   3f 91           pop     r19
 14c:   2f 91           pop     r18
 14e:   0f 90           pop     r0
 150:   0f be           out     0x3f, r0        ; 63
 152:   0f 90           pop     r0
 154:   1f 90           pop     r1
 156:   18 95           reti

00000158 <StartIRModulation>:
                }
                
        } 

}



/*##############################################################################*/
void StartIRModulation(void)
{
 158:   89 e0           ldi     r24, 0x09       ; 9
 15a:   85 bd           out     0x25, r24       ; 37
        //Timer1 Config for generation the 38Khz IR Modulation
        TCCR2 =         (0<<FOC2)|(0<<WGM20)|(0<<COM21)|(0<<COM20)|
                                (1<<WGM21) |(0<<CS22) |(0<<CS21) |(1<<CS20);                    

        OCR2 = 108;                                                                     //~38Khz @ 8Mhz
 15c:   8c e6           ldi     r24, 0x6C       ; 108
 15e:   83 bd           out     0x23, r24       ; 35

        //Timer 0 Config for getting right timing for IR Pattern
        TCCR0 = (1<<CS02)|(0<<CS01)|(1<<CS00);  // clk(@8MHz) / 1024 =  128us / clk (resolution)
 160:   85 e0           ldi     r24, 0x05       ; 5
 162:   83 bf           out     0x33, r24       ; 51
        TIMSK &= ~(1<<TOIE0);                                           //
 164:   89 b7           in      r24, 0x39       ; 57
 166:   8e 7f           andi    r24, 0xFE       ; 254
 168:   89 bf           out     0x39, r24       ; 57
 16a:   08 95           ret

0000016c <__vector_9>:

}


SIGNAL(SIG_OVERFLOW0)
{
 16c:   1f 92           push    r1
 16e:   0f 92           push    r0
 170:   0f b6           in      r0, 0x3f        ; 63
 172:   0f 92           push    r0
 174:   11 24           eor     r1, r1
 176:   8f 93           push    r24
 178:   9f 93           push    r25

        switch (IRstate) 
 17a:   90 91 6a 00     lds     r25, 0x006A
 17e:   92 30           cpi     r25, 0x02       ; 2
 180:   b1 f0           breq    .+44            ; 0x1ae <__vector_9+0x42>
 182:   93 30           cpi     r25, 0x03       ; 3
 184:   20 f4           brcc    .+8             ; 0x18e <__vector_9+0x22>
 186:   91 30           cpi     r25, 0x01       ; 1
 188:   09 f0           breq    .+2             ; 0x18c <__vector_9+0x20>
 18a:   52 c0           rjmp    .+164           ; 0x230 <__vector_9+0xc4>
 18c:   06 c0           rjmp    .+12            ; 0x19a <__vector_9+0x2e>
 18e:   93 30           cpi     r25, 0x03       ; 3
 190:   e9 f0           breq    .+58            ; 0x1cc <__vector_9+0x60>
 192:   94 30           cpi     r25, 0x04       ; 4
 194:   09 f0           breq    .+2             ; 0x198 <__vector_9+0x2c>
 196:   4c c0           rjmp    .+152           ; 0x230 <__vector_9+0xc4>
 198:   36 c0           rjmp    .+108           ; 0x206 <__vector_9+0x9a>
        { 
    case 1: 
                TCCR2 setbit (1<<COM20);
 19a:   85 b5           in      r24, 0x25       ; 37
 19c:   80 61           ori     r24, 0x10       ; 16
 19e:   85 bd           out     0x25, r24       ; 37
                IRstate = 2;
 1a0:   82 e0           ldi     r24, 0x02       ; 2
 1a2:   80 93 6a 00     sts     0x006A, r24
                IRbit = 0;
 1a6:   10 92 6c 00     sts     0x006C, r1
                TCNT0 = 255 - (13000 / 128);
 1aa:   8a e9           ldi     r24, 0x9A       ; 154
 1ac:   0b c0           rjmp    .+22            ; 0x1c4 <__vector_9+0x58>
                break;
    case 2: 
                TCCR2 clrbit (1<<COM20);
 1ae:   85 b5           in      r24, 0x25       ; 37
 1b0:   8f 7e           andi    r24, 0xEF       ; 239
 1b2:   85 bd           out     0x25, r24       ; 37
                IRstate = 3;
 1b4:   83 e0           ldi     r24, 0x03       ; 3
 1b6:   80 93 6a 00     sts     0x006A, r24
                if ((IRdat & 0x40) == 0)        TCNT0 = 255 - (1000 / 128);
 1ba:   80 91 6b 00     lds     r24, 0x006B
 1be:   86 fd           sbrc    r24, 6
 1c0:   03 c0           rjmp    .+6             ; 0x1c8 <__vector_9+0x5c>
 1c2:   88 ef           ldi     r24, 0xF8       ; 248
 1c4:   82 bf           out     0x32, r24       ; 50
 1c6:   39 c0           rjmp    .+114           ; 0x23a <__vector_9+0xce>
                else TCNT0 = 255 - (3000 / 128);
 1c8:   88 ee           ldi     r24, 0xE8       ; 232
 1ca:   fc cf           rjmp    .-8             ; 0x1c4 <__vector_9+0x58>
                break;
    case 3: 
                TCCR2 setbit (1<<COM20);        
 1cc:   85 b5           in      r24, 0x25       ; 37
 1ce:   80 61           ori     r24, 0x10       ; 16
 1d0:   85 bd           out     0x25, r24       ; 37
                TCNT0 = 255 - (1000 / 128);
 1d2:   88 ef           ldi     r24, 0xF8       ; 248
 1d4:   82 bf           out     0x32, r24       ; 50
                IRdat = IRdat << 1;
 1d6:   80 91 6b 00     lds     r24, 0x006B
 1da:   88 0f           add     r24, r24
 1dc:   80 93 6b 00     sts     0x006B, r24
                IRbit++;
 1e0:   80 91 6c 00     lds     r24, 0x006C
 1e4:   8f 5f           subi    r24, 0xFF       ; 255
 1e6:   80 93 6c 00     sts     0x006C, r24
                if (IRbit < 7) IRstate = 2;
 1ea:   80 91 6c 00     lds     r24, 0x006C
 1ee:   87 30           cpi     r24, 0x07       ; 7
 1f0:   20 f4           brcc    .+8             ; 0x1fa <__vector_9+0x8e>
 1f2:   82 e0           ldi     r24, 0x02       ; 2
 1f4:   80 93 6a 00     sts     0x006A, r24
 1f8:   20 c0           rjmp    .+64            ; 0x23a <__vector_9+0xce>
                else 
                {
                        IRstate = 4;
 1fa:   84 e0           ldi     r24, 0x04       ; 4
 1fc:   80 93 6a 00     sts     0x006A, r24
                        IRbit = 0;
 200:   10 92 6c 00     sts     0x006C, r1
 204:   1a c0           rjmp    .+52            ; 0x23a <__vector_9+0xce>
                }
                break;
        case 4:
                TCCR2 clrbit (1<<COM20);        
 206:   85 b5           in      r24, 0x25       ; 37
 208:   8f 7e           andi    r24, 0xEF       ; 239
 20a:   85 bd           out     0x25, r24       ; 37
                TCNT0 = 255 - (25000 / 128);
 20c:   8c e3           ldi     r24, 0x3C       ; 60
 20e:   82 bf           out     0x32, r24       ; 50
                if (IRbit < 20) IRstate = 4;
 210:   80 91 6c 00     lds     r24, 0x006C
 214:   84 31           cpi     r24, 0x14       ; 20
 216:   18 f4           brcc    .+6             ; 0x21e <__vector_9+0xb2>
 218:   90 93 6a 00     sts     0x006A, r25
 21c:   03 c0           rjmp    .+6             ; 0x224 <__vector_9+0xb8>
                else IRstate = 5;
 21e:   85 e0           ldi     r24, 0x05       ; 5
 220:   80 93 6a 00     sts     0x006A, r24
                IRbit++;
 224:   80 91 6c 00     lds     r24, 0x006C
 228:   8f 5f           subi    r24, 0xFF       ; 255
 22a:   80 93 6c 00     sts     0x006C, r24
 22e:   05 c0           rjmp    .+10            ; 0x23a <__vector_9+0xce>
                break;
        default:
                TIMSK &= ~(1<<TOIE0);
 230:   89 b7           in      r24, 0x39       ; 57
 232:   8e 7f           andi    r24, 0xFE       ; 254
 234:   89 bf           out     0x39, r24       ; 57
                IRstate = 0;
 236:   10 92 6a 00     sts     0x006A, r1
 23a:   9f 91           pop     r25
 23c:   8f 91           pop     r24
 23e:   0f 90           pop     r0
 240:   0f be           out     0x3f, r0        ; 63
 242:   0f 90           pop     r0
 244:   1f 90           pop     r1
 246:   18 95           reti

00000248 <SendIRSignal>:
                break;

        }

}





/*##############################################################################*/
void SendIRSignal(unsigned char txbyte)
{
 248:   98 2f           mov     r25, r24
        while (IRstate != 0) {}                                         //IR already in action ?, if so, wait
 24a:   80 91 6a 00     lds     r24, 0x006A
 24e:   88 23           and     r24, r24
 250:   e1 f7           brne    .-8             ; 0x24a <SendIRSignal+0x2>
        IRstate = 1;                                                                    //initial State
 252:   81 e0           ldi     r24, 0x01       ; 1
 254:   80 93 6a 00     sts     0x006A, r24
        IRdat = txbyte;                                                                 //copy IR Data
 258:   90 93 6b 00     sts     0x006B, r25
        TIFR &= TOV0;                                                                   //set TMR0 Int Flag
 25c:   88 b7           in      r24, 0x38       ; 56
 25e:   18 be           out     0x38, r1        ; 56
        TIMSK setbit (1<<TOIE0);                                                //Enable TMR0 Int       
 260:   89 b7           in      r24, 0x39       ; 57
 262:   81 60           ori     r24, 0x01       ; 1
 264:   89 bf           out     0x39, r24       ; 57
 266:   08 95           ret

00000268 <StartPPM>:
}







/*##############################################################################*/
void StartPPM(void)
{
 268:   1f bc           out     0x2f, r1        ; 47
        
        //global timer1 Config
        TCCR1A =        (0<<COM1A1)|(0<<COM1A0)|(0<<COM1B1)|(0<<COM1B0)|
                                (0<<FOC1A) |(0<<FOC1B) |(0<<WGM10) |(0<<WGM11);                 
    TCCR1B =    (1<<ICNC1)|(1<<ICES1)|(0<<WGM13)|
 26a:   82 ec           ldi     r24, 0xC2       ; 194
 26c:   8e bd           out     0x2e, r24       ; 46
                                (0<<WGM12)|(0<<CS12)|(1<<CS11)|(0<<CS10);                               //ICP_POS_FLANKE

        // interrupts
        TIMSK |=        (1<<TICIE1)|(1<<TOIE1);                                                                 //ICP_INT_ENABLE and TIMER1_INT_ENABLE
 26e:   89 b7           in      r24, 0x39       ; 57
 270:   84 62           ori     r24, 0x24       ; 36
 272:   89 bf           out     0x39, r24       ; 57
 274:   08 95           ret

00000276 <GetPPM>:

}


int GetPPM(void)
{
 276:   29 b7           in      r18, 0x39       ; 57
        //this routines seems to be nesseccary, as reading a 16 bit value
        //on a 8 bit machine is not atomic, so if an interrupt apears between reading
        //low and high byte of the 16 bit value a wrong result is possible
        
        unsigned char intmask;
        unsigned int  ppm_temp;

        intmask = TIMSK;                                //backup interupt enable bits
        TIMSK &= ~(1<<TICIE1);                  //disable ppm interrupt
 278:   89 b7           in      r24, 0x39       ; 57
 27a:   8f 7d           andi    r24, 0xDF       ; 223
 27c:   89 bf           out     0x39, r24       ; 57
        ppm_temp = ppm_signal;
 27e:   80 91 66 00     lds     r24, 0x0066
 282:   90 91 67 00     lds     r25, 0x0067
        TIMSK = intmask;                                //restore interupt enable bits
 286:   29 bf           out     0x39, r18       ; 57
 288:   08 95           ret

0000028a <main>:
        return(ppm_temp);                               //return ppm_signal

}


/*##############################################################################*/
// MAIN
/*##############################################################################*/
int main (void)
{
 28a:   88 e0           ldi     r24, 0x08       ; 8
 28c:   84 bb           out     0x14, r24       ; 20

    DDRC  = (1<<ledred);
    PORTC = 0x00;
 28e:   15 ba           out     0x15, r1        ; 21
    DDRD  = (1<<ledgreen);
 290:   80 e8           ldi     r24, 0x80       ; 128
 292:   81 bb           out     0x11, r24       ; 17
    PORTD = 0x00;
 294:   12 ba           out     0x12, r1        ; 18
    DDRB  = (1<<1)|(1<<2)|(1<<3);
 296:   8e e0           ldi     r24, 0x0E       ; 14
 298:   87 bb           out     0x17, r24       ; 23
    PORTB = 0x00;
 29a:   18 ba           out     0x18, r1        ; 24


        StartUART();
 29c:   54 d0           rcall   .+168           ; 0x346 <StartUART>
 29e:   1f bc           out     0x2f, r1        ; 47
 2a0:   82 ec           ldi     r24, 0xC2       ; 194
 2a2:   8e bd           out     0x2e, r24       ; 46
 2a4:   89 b7           in      r24, 0x39       ; 57
 2a6:   84 62           ori     r24, 0x24       ; 36
 2a8:   89 bf           out     0x39, r24       ; 57
        StartPPM();
        StartIRModulation();
 2aa:   56 df           rcall   .-340           ; 0x158 <StartIRModulation>
        sei();
 2ac:   78 94           sei

    
    while (1)
        {
                //printf("%d ",ppm_signal);
                if (ppm_new == 1)
 2ae:   80 91 68 00     lds     r24, 0x0068
 2b2:   81 30           cpi     r24, 0x01       ; 1
 2b4:   e1 f7           brne    .-8             ; 0x2ae <main+0x24>
                {
                        ppm_new = 0;
 2b6:   10 92 68 00     sts     0x0068, r1
 2ba:   89 b7           in      r24, 0x39       ; 57
 2bc:   99 b7           in      r25, 0x39       ; 57
 2be:   9f 7d           andi    r25, 0xDF       ; 223
 2c0:   99 bf           out     0x39, r25       ; 57
 2c2:   20 91 66 00     lds     r18, 0x0066
 2c6:   30 91 67 00     lds     r19, 0x0067
 2ca:   89 bf           out     0x39, r24       ; 57
                        if (GetPPM() > 1750)
 2cc:   27 5d           subi    r18, 0xD7       ; 215
 2ce:   36 40           sbci    r19, 0x06       ; 6
 2d0:   84 f0           brlt    .+32            ; 0x2f2 <main+0x68>
                        {
                                SendIRSignal(ZOOM);
 2d2:   81 e4           ldi     r24, 0x41       ; 65
 2d4:   b9 df           rcall   .-142           ; 0x248 <SendIRSignal>
                                PORTC |= (1<<ledred);
 2d6:   ab 9a           sbi     0x15, 3 ; 21
 2d8:   89 b7           in      r24, 0x39       ; 57
 2da:   99 b7           in      r25, 0x39       ; 57
 2dc:   9f 7d           andi    r25, 0xDF       ; 223
 2de:   99 bf           out     0x39, r25       ; 57
 2e0:   20 91 66 00     lds     r18, 0x0066
 2e4:   30 91 67 00     lds     r19, 0x0067
 2e8:   89 bf           out     0x39, r24       ; 57
                                while (GetPPM() > 1650)  {}
 2ea:   23 57           subi    r18, 0x73       ; 115
 2ec:   36 40           sbci    r19, 0x06       ; 6
 2ee:   a4 f7           brge    .-24            ; 0x2d8 <main+0x4e>
                                PORTC &= ~(1<<ledred);
 2f0:   ab 98           cbi     0x15, 3 ; 21
 2f2:   89 b7           in      r24, 0x39       ; 57
 2f4:   99 b7           in      r25, 0x39       ; 57
 2f6:   9f 7d           andi    r25, 0xDF       ; 223
 2f8:   99 bf           out     0x39, r25       ; 57
 2fa:   20 91 66 00     lds     r18, 0x0066
 2fe:   30 91 67 00     lds     r19, 0x0067
 302:   89 bf           out     0x39, r24       ; 57
                        }
                        
                        if (GetPPM() < 1250)
 304:   22 5e           subi    r18, 0xE2       ; 226
 306:   34 40           sbci    r19, 0x04       ; 4
 308:   94 f6           brge    .-92            ; 0x2ae <main+0x24>
                        {
                                PORTD |= (1<<ledgreen);                 
 30a:   97 9a           sbi     0x12, 7 ; 18
                                SendIRSignal(TRIGGER);
 30c:   80 e4           ldi     r24, 0x40       ; 64
 30e:   9c df           rcall   .-200           ; 0x248 <SendIRSignal>
 310:   89 b7           in      r24, 0x39       ; 57
 312:   99 b7           in      r25, 0x39       ; 57
 314:   9f 7d           andi    r25, 0xDF       ; 223
 316:   99 bf           out     0x39, r25       ; 57
 318:   20 91 66 00     lds     r18, 0x0066
 31c:   30 91 67 00     lds     r19, 0x0067
 320:   89 bf           out     0x39, r24       ; 57
                                while (GetPPM() < 1350) {}
 322:   26 54           subi    r18, 0x46       ; 70
 324:   35 40           sbci    r19, 0x05       ; 5
 326:   a4 f3           brlt    .-24            ; 0x310 <main+0x86>
                                PORTD &= ~(1<<ledgreen);                        
 328:   97 98           cbi     0x12, 7 ; 18
 32a:   c1 cf           rjmp    .-126           ; 0x2ae <main+0x24>

0000032c <uart_putchar>:

}

int uart_putchar (char c)
{
 32c:   1f 93           push    r17
 32e:   18 2f           mov     r17, r24
        if (c == '\n') uart_putchar('\r');
 330:   8a 30           cpi     r24, 0x0A       ; 10
 332:   11 f4           brne    .+4             ; 0x338 <uart_putchar+0xc>
 334:   8d e0           ldi     r24, 0x0D       ; 13
 336:   fa df           rcall   .-12            ; 0x32c <uart_putchar>
        loop_until_bit_is_set(UCSRA, UDRE);
 338:   5d 9b           sbis    0x0b, 5 ; 11
 33a:   fe cf           rjmp    .-4             ; 0x338 <uart_putchar+0xc>
        UDR = c;
 33c:   1c b9           out     0x0c, r17       ; 12
        
        return (0);
}
 33e:   80 e0           ldi     r24, 0x00       ; 0
 340:   90 e0           ldi     r25, 0x00       ; 0
 342:   1f 91           pop     r17
 344:   08 95           ret

00000346 <StartUART>:
 346:   59 9a           sbi     0x0b, 1 ; 11
 348:   88 e1           ldi     r24, 0x18       ; 24
 34a:   8a b9           out     0x0a, r24       ; 10
 34c:   86 e8           ldi     r24, 0x86       ; 134
 34e:   80 bd           out     0x20, r24       ; 32
 350:   89 e1           ldi     r24, 0x19       ; 25
 352:   89 b9           out     0x09, r24       ; 9
 354:   60 e0           ldi     r22, 0x00       ; 0
 356:   70 e0           ldi     r23, 0x00       ; 0
 358:   86 e9           ldi     r24, 0x96       ; 150
 35a:   91 e0           ldi     r25, 0x01       ; 1
 35c:   01 d0           rcall   .+2             ; 0x360 <fdevopen>
 35e:   08 95           ret

00000360 <fdevopen>:
 360:   ef 92           push    r14
 362:   ff 92           push    r15
 364:   0f 93           push    r16
 366:   1f 93           push    r17
 368:   cf 93           push    r28
 36a:   df 93           push    r29
 36c:   8c 01           movw    r16, r24
 36e:   7b 01           movw    r14, r22
 370:   89 2b           or      r24, r25
 372:   11 f4           brne    .+4             ; 0x378 <fdevopen+0x18>
 374:   67 2b           or      r22, r23
 376:   c9 f1           breq    .+114           ; 0x3ea <fdevopen+0x8a>
 378:   6e e0           ldi     r22, 0x0E       ; 14
 37a:   70 e0           ldi     r23, 0x00       ; 0
 37c:   81 e0           ldi     r24, 0x01       ; 1
 37e:   90 e0           ldi     r25, 0x00       ; 0
 380:   3b d0           rcall   .+118           ; 0x3f8 <calloc>
 382:   fc 01           movw    r30, r24
 384:   00 97           sbiw    r24, 0x00       ; 0
 386:   89 f1           breq    .+98            ; 0x3ea <fdevopen+0x8a>
 388:   dc 01           movw    r26, r24
 38a:   80 e8           ldi     r24, 0x80       ; 128
 38c:   83 83           std     Z+3, r24        ; 0x03
 38e:   e1 14           cp      r14, r1
 390:   f1 04           cpc     r15, r1
 392:   71 f0           breq    .+28            ; 0x3b0 <fdevopen+0x50>
 394:   f3 86           std     Z+11, r15       ; 0x0b
 396:   e2 86           std     Z+10, r14       ; 0x0a
 398:   81 e8           ldi     r24, 0x81       ; 129
 39a:   83 83           std     Z+3, r24        ; 0x03
 39c:   80 91 71 00     lds     r24, 0x0071
 3a0:   90 91 72 00     lds     r25, 0x0072
 3a4:   89 2b           or      r24, r25
 3a6:   21 f4           brne    .+8             ; 0x3b0 <fdevopen+0x50>
 3a8:   f0 93 72 00     sts     0x0072, r31
 3ac:   e0 93 71 00     sts     0x0071, r30
 3b0:   01 15           cp      r16, r1
 3b2:   11 05           cpc     r17, r1
 3b4:   e1 f0           breq    .+56            ; 0x3ee <fdevopen+0x8e>
 3b6:   11 87           std     Z+9, r17        ; 0x09
 3b8:   00 87           std     Z+8, r16        ; 0x08
 3ba:   83 81           ldd     r24, Z+3        ; 0x03
 3bc:   82 60           ori     r24, 0x02       ; 2
 3be:   83 83           std     Z+3, r24        ; 0x03
 3c0:   80 91 73 00     lds     r24, 0x0073
 3c4:   90 91 74 00     lds     r25, 0x0074
 3c8:   89 2b           or      r24, r25
 3ca:   89 f4           brne    .+34            ; 0x3ee <fdevopen+0x8e>
 3cc:   f0 93 74 00     sts     0x0074, r31
 3d0:   e0 93 73 00     sts     0x0073, r30
 3d4:   80 91 75 00     lds     r24, 0x0075
 3d8:   90 91 76 00     lds     r25, 0x0076
 3dc:   89 2b           or      r24, r25
 3de:   39 f4           brne    .+14            ; 0x3ee <fdevopen+0x8e>
 3e0:   f0 93 76 00     sts     0x0076, r31
 3e4:   e0 93 75 00     sts     0x0075, r30
 3e8:   02 c0           rjmp    .+4             ; 0x3ee <fdevopen+0x8e>
 3ea:   a0 e0           ldi     r26, 0x00       ; 0
 3ec:   b0 e0           ldi     r27, 0x00       ; 0
 3ee:   cd 01           movw    r24, r26
 3f0:   e6 e0           ldi     r30, 0x06       ; 6
 3f2:   cd b7           in      r28, 0x3d       ; 61
 3f4:   de b7           in      r29, 0x3e       ; 62
 3f6:   26 c1           rjmp    .+588           ; 0x644 <__epilogue_restores__+0x18>

000003f8 <calloc>:
 3f8:   0f 93           push    r16
 3fa:   1f 93           push    r17
 3fc:   cf 93           push    r28
 3fe:   df 93           push    r29
 400:   86 9f           mul     r24, r22
 402:   80 01           movw    r16, r0
 404:   87 9f           mul     r24, r23
 406:   10 0d           add     r17, r0
 408:   96 9f           mul     r25, r22
 40a:   10 0d           add     r17, r0
 40c:   11 24           eor     r1, r1
 40e:   c8 01           movw    r24, r16
 410:   0d d0           rcall   .+26            ; 0x42c <malloc>
 412:   ec 01           movw    r28, r24
 414:   00 97           sbiw    r24, 0x00       ; 0
 416:   21 f0           breq    .+8             ; 0x420 <calloc+0x28>
 418:   a8 01           movw    r20, r16
 41a:   60 e0           ldi     r22, 0x00       ; 0
 41c:   70 e0           ldi     r23, 0x00       ; 0
 41e:   ff d0           rcall   .+510           ; 0x61e <memset>
 420:   ce 01           movw    r24, r28
 422:   df 91           pop     r29
 424:   cf 91           pop     r28
 426:   1f 91           pop     r17
 428:   0f 91           pop     r16
 42a:   08 95           ret

0000042c <malloc>:
 42c:   cf 93           push    r28
 42e:   df 93           push    r29
 430:   ac 01           movw    r20, r24
 432:   02 97           sbiw    r24, 0x02       ; 2
 434:   10 f4           brcc    .+4             ; 0x43a <malloc+0xe>
 436:   42 e0           ldi     r20, 0x02       ; 2
 438:   50 e0           ldi     r21, 0x00       ; 0
 43a:   a0 91 79 00     lds     r26, 0x0079
 43e:   b0 91 7a 00     lds     r27, 0x007A
 442:   fd 01           movw    r30, r26
 444:   c0 e0           ldi     r28, 0x00       ; 0
 446:   d0 e0           ldi     r29, 0x00       ; 0
 448:   20 e0           ldi     r18, 0x00       ; 0
 44a:   30 e0           ldi     r19, 0x00       ; 0
 44c:   20 c0           rjmp    .+64            ; 0x48e <__stack+0x2f>
 44e:   80 81           ld      r24, Z
 450:   91 81           ldd     r25, Z+1        ; 0x01
 452:   84 17           cp      r24, r20
 454:   95 07           cpc     r25, r21
 456:   69 f4           brne    .+26            ; 0x472 <__stack+0x13>
 458:   82 81           ldd     r24, Z+2        ; 0x02
 45a:   93 81           ldd     r25, Z+3        ; 0x03
 45c:   20 97           sbiw    r28, 0x00       ; 0
 45e:   19 f0           breq    .+6             ; 0x466 <__stack+0x7>
 460:   9b 83           std     Y+3, r25        ; 0x03
 462:   8a 83           std     Y+2, r24        ; 0x02
 464:   04 c0           rjmp    .+8             ; 0x46e <__stack+0xf>
 466:   90 93 7a 00     sts     0x007A, r25
 46a:   80 93 79 00     sts     0x0079, r24
 46e:   cf 01           movw    r24, r30
 470:   32 c0           rjmp    .+100           ; 0x4d6 <__stack+0x77>
 472:   48 17           cp      r20, r24
 474:   59 07           cpc     r21, r25
 476:   38 f4           brcc    .+14            ; 0x486 <__stack+0x27>
 478:   21 15           cp      r18, r1
 47a:   31 05           cpc     r19, r1
 47c:   19 f0           breq    .+6             ; 0x484 <__stack+0x25>
 47e:   82 17           cp      r24, r18
 480:   93 07           cpc     r25, r19
 482:   08 f4           brcc    .+2             ; 0x486 <__stack+0x27>
 484:   9c 01           movw    r18, r24
 486:   ef 01           movw    r28, r30
 488:   02 80           ldd     r0, Z+2 ; 0x02
 48a:   f3 81           ldd     r31, Z+3        ; 0x03
 48c:   e0 2d           mov     r30, r0
 48e:   30 97           sbiw    r30, 0x00       ; 0
 490:   f1 f6           brne    .-68            ; 0x44e <malloc+0x22>
 492:   21 15           cp      r18, r1
 494:   31 05           cpc     r19, r1
 496:   89 f1           breq    .+98            ; 0x4fa <__stack+0x9b>
 498:   c9 01           movw    r24, r18
 49a:   84 1b           sub     r24, r20
 49c:   95 0b           sbc     r25, r21
 49e:   04 97           sbiw    r24, 0x04       ; 4
 4a0:   08 f4           brcc    .+2             ; 0x4a4 <__stack+0x45>
 4a2:   a9 01           movw    r20, r18
 4a4:   e0 e0           ldi     r30, 0x00       ; 0
 4a6:   f0 e0           ldi     r31, 0x00       ; 0
 4a8:   26 c0           rjmp    .+76            ; 0x4f6 <__stack+0x97>
 4aa:   8d 91           ld      r24, X+
 4ac:   9c 91           ld      r25, X
 4ae:   11 97           sbiw    r26, 0x01       ; 1
 4b0:   82 17           cp      r24, r18
 4b2:   93 07           cpc     r25, r19
 4b4:   e9 f4           brne    .+58            ; 0x4f0 <__stack+0x91>
 4b6:   48 17           cp      r20, r24
 4b8:   59 07           cpc     r21, r25
 4ba:   79 f4           brne    .+30            ; 0x4da <__stack+0x7b>
 4bc:   ed 01           movw    r28, r26
 4be:   8a 81           ldd     r24, Y+2        ; 0x02
 4c0:   9b 81           ldd     r25, Y+3        ; 0x03
 4c2:   30 97           sbiw    r30, 0x00       ; 0
 4c4:   19 f0           breq    .+6             ; 0x4cc <__stack+0x6d>
 4c6:   93 83           std     Z+3, r25        ; 0x03
 4c8:   82 83           std     Z+2, r24        ; 0x02
 4ca:   04 c0           rjmp    .+8             ; 0x4d4 <__stack+0x75>
 4cc:   90 93 7a 00     sts     0x007A, r25
 4d0:   80 93 79 00     sts     0x0079, r24
 4d4:   cd 01           movw    r24, r26
 4d6:   02 96           adiw    r24, 0x02       ; 2
 4d8:   49 c0           rjmp    .+146           ; 0x56c <__stack+0x10d>
 4da:   84 1b           sub     r24, r20
 4dc:   95 0b           sbc     r25, r21
 4de:   fd 01           movw    r30, r26
 4e0:   e8 0f           add     r30, r24
 4e2:   f9 1f           adc     r31, r25
 4e4:   41 93           st      Z+, r20
 4e6:   51 93           st      Z+, r21
 4e8:   02 97           sbiw    r24, 0x02       ; 2
 4ea:   8d 93           st      X+, r24
 4ec:   9c 93           st      X, r25
 4ee:   3a c0           rjmp    .+116           ; 0x564 <__stack+0x105>
 4f0:   fd 01           movw    r30, r26
 4f2:   a2 81           ldd     r26, Z+2        ; 0x02
 4f4:   b3 81           ldd     r27, Z+3        ; 0x03
 4f6:   10 97           sbiw    r26, 0x00       ; 0
 4f8:   c1 f6           brne    .-80            ; 0x4aa <__stack+0x4b>
 4fa:   80 91 77 00     lds     r24, 0x0077
 4fe:   90 91 78 00     lds     r25, 0x0078
 502:   89 2b           or      r24, r25
 504:   41 f4           brne    .+16            ; 0x516 <__stack+0xb7>
 506:   80 91 62 00     lds     r24, 0x0062
 50a:   90 91 63 00     lds     r25, 0x0063
 50e:   90 93 78 00     sts     0x0078, r25
 512:   80 93 77 00     sts     0x0077, r24
 516:   20 91 64 00     lds     r18, 0x0064
 51a:   30 91 65 00     lds     r19, 0x0065
 51e:   21 15           cp      r18, r1
 520:   31 05           cpc     r19, r1
 522:   41 f4           brne    .+16            ; 0x534 <__stack+0xd5>
 524:   2d b7           in      r18, 0x3d       ; 61
 526:   3e b7           in      r19, 0x3e       ; 62
 528:   80 91 60 00     lds     r24, 0x0060
 52c:   90 91 61 00     lds     r25, 0x0061
 530:   28 1b           sub     r18, r24
 532:   39 0b           sbc     r19, r25
 534:   e0 91 77 00     lds     r30, 0x0077
 538:   f0 91 78 00     lds     r31, 0x0078
 53c:   2e 1b           sub     r18, r30
 53e:   3f 0b           sbc     r19, r31
 540:   24 17           cp      r18, r20
 542:   35 07           cpc     r19, r21
 544:   88 f0           brcs    .+34            ; 0x568 <__stack+0x109>
 546:   ca 01           movw    r24, r20
 548:   02 96           adiw    r24, 0x02       ; 2
 54a:   28 17           cp      r18, r24
 54c:   39 07           cpc     r19, r25
 54e:   60 f0           brcs    .+24            ; 0x568 <__stack+0x109>
 550:   cf 01           movw    r24, r30
 552:   84 0f           add     r24, r20
 554:   95 1f           adc     r25, r21
 556:   02 96           adiw    r24, 0x02       ; 2
 558:   90 93 78 00     sts     0x0078, r25
 55c:   80 93 77 00     sts     0x0077, r24
 560:   41 93           st      Z+, r20
 562:   51 93           st      Z+, r21
 564:   cf 01           movw    r24, r30
 566:   02 c0           rjmp    .+4             ; 0x56c <__stack+0x10d>
 568:   80 e0           ldi     r24, 0x00       ; 0
 56a:   90 e0           ldi     r25, 0x00       ; 0
 56c:   df 91           pop     r29
 56e:   cf 91           pop     r28
 570:   08 95           ret

00000572 <free>:
 572:   cf 93           push    r28
 574:   df 93           push    r29
 576:   00 97           sbiw    r24, 0x00       ; 0
 578:   09 f4           brne    .+2             ; 0x57c <free+0xa>
 57a:   4e c0           rjmp    .+156           ; 0x618 <free+0xa6>
 57c:   ec 01           movw    r28, r24
 57e:   22 97           sbiw    r28, 0x02       ; 2
 580:   1b 82           std     Y+3, r1 ; 0x03
 582:   1a 82           std     Y+2, r1 ; 0x02
 584:   a0 91 79 00     lds     r26, 0x0079
 588:   b0 91 7a 00     lds     r27, 0x007A
 58c:   10 97           sbiw    r26, 0x00       ; 0
 58e:   11 f1           breq    .+68            ; 0x5d4 <free+0x62>
 590:   40 e0           ldi     r20, 0x00       ; 0
 592:   50 e0           ldi     r21, 0x00       ; 0
 594:   01 c0           rjmp    .+2             ; 0x598 <free+0x26>
 596:   dc 01           movw    r26, r24
 598:   ac 17           cp      r26, r28
 59a:   bd 07           cpc     r27, r29
 59c:   00 f1           brcs    .+64            ; 0x5de <free+0x6c>
 59e:   bb 83           std     Y+3, r27        ; 0x03
 5a0:   aa 83           std     Y+2, r26        ; 0x02
 5a2:   fe 01           movw    r30, r28
 5a4:   21 91           ld      r18, Z+
 5a6:   31 91           ld      r19, Z+
 5a8:   e2 0f           add     r30, r18
 5aa:   f3 1f           adc     r31, r19
 5ac:   ea 17           cp      r30, r26
 5ae:   fb 07           cpc     r31, r27
 5b0:   71 f4           brne    .+28            ; 0x5ce <free+0x5c>
 5b2:   2e 5f           subi    r18, 0xFE       ; 254
 5b4:   3f 4f           sbci    r19, 0xFF       ; 255
 5b6:   8d 91           ld      r24, X+
 5b8:   9c 91           ld      r25, X
 5ba:   11 97           sbiw    r26, 0x01       ; 1
 5bc:   82 0f           add     r24, r18
 5be:   93 1f           adc     r25, r19
 5c0:   99 83           std     Y+1, r25        ; 0x01
 5c2:   88 83           st      Y, r24
 5c4:   fd 01           movw    r30, r26
 5c6:   82 81           ldd     r24, Z+2        ; 0x02
 5c8:   93 81           ldd     r25, Z+3        ; 0x03
 5ca:   9b 83           std     Y+3, r25        ; 0x03
 5cc:   8a 83           std     Y+2, r24        ; 0x02
 5ce:   41 15           cp      r20, r1
 5d0:   51 05           cpc     r21, r1
 5d2:   59 f4           brne    .+22            ; 0x5ea <free+0x78>
 5d4:   d0 93 7a 00     sts     0x007A, r29
 5d8:   c0 93 79 00     sts     0x0079, r28
 5dc:   1d c0           rjmp    .+58            ; 0x618 <free+0xa6>
 5de:   fd 01           movw    r30, r26
 5e0:   82 81           ldd     r24, Z+2        ; 0x02
 5e2:   93 81           ldd     r25, Z+3        ; 0x03
 5e4:   ad 01           movw    r20, r26
 5e6:   00 97           sbiw    r24, 0x00       ; 0
 5e8:   b1 f6           brne    .-84            ; 0x596 <free+0x24>
 5ea:   fa 01           movw    r30, r20
 5ec:   d3 83           std     Z+3, r29        ; 0x03
 5ee:   c2 83           std     Z+2, r28        ; 0x02
 5f0:   21 91           ld      r18, Z+
 5f2:   31 91           ld      r19, Z+
 5f4:   e2 0f           add     r30, r18
 5f6:   f3 1f           adc     r31, r19
 5f8:   ec 17           cp      r30, r28
 5fa:   fd 07           cpc     r31, r29
 5fc:   69 f4           brne    .+26            ; 0x618 <free+0xa6>
 5fe:   2e 5f           subi    r18, 0xFE       ; 254
 600:   3f 4f           sbci    r19, 0xFF       ; 255
 602:   88 81           ld      r24, Y
 604:   99 81           ldd     r25, Y+1        ; 0x01
 606:   82 0f           add     r24, r18
 608:   93 1f           adc     r25, r19
 60a:   fa 01           movw    r30, r20
 60c:   91 83           std     Z+1, r25        ; 0x01
 60e:   80 83           st      Z, r24
 610:   8a 81           ldd     r24, Y+2        ; 0x02
 612:   9b 81           ldd     r25, Y+3        ; 0x03
 614:   93 83           std     Z+3, r25        ; 0x03
 616:   82 83           std     Z+2, r24        ; 0x02
 618:   df 91           pop     r29
 61a:   cf 91           pop     r28
 61c:   08 95           ret

0000061e <memset>:
 61e:   dc 01           movw    r26, r24
 620:   01 c0           rjmp    .+2             ; 0x624 <memset+0x6>
 622:   6d 93           st      X+, r22
 624:   41 50           subi    r20, 0x01       ; 1
 626:   50 40           sbci    r21, 0x00       ; 0
 628:   e0 f7           brcc    .-8             ; 0x622 <memset+0x4>
 62a:   08 95           ret

0000062c <__epilogue_restores__>:
 62c:   2a 88           ldd     r2, Y+18        ; 0x12
 62e:   39 88           ldd     r3, Y+17        ; 0x11
 630:   48 88           ldd     r4, Y+16        ; 0x10
 632:   5f 84           ldd     r5, Y+15        ; 0x0f
 634:   6e 84           ldd     r6, Y+14        ; 0x0e
 636:   7d 84           ldd     r7, Y+13        ; 0x0d
 638:   8c 84           ldd     r8, Y+12        ; 0x0c
 63a:   9b 84           ldd     r9, Y+11        ; 0x0b
 63c:   aa 84           ldd     r10, Y+10       ; 0x0a
 63e:   b9 84           ldd     r11, Y+9        ; 0x09
 640:   c8 84           ldd     r12, Y+8        ; 0x08
 642:   df 80           ldd     r13, Y+7        ; 0x07
 644:   ee 80           ldd     r14, Y+6        ; 0x06
 646:   fd 80           ldd     r15, Y+5        ; 0x05
 648:   0c 81           ldd     r16, Y+4        ; 0x04
 64a:   1b 81           ldd     r17, Y+3        ; 0x03
 64c:   aa 81           ldd     r26, Y+2        ; 0x02
 64e:   b9 81           ldd     r27, Y+1        ; 0x01
 650:   ce 0f           add     r28, r30
 652:   d1 1d           adc     r29, r1
 654:   0f b6           in      r0, 0x3f        ; 63
 656:   f8 94           cli
 658:   de bf           out     0x3e, r29       ; 62
 65a:   0f be           out     0x3f, r0        ; 63
 65c:   cd bf           out     0x3d, r28       ; 61
 65e:   ed 01           movw    r28, r26
 660:   08 95           ret

00000662 <_exit>:
 662:   ff cf           rjmp    .-2             ; 0x662 <_exit>