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IR-Tx_V0_01.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         00000636  00000000  00000000  00000094  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         00000006  00800060  00000636  000006ca  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          00000016  00800066  00800066  000006d0  2**0
                  ALLOC
  3 .stab         00000378  00000000  00000000  000006d0  2**2
                  CONTENTS, READONLY, DEBUGGING
  4 .stabstr      00000071  00000000  00000000  00000a48  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_aranges 00000040  00000000  00000000  00000ab9  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_pubnames 000000f4  00000000  00000000  00000af9  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_info   00000263  00000000  00000000  00000bed  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_abbrev 00000148  00000000  00000000  00000e50  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_line   000004ec  00000000  00000000  00000f98  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_frame  000000b0  00000000  00000000  00001484  2**2
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_str    0000012f  00000000  00000000  00001534  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_loc    0000003c  00000000  00000000  00001663  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00000000 <__vectors>:
   0:   12 c0           rjmp    .+36            ; 0x26 <__ctors_end>
   2:   2c c0           rjmp    .+88            ; 0x5c <__bad_interrupt>
   4:   2b c0           rjmp    .+86            ; 0x5c <__bad_interrupt>
   6:   2a c0           rjmp    .+84            ; 0x5c <__bad_interrupt>
   8:   29 c0           rjmp    .+82            ; 0x5c <__bad_interrupt>
   a:   3a c0           rjmp    .+116           ; 0x80 <__vector_5>
   c:   27 c0           rjmp    .+78            ; 0x5c <__bad_interrupt>
   e:   26 c0           rjmp    .+76            ; 0x5c <__bad_interrupt>
  10:   26 c0           rjmp    .+76            ; 0x5e <__vector_8>
  12:   af c0           rjmp    .+350           ; 0x172 <__vector_9>
  14:   23 c0           rjmp    .+70            ; 0x5c <__bad_interrupt>
  16:   22 c0           rjmp    .+68            ; 0x5c <__bad_interrupt>
  18:   21 c0           rjmp    .+66            ; 0x5c <__bad_interrupt>
  1a:   20 c0           rjmp    .+64            ; 0x5c <__bad_interrupt>
  1c:   1f c0           rjmp    .+62            ; 0x5c <__bad_interrupt>
  1e:   1e c0           rjmp    .+60            ; 0x5c <__bad_interrupt>
  20:   1d c0           rjmp    .+58            ; 0x5c <__bad_interrupt>
  22:   1c c0           rjmp    .+56            ; 0x5c <__bad_interrupt>
  24:   1b c0           rjmp    .+54            ; 0x5c <__bad_interrupt>

00000026 <__ctors_end>:
  26:   11 24           eor     r1, r1
  28:   1f be           out     0x3f, r1        ; 63
  2a:   cf e5           ldi     r28, 0x5F       ; 95
  2c:   d4 e0           ldi     r29, 0x04       ; 4
  2e:   de bf           out     0x3e, r29       ; 62
  30:   cd bf           out     0x3d, r28       ; 61

00000032 <__do_copy_data>:
  32:   10 e0           ldi     r17, 0x00       ; 0
  34:   a0 e6           ldi     r26, 0x60       ; 96
  36:   b0 e0           ldi     r27, 0x00       ; 0
  38:   e6 e3           ldi     r30, 0x36       ; 54
  3a:   f6 e0           ldi     r31, 0x06       ; 6
  3c:   02 c0           rjmp    .+4             ; 0x42 <.do_copy_data_start>

0000003e <.do_copy_data_loop>:
  3e:   05 90           lpm     r0, Z+
  40:   0d 92           st      X+, r0

00000042 <.do_copy_data_start>:
  42:   a6 36           cpi     r26, 0x66       ; 102
  44:   b1 07           cpc     r27, r17
  46:   d9 f7           brne    .-10            ; 0x3e <.do_copy_data_loop>

00000048 <__do_clear_bss>:
  48:   10 e0           ldi     r17, 0x00       ; 0
  4a:   a6 e6           ldi     r26, 0x66       ; 102
  4c:   b0 e0           ldi     r27, 0x00       ; 0
  4e:   01 c0           rjmp    .+2             ; 0x52 <.do_clear_bss_start>

00000050 <.do_clear_bss_loop>:
  50:   1d 92           st      X+, r1

00000052 <.do_clear_bss_start>:
  52:   ac 37           cpi     r26, 0x7C       ; 124
  54:   b1 07           cpc     r27, r17
  56:   e1 f7           brne    .-8             ; 0x50 <.do_clear_bss_loop>
  58:   11 d1           rcall   .+546           ; 0x27c <main>
  5a:   ec c2           rjmp    .+1496          ; 0x634 <_exit>

0000005c <__bad_interrupt>:
  5c:   d1 cf           rjmp    .-94            ; 0x0 <__vectors>

0000005e <__vector_8>:
volatile unsigned char IRbit = 0;


SIGNAL(SIG_OVERFLOW1)
{
  5e:   1f 92           push    r1
  60:   0f 92           push    r0
  62:   0f b6           in      r0, 0x3f        ; 63
  64:   0f 92           push    r0
  66:   11 24           eor     r1, r1
  68:   8f 93           push    r24
        TMR1OvF++;
  6a:   80 91 6a 00     lds     r24, 0x006A
  6e:   8f 5f           subi    r24, 0xFF       ; 255
  70:   80 93 6a 00     sts     0x006A, r24
  74:   8f 91           pop     r24
  76:   0f 90           pop     r0
  78:   0f be           out     0x3f, r0        ; 63
  7a:   0f 90           pop     r0
  7c:   1f 90           pop     r1
  7e:   18 95           reti

00000080 <__vector_5>:
}


SIGNAL(SIG_INPUT_CAPTURE1)
{
  80:   1f 92           push    r1
  82:   0f 92           push    r0
  84:   0f b6           in      r0, 0x3f        ; 63
  86:   0f 92           push    r0
  88:   11 24           eor     r1, r1
  8a:   2f 93           push    r18
  8c:   3f 93           push    r19
  8e:   4f 93           push    r20
  90:   8f 93           push    r24
  92:   9f 93           push    r25
        static unsigned int pos_ICR;
        static unsigned int ppm;
        
        if ((TCCR1B & (1<<ICES1)) != 0)
  94:   0e b4           in      r0, 0x2e        ; 46
  96:   06 fe           sbrs    r0, 6
  98:   0c c0           rjmp    .+24            ; 0xb2 <__vector_5+0x32>
        {
                TCCR1B &= ~(1<<ICES1);                                                          //invert trigger
  9a:   8e b5           in      r24, 0x2e       ; 46
  9c:   8f 7b           andi    r24, 0xBF       ; 191
  9e:   8e bd           out     0x2e, r24       ; 46
                TMR1OvF = 0;
  a0:   10 92 6a 00     sts     0x006A, r1
                pos_ICR = ICR1; 
  a4:   86 b5           in      r24, 0x26       ; 38
  a6:   97 b5           in      r25, 0x27       ; 39
  a8:   90 93 71 00     sts     0x0071, r25
  ac:   80 93 70 00     sts     0x0070, r24
  b0:   4c c0           rjmp    .+152           ; 0x14a <__vector_5+0xca>
        }
        else                                                                                    //Negative Flanke
        {
                TCCR1B |= (1<<ICES1);
  b2:   8e b5           in      r24, 0x2e       ; 46
  b4:   80 64           ori     r24, 0x40       ; 64
  b6:   8e bd           out     0x2e, r24       ; 46
                ppm = (ICR1 - pos_ICR + (int) TMR1OvF * 65536);
  b8:   26 b5           in      r18, 0x26       ; 38
  ba:   37 b5           in      r19, 0x27       ; 39
  bc:   80 91 6a 00     lds     r24, 0x006A
  c0:   80 91 70 00     lds     r24, 0x0070
  c4:   90 91 71 00     lds     r25, 0x0071
  c8:   28 1b           sub     r18, r24
  ca:   39 0b           sbc     r19, r25
  cc:   30 93 6f 00     sts     0x006F, r19
  d0:   20 93 6e 00     sts     0x006E, r18
                if ((ppm > 600) && (ppm < 2400)) 
  d4:   c9 01           movw    r24, r18
  d6:   89 55           subi    r24, 0x59       ; 89
  d8:   92 40           sbci    r25, 0x02       ; 2
  da:   87 50           subi    r24, 0x07       ; 7
  dc:   97 40           sbci    r25, 0x07       ; 7
  de:   a8 f5           brcc    .+106           ; 0x14a <__vector_5+0xca>
                {
                        if (ppm > 2100) ppm = 2100;
  e0:   88 e0           ldi     r24, 0x08       ; 8
  e2:   25 33           cpi     r18, 0x35       ; 53
  e4:   38 07           cpc     r19, r24
  e6:   18 f0           brcs    .+6             ; 0xee <__vector_5+0x6e>
  e8:   84 e3           ldi     r24, 0x34       ; 52
  ea:   98 e0           ldi     r25, 0x08       ; 8
  ec:   05 c0           rjmp    .+10            ; 0xf8 <__vector_5+0x78>
                        if (ppm < 900) ppm = 900;
  ee:   24 58           subi    r18, 0x84       ; 132
  f0:   33 40           sbci    r19, 0x03       ; 3
  f2:   30 f4           brcc    .+12            ; 0x100 <__vector_5+0x80>
  f4:   84 e8           ldi     r24, 0x84       ; 132
  f6:   93 e0           ldi     r25, 0x03       ; 3
  f8:   90 93 6f 00     sts     0x006F, r25
  fc:   80 93 6e 00     sts     0x006E, r24
                        ppm = (ppm_signal * 7 + ppm) / 8;
 100:   20 91 66 00     lds     r18, 0x0066
 104:   30 91 67 00     lds     r19, 0x0067
 108:   c9 01           movw    r24, r18
 10a:   43 e0           ldi     r20, 0x03       ; 3
 10c:   88 0f           add     r24, r24
 10e:   99 1f           adc     r25, r25
 110:   4a 95           dec     r20
 112:   e1 f7           brne    .-8             ; 0x10c <__vector_5+0x8c>
 114:   82 1b           sub     r24, r18
 116:   93 0b           sbc     r25, r19
 118:   20 91 6e 00     lds     r18, 0x006E
 11c:   30 91 6f 00     lds     r19, 0x006F
 120:   82 0f           add     r24, r18
 122:   93 1f           adc     r25, r19
 124:   23 e0           ldi     r18, 0x03       ; 3
 126:   96 95           lsr     r25
 128:   87 95           ror     r24
 12a:   2a 95           dec     r18
 12c:   e1 f7           brne    .-8             ; 0x126 <__vector_5+0xa6>
 12e:   90 93 6f 00     sts     0x006F, r25
 132:   80 93 6e 00     sts     0x006E, r24
                        ppm_signal = ppm;
 136:   90 93 67 00     sts     0x0067, r25
 13a:   80 93 66 00     sts     0x0066, r24
                        ppm_new = 1;
 13e:   81 e0           ldi     r24, 0x01       ; 1
 140:   90 e0           ldi     r25, 0x00       ; 0
 142:   90 93 69 00     sts     0x0069, r25
 146:   80 93 68 00     sts     0x0068, r24
 14a:   9f 91           pop     r25
 14c:   8f 91           pop     r24
 14e:   4f 91           pop     r20
 150:   3f 91           pop     r19
 152:   2f 91           pop     r18
 154:   0f 90           pop     r0
 156:   0f be           out     0x3f, r0        ; 63
 158:   0f 90           pop     r0
 15a:   1f 90           pop     r1
 15c:   18 95           reti

0000015e <StartIRModulation>:
                }
                
        } 

}



/*##############################################################################*/
void StartIRModulation(void)
{
 15e:   89 e0           ldi     r24, 0x09       ; 9
 160:   85 bd           out     0x25, r24       ; 37
        //Timer1 Config for generation the 38Khz IR Modulation
        TCCR2 =         (0<<FOC2)|(0<<WGM20)|(0<<COM21)|(0<<COM20)|
                                (1<<WGM21) |(0<<CS22) |(0<<CS21) |(1<<CS20);                    

        OCR2 = 108;                                                                     //~38Khz @ 8Mhz
 162:   8c e6           ldi     r24, 0x6C       ; 108
 164:   83 bd           out     0x23, r24       ; 35

        //Timer 0 Config for getting right timing for IR Pattern
        TCCR0 = (1<<CS02)|(0<<CS01)|(1<<CS00);  // clk(@8MHz) / 1024 =  128us / clk (resolution)
 166:   85 e0           ldi     r24, 0x05       ; 5
 168:   83 bf           out     0x33, r24       ; 51
        TIMSK &= ~(1<<TOIE0);                                           //
 16a:   89 b7           in      r24, 0x39       ; 57
 16c:   8e 7f           andi    r24, 0xFE       ; 254
 16e:   89 bf           out     0x39, r24       ; 57
 170:   08 95           ret

00000172 <__vector_9>:

}


SIGNAL(SIG_OVERFLOW0)
{
 172:   1f 92           push    r1
 174:   0f 92           push    r0
 176:   0f b6           in      r0, 0x3f        ; 63
 178:   0f 92           push    r0
 17a:   11 24           eor     r1, r1
 17c:   8f 93           push    r24
 17e:   9f 93           push    r25

        switch (IRstate) 
 180:   90 91 6b 00     lds     r25, 0x006B
 184:   92 30           cpi     r25, 0x02       ; 2
 186:   b1 f0           breq    .+44            ; 0x1b4 <__vector_9+0x42>
 188:   93 30           cpi     r25, 0x03       ; 3
 18a:   20 f4           brcc    .+8             ; 0x194 <__vector_9+0x22>
 18c:   91 30           cpi     r25, 0x01       ; 1
 18e:   09 f0           breq    .+2             ; 0x192 <__vector_9+0x20>
 190:   52 c0           rjmp    .+164           ; 0x236 <__vector_9+0xc4>
 192:   06 c0           rjmp    .+12            ; 0x1a0 <__vector_9+0x2e>
 194:   93 30           cpi     r25, 0x03       ; 3
 196:   e9 f0           breq    .+58            ; 0x1d2 <__vector_9+0x60>
 198:   94 30           cpi     r25, 0x04       ; 4
 19a:   09 f0           breq    .+2             ; 0x19e <__vector_9+0x2c>
 19c:   4c c0           rjmp    .+152           ; 0x236 <__vector_9+0xc4>
 19e:   36 c0           rjmp    .+108           ; 0x20c <__vector_9+0x9a>
        { 
    case 1: 
                TCCR2 setbit (1<<COM20);
 1a0:   85 b5           in      r24, 0x25       ; 37
 1a2:   80 61           ori     r24, 0x10       ; 16
 1a4:   85 bd           out     0x25, r24       ; 37
                IRstate = 2;
 1a6:   82 e0           ldi     r24, 0x02       ; 2
 1a8:   80 93 6b 00     sts     0x006B, r24
                IRbit = 0;
 1ac:   10 92 6d 00     sts     0x006D, r1
                TCNT0 = 255 - (13000 / 128);
 1b0:   8a e9           ldi     r24, 0x9A       ; 154
 1b2:   0b c0           rjmp    .+22            ; 0x1ca <__vector_9+0x58>
                break;
    case 2: 
                TCCR2 clrbit (1<<COM20);
 1b4:   85 b5           in      r24, 0x25       ; 37
 1b6:   8f 7e           andi    r24, 0xEF       ; 239
 1b8:   85 bd           out     0x25, r24       ; 37
                IRstate = 3;
 1ba:   83 e0           ldi     r24, 0x03       ; 3
 1bc:   80 93 6b 00     sts     0x006B, r24
                if ((IRdat & 0x40) == 0)        TCNT0 = 255 - (1000 / 128);
 1c0:   80 91 6c 00     lds     r24, 0x006C
 1c4:   86 fd           sbrc    r24, 6
 1c6:   03 c0           rjmp    .+6             ; 0x1ce <__vector_9+0x5c>
 1c8:   88 ef           ldi     r24, 0xF8       ; 248
 1ca:   82 bf           out     0x32, r24       ; 50
 1cc:   39 c0           rjmp    .+114           ; 0x240 <__vector_9+0xce>
                else TCNT0 = 255 - (3000 / 128);
 1ce:   88 ee           ldi     r24, 0xE8       ; 232
 1d0:   fc cf           rjmp    .-8             ; 0x1ca <__vector_9+0x58>
                break;
    case 3: 
                TCCR2 setbit (1<<COM20);        
 1d2:   85 b5           in      r24, 0x25       ; 37
 1d4:   80 61           ori     r24, 0x10       ; 16
 1d6:   85 bd           out     0x25, r24       ; 37
                TCNT0 = 255 - (1000 / 128);
 1d8:   88 ef           ldi     r24, 0xF8       ; 248
 1da:   82 bf           out     0x32, r24       ; 50
                IRdat = IRdat << 1;
 1dc:   80 91 6c 00     lds     r24, 0x006C
 1e0:   88 0f           add     r24, r24
 1e2:   80 93 6c 00     sts     0x006C, r24
                IRbit++;
 1e6:   80 91 6d 00     lds     r24, 0x006D
 1ea:   8f 5f           subi    r24, 0xFF       ; 255
 1ec:   80 93 6d 00     sts     0x006D, r24
                if (IRbit < 7) IRstate = 2;
 1f0:   80 91 6d 00     lds     r24, 0x006D
 1f4:   87 30           cpi     r24, 0x07       ; 7
 1f6:   20 f4           brcc    .+8             ; 0x200 <__vector_9+0x8e>
 1f8:   82 e0           ldi     r24, 0x02       ; 2
 1fa:   80 93 6b 00     sts     0x006B, r24
 1fe:   20 c0           rjmp    .+64            ; 0x240 <__vector_9+0xce>
                else 
                {
                        IRstate = 4;
 200:   84 e0           ldi     r24, 0x04       ; 4
 202:   80 93 6b 00     sts     0x006B, r24
                        IRbit = 0;
 206:   10 92 6d 00     sts     0x006D, r1
 20a:   1a c0           rjmp    .+52            ; 0x240 <__vector_9+0xce>
                }
                break;
        case 4:
                TCCR2 clrbit (1<<COM20);        
 20c:   85 b5           in      r24, 0x25       ; 37
 20e:   8f 7e           andi    r24, 0xEF       ; 239
 210:   85 bd           out     0x25, r24       ; 37
                TCNT0 = 255 - (25000 / 128);
 212:   8c e3           ldi     r24, 0x3C       ; 60
 214:   82 bf           out     0x32, r24       ; 50
                if (IRbit < 20) IRstate = 4;
 216:   80 91 6d 00     lds     r24, 0x006D
 21a:   84 31           cpi     r24, 0x14       ; 20
 21c:   18 f4           brcc    .+6             ; 0x224 <__vector_9+0xb2>
 21e:   90 93 6b 00     sts     0x006B, r25
 222:   03 c0           rjmp    .+6             ; 0x22a <__vector_9+0xb8>
                else IRstate = 5;
 224:   85 e0           ldi     r24, 0x05       ; 5
 226:   80 93 6b 00     sts     0x006B, r24
                IRbit++;
 22a:   80 91 6d 00     lds     r24, 0x006D
 22e:   8f 5f           subi    r24, 0xFF       ; 255
 230:   80 93 6d 00     sts     0x006D, r24
 234:   05 c0           rjmp    .+10            ; 0x240 <__vector_9+0xce>
                break;
        default:
                TIMSK &= ~(1<<TOIE0);
 236:   89 b7           in      r24, 0x39       ; 57
 238:   8e 7f           andi    r24, 0xFE       ; 254
 23a:   89 bf           out     0x39, r24       ; 57
                IRstate = 0;
 23c:   10 92 6b 00     sts     0x006B, r1
 240:   9f 91           pop     r25
 242:   8f 91           pop     r24
 244:   0f 90           pop     r0
 246:   0f be           out     0x3f, r0        ; 63
 248:   0f 90           pop     r0
 24a:   1f 90           pop     r1
 24c:   18 95           reti

0000024e <SendIRSignal>:
                break;

        }

}





/*##############################################################################*/
void SendIRSignal(unsigned char txbyte)
{
 24e:   98 2f           mov     r25, r24
        while (IRstate != 0) {}                                         //IR already in action ?, if so, wait
 250:   80 91 6b 00     lds     r24, 0x006B
 254:   88 23           and     r24, r24
 256:   e1 f7           brne    .-8             ; 0x250 <SendIRSignal+0x2>
        IRstate = 1;                                                                    //initial State
 258:   81 e0           ldi     r24, 0x01       ; 1
 25a:   80 93 6b 00     sts     0x006B, r24
        IRdat = txbyte;                                                                 //copy IR Data
 25e:   90 93 6c 00     sts     0x006C, r25
        TIFR &= TOV0;                                                                   //set TMR0 Int Flag
 262:   88 b7           in      r24, 0x38       ; 56
 264:   18 be           out     0x38, r1        ; 56
        TIMSK setbit (1<<TOIE0);                                                //Enable TMR0 Int       
 266:   89 b7           in      r24, 0x39       ; 57
 268:   81 60           ori     r24, 0x01       ; 1
 26a:   89 bf           out     0x39, r24       ; 57
 26c:   08 95           ret

0000026e <StartPPM>:
}







/*##############################################################################*/
void StartPPM(void)
{
 26e:   1f bc           out     0x2f, r1        ; 47
        
        //global timer1 Config
        TCCR1A =        (0<<COM1A1)|(0<<COM1A0)|(0<<COM1B1)|(0<<COM1B0)|
                                (0<<FOC1A) |(0<<FOC1B) |(0<<WGM10) |(0<<WGM11);                 
    TCCR1B =    (1<<ICNC1)|(1<<ICES1)|(0<<WGM13)|
 270:   82 ec           ldi     r24, 0xC2       ; 194
 272:   8e bd           out     0x2e, r24       ; 46
                                (0<<WGM12)|(0<<CS12)|(1<<CS11)|(0<<CS10);                               //ICP_POS_FLANKE

        // interrupts
        TIMSK |=        (1<<TICIE1)|(1<<TOIE1);                                                                 //ICP_INT_ENABLE and TIMER1_INT_ENABLE
 274:   89 b7           in      r24, 0x39       ; 57
 276:   84 62           ori     r24, 0x24       ; 36
 278:   89 bf           out     0x39, r24       ; 57
 27a:   08 95           ret

0000027c <main>:

}




/*##############################################################################*/
// MAIN
/*##############################################################################*/
int main (void)
{
 27c:   88 e0           ldi     r24, 0x08       ; 8
 27e:   84 bb           out     0x14, r24       ; 20

    DDRC  = (1<<ledred);
    PORTC = 0x00;
 280:   15 ba           out     0x15, r1        ; 21
    DDRD  = (1<<ledgreen);
 282:   80 e8           ldi     r24, 0x80       ; 128
 284:   81 bb           out     0x11, r24       ; 17
    PORTD = 0x00;
 286:   12 ba           out     0x12, r1        ; 18
    DDRB  = (1<<1)|(1<<2)|(1<<3);
 288:   8e e0           ldi     r24, 0x0E       ; 14
 28a:   87 bb           out     0x17, r24       ; 23
    PORTB = 0x00;
 28c:   18 ba           out     0x18, r1        ; 24


        StartUART();
 28e:   44 d0           rcall   .+136           ; 0x318 <StartUART>
 290:   1f bc           out     0x2f, r1        ; 47
 292:   82 ec           ldi     r24, 0xC2       ; 194
 294:   8e bd           out     0x2e, r24       ; 46
 296:   89 b7           in      r24, 0x39       ; 57
 298:   84 62           ori     r24, 0x24       ; 36
 29a:   89 bf           out     0x39, r24       ; 57
        StartPPM();
        StartIRModulation();
 29c:   60 df           rcall   .-320           ; 0x15e <StartIRModulation>
        sei();
 29e:   78 94           sei

    
    while (1)
        {
                //printf("%d ",ppm_signal);
                if (ppm_new == 1)
 2a0:   80 91 68 00     lds     r24, 0x0068
 2a4:   90 91 69 00     lds     r25, 0x0069
 2a8:   01 97           sbiw    r24, 0x01       ; 1
 2aa:   d1 f7           brne    .-12            ; 0x2a0 <main+0x24>
                {
                        ppm_new = 0;
 2ac:   10 92 69 00     sts     0x0069, r1
 2b0:   10 92 68 00     sts     0x0068, r1
                        if (ppm_signal > 1750)
 2b4:   80 91 66 00     lds     r24, 0x0066
 2b8:   90 91 67 00     lds     r25, 0x0067
 2bc:   87 5d           subi    r24, 0xD7       ; 215
 2be:   96 40           sbci    r25, 0x06       ; 6
 2c0:   58 f0           brcs    .+22            ; 0x2d8 <main+0x5c>
                        {
                                SendIRSignal(ZOOM);
 2c2:   81 e4           ldi     r24, 0x41       ; 65
 2c4:   c4 df           rcall   .-120           ; 0x24e <SendIRSignal>
                                PORTC |= (1<<ledred);
 2c6:   ab 9a           sbi     0x15, 3 ; 21
                                while (ppm_signal > 1650)  {}
 2c8:   80 91 66 00     lds     r24, 0x0066
 2cc:   90 91 67 00     lds     r25, 0x0067
 2d0:   83 57           subi    r24, 0x73       ; 115
 2d2:   96 40           sbci    r25, 0x06       ; 6
 2d4:   c8 f7           brcc    .-14            ; 0x2c8 <main+0x4c>
                                PORTC &= ~(1<<ledred);
 2d6:   ab 98           cbi     0x15, 3 ; 21
                        }
                        
                        if (ppm_signal < 1250)
 2d8:   80 91 66 00     lds     r24, 0x0066
 2dc:   90 91 67 00     lds     r25, 0x0067
 2e0:   82 5e           subi    r24, 0xE2       ; 226
 2e2:   94 40           sbci    r25, 0x04       ; 4
 2e4:   e8 f6           brcc    .-70            ; 0x2a0 <main+0x24>
                        {
                                PORTD |= (1<<ledgreen);                 
 2e6:   97 9a           sbi     0x12, 7 ; 18
                                SendIRSignal(TRIGGER);
 2e8:   80 e4           ldi     r24, 0x40       ; 64
 2ea:   b1 df           rcall   .-158           ; 0x24e <SendIRSignal>
                                while (ppm_signal < 1350) {}
 2ec:   80 91 66 00     lds     r24, 0x0066
 2f0:   90 91 67 00     lds     r25, 0x0067
 2f4:   86 54           subi    r24, 0x46       ; 70
 2f6:   95 40           sbci    r25, 0x05       ; 5
 2f8:   c8 f3           brcs    .-14            ; 0x2ec <main+0x70>
                                PORTD &= ~(1<<ledgreen);                        
 2fa:   97 98           cbi     0x12, 7 ; 18
 2fc:   d1 cf           rjmp    .-94            ; 0x2a0 <main+0x24>

000002fe <uart_putchar>:

}

int uart_putchar (char c)
{
 2fe:   1f 93           push    r17
 300:   18 2f           mov     r17, r24
        if (c == '\n') uart_putchar('\r');
 302:   8a 30           cpi     r24, 0x0A       ; 10
 304:   11 f4           brne    .+4             ; 0x30a <uart_putchar+0xc>
 306:   8d e0           ldi     r24, 0x0D       ; 13
 308:   fa df           rcall   .-12            ; 0x2fe <uart_putchar>
        loop_until_bit_is_set(UCSRA, UDRE);
 30a:   5d 9b           sbis    0x0b, 5 ; 11
 30c:   fe cf           rjmp    .-4             ; 0x30a <uart_putchar+0xc>
        UDR = c;
 30e:   1c b9           out     0x0c, r17       ; 12
        
        return (0);
}
 310:   80 e0           ldi     r24, 0x00       ; 0
 312:   90 e0           ldi     r25, 0x00       ; 0
 314:   1f 91           pop     r17
 316:   08 95           ret

00000318 <StartUART>:
 318:   59 9a           sbi     0x0b, 1 ; 11
 31a:   88 e1           ldi     r24, 0x18       ; 24
 31c:   8a b9           out     0x0a, r24       ; 10
 31e:   86 e8           ldi     r24, 0x86       ; 134
 320:   80 bd           out     0x20, r24       ; 32
 322:   89 e1           ldi     r24, 0x19       ; 25
 324:   89 b9           out     0x09, r24       ; 9
 326:   60 e0           ldi     r22, 0x00       ; 0
 328:   70 e0           ldi     r23, 0x00       ; 0
 32a:   8f e7           ldi     r24, 0x7F       ; 127
 32c:   91 e0           ldi     r25, 0x01       ; 1
 32e:   01 d0           rcall   .+2             ; 0x332 <fdevopen>
 330:   08 95           ret

00000332 <fdevopen>:
 332:   ef 92           push    r14
 334:   ff 92           push    r15
 336:   0f 93           push    r16
 338:   1f 93           push    r17
 33a:   cf 93           push    r28
 33c:   df 93           push    r29
 33e:   8c 01           movw    r16, r24
 340:   7b 01           movw    r14, r22
 342:   89 2b           or      r24, r25
 344:   11 f4           brne    .+4             ; 0x34a <fdevopen+0x18>
 346:   67 2b           or      r22, r23
 348:   c9 f1           breq    .+114           ; 0x3bc <fdevopen+0x8a>
 34a:   6e e0           ldi     r22, 0x0E       ; 14
 34c:   70 e0           ldi     r23, 0x00       ; 0
 34e:   81 e0           ldi     r24, 0x01       ; 1
 350:   90 e0           ldi     r25, 0x00       ; 0
 352:   3b d0           rcall   .+118           ; 0x3ca <calloc>
 354:   fc 01           movw    r30, r24
 356:   00 97           sbiw    r24, 0x00       ; 0
 358:   89 f1           breq    .+98            ; 0x3bc <fdevopen+0x8a>
 35a:   dc 01           movw    r26, r24
 35c:   80 e8           ldi     r24, 0x80       ; 128
 35e:   83 83           std     Z+3, r24        ; 0x03
 360:   e1 14           cp      r14, r1
 362:   f1 04           cpc     r15, r1
 364:   71 f0           breq    .+28            ; 0x382 <fdevopen+0x50>
 366:   f3 86           std     Z+11, r15       ; 0x0b
 368:   e2 86           std     Z+10, r14       ; 0x0a
 36a:   81 e8           ldi     r24, 0x81       ; 129
 36c:   83 83           std     Z+3, r24        ; 0x03
 36e:   80 91 72 00     lds     r24, 0x0072
 372:   90 91 73 00     lds     r25, 0x0073
 376:   89 2b           or      r24, r25
 378:   21 f4           brne    .+8             ; 0x382 <fdevopen+0x50>
 37a:   f0 93 73 00     sts     0x0073, r31
 37e:   e0 93 72 00     sts     0x0072, r30
 382:   01 15           cp      r16, r1
 384:   11 05           cpc     r17, r1
 386:   e1 f0           breq    .+56            ; 0x3c0 <fdevopen+0x8e>
 388:   11 87           std     Z+9, r17        ; 0x09
 38a:   00 87           std     Z+8, r16        ; 0x08
 38c:   83 81           ldd     r24, Z+3        ; 0x03
 38e:   82 60           ori     r24, 0x02       ; 2
 390:   83 83           std     Z+3, r24        ; 0x03
 392:   80 91 74 00     lds     r24, 0x0074
 396:   90 91 75 00     lds     r25, 0x0075
 39a:   89 2b           or      r24, r25
 39c:   89 f4           brne    .+34            ; 0x3c0 <fdevopen+0x8e>
 39e:   f0 93 75 00     sts     0x0075, r31
 3a2:   e0 93 74 00     sts     0x0074, r30
 3a6:   80 91 76 00     lds     r24, 0x0076
 3aa:   90 91 77 00     lds     r25, 0x0077
 3ae:   89 2b           or      r24, r25
 3b0:   39 f4           brne    .+14            ; 0x3c0 <fdevopen+0x8e>
 3b2:   f0 93 77 00     sts     0x0077, r31
 3b6:   e0 93 76 00     sts     0x0076, r30
 3ba:   02 c0           rjmp    .+4             ; 0x3c0 <fdevopen+0x8e>
 3bc:   a0 e0           ldi     r26, 0x00       ; 0
 3be:   b0 e0           ldi     r27, 0x00       ; 0
 3c0:   cd 01           movw    r24, r26
 3c2:   e6 e0           ldi     r30, 0x06       ; 6
 3c4:   cd b7           in      r28, 0x3d       ; 61
 3c6:   de b7           in      r29, 0x3e       ; 62
 3c8:   26 c1           rjmp    .+588           ; 0x616 <__epilogue_restores__+0x18>

000003ca <calloc>:
 3ca:   0f 93           push    r16
 3cc:   1f 93           push    r17
 3ce:   cf 93           push    r28
 3d0:   df 93           push    r29
 3d2:   86 9f           mul     r24, r22
 3d4:   80 01           movw    r16, r0
 3d6:   87 9f           mul     r24, r23
 3d8:   10 0d           add     r17, r0
 3da:   96 9f           mul     r25, r22
 3dc:   10 0d           add     r17, r0
 3de:   11 24           eor     r1, r1
 3e0:   c8 01           movw    r24, r16
 3e2:   0d d0           rcall   .+26            ; 0x3fe <malloc>
 3e4:   ec 01           movw    r28, r24
 3e6:   00 97           sbiw    r24, 0x00       ; 0
 3e8:   21 f0           breq    .+8             ; 0x3f2 <calloc+0x28>
 3ea:   a8 01           movw    r20, r16
 3ec:   60 e0           ldi     r22, 0x00       ; 0
 3ee:   70 e0           ldi     r23, 0x00       ; 0
 3f0:   ff d0           rcall   .+510           ; 0x5f0 <memset>
 3f2:   ce 01           movw    r24, r28
 3f4:   df 91           pop     r29
 3f6:   cf 91           pop     r28
 3f8:   1f 91           pop     r17
 3fa:   0f 91           pop     r16
 3fc:   08 95           ret

000003fe <malloc>:
 3fe:   cf 93           push    r28
 400:   df 93           push    r29
 402:   ac 01           movw    r20, r24
 404:   02 97           sbiw    r24, 0x02       ; 2
 406:   10 f4           brcc    .+4             ; 0x40c <malloc+0xe>
 408:   42 e0           ldi     r20, 0x02       ; 2
 40a:   50 e0           ldi     r21, 0x00       ; 0
 40c:   a0 91 7a 00     lds     r26, 0x007A
 410:   b0 91 7b 00     lds     r27, 0x007B
 414:   fd 01           movw    r30, r26
 416:   c0 e0           ldi     r28, 0x00       ; 0
 418:   d0 e0           ldi     r29, 0x00       ; 0
 41a:   20 e0           ldi     r18, 0x00       ; 0
 41c:   30 e0           ldi     r19, 0x00       ; 0
 41e:   20 c0           rjmp    .+64            ; 0x460 <__stack+0x1>
 420:   80 81           ld      r24, Z
 422:   91 81           ldd     r25, Z+1        ; 0x01
 424:   84 17           cp      r24, r20
 426:   95 07           cpc     r25, r21
 428:   69 f4           brne    .+26            ; 0x444 <malloc+0x46>
 42a:   82 81           ldd     r24, Z+2        ; 0x02
 42c:   93 81           ldd     r25, Z+3        ; 0x03
 42e:   20 97           sbiw    r28, 0x00       ; 0
 430:   19 f0           breq    .+6             ; 0x438 <malloc+0x3a>
 432:   9b 83           std     Y+3, r25        ; 0x03
 434:   8a 83           std     Y+2, r24        ; 0x02
 436:   04 c0           rjmp    .+8             ; 0x440 <malloc+0x42>
 438:   90 93 7b 00     sts     0x007B, r25
 43c:   80 93 7a 00     sts     0x007A, r24
 440:   cf 01           movw    r24, r30
 442:   32 c0           rjmp    .+100           ; 0x4a8 <__stack+0x49>
 444:   48 17           cp      r20, r24
 446:   59 07           cpc     r21, r25
 448:   38 f4           brcc    .+14            ; 0x458 <malloc+0x5a>
 44a:   21 15           cp      r18, r1
 44c:   31 05           cpc     r19, r1
 44e:   19 f0           breq    .+6             ; 0x456 <malloc+0x58>
 450:   82 17           cp      r24, r18
 452:   93 07           cpc     r25, r19
 454:   08 f4           brcc    .+2             ; 0x458 <malloc+0x5a>
 456:   9c 01           movw    r18, r24
 458:   ef 01           movw    r28, r30
 45a:   02 80           ldd     r0, Z+2 ; 0x02
 45c:   f3 81           ldd     r31, Z+3        ; 0x03
 45e:   e0 2d           mov     r30, r0
 460:   30 97           sbiw    r30, 0x00       ; 0
 462:   f1 f6           brne    .-68            ; 0x420 <malloc+0x22>
 464:   21 15           cp      r18, r1
 466:   31 05           cpc     r19, r1
 468:   89 f1           breq    .+98            ; 0x4cc <__stack+0x6d>
 46a:   c9 01           movw    r24, r18
 46c:   84 1b           sub     r24, r20
 46e:   95 0b           sbc     r25, r21
 470:   04 97           sbiw    r24, 0x04       ; 4
 472:   08 f4           brcc    .+2             ; 0x476 <__stack+0x17>
 474:   a9 01           movw    r20, r18
 476:   e0 e0           ldi     r30, 0x00       ; 0
 478:   f0 e0           ldi     r31, 0x00       ; 0
 47a:   26 c0           rjmp    .+76            ; 0x4c8 <__stack+0x69>
 47c:   8d 91           ld      r24, X+
 47e:   9c 91           ld      r25, X
 480:   11 97           sbiw    r26, 0x01       ; 1
 482:   82 17           cp      r24, r18
 484:   93 07           cpc     r25, r19
 486:   e9 f4           brne    .+58            ; 0x4c2 <__stack+0x63>
 488:   48 17           cp      r20, r24
 48a:   59 07           cpc     r21, r25
 48c:   79 f4           brne    .+30            ; 0x4ac <__stack+0x4d>
 48e:   ed 01           movw    r28, r26
 490:   8a 81           ldd     r24, Y+2        ; 0x02
 492:   9b 81           ldd     r25, Y+3        ; 0x03
 494:   30 97           sbiw    r30, 0x00       ; 0
 496:   19 f0           breq    .+6             ; 0x49e <__stack+0x3f>
 498:   93 83           std     Z+3, r25        ; 0x03
 49a:   82 83           std     Z+2, r24        ; 0x02
 49c:   04 c0           rjmp    .+8             ; 0x4a6 <__stack+0x47>
 49e:   90 93 7b 00     sts     0x007B, r25
 4a2:   80 93 7a 00     sts     0x007A, r24
 4a6:   cd 01           movw    r24, r26
 4a8:   02 96           adiw    r24, 0x02       ; 2
 4aa:   49 c0           rjmp    .+146           ; 0x53e <__stack+0xdf>
 4ac:   84 1b           sub     r24, r20
 4ae:   95 0b           sbc     r25, r21
 4b0:   fd 01           movw    r30, r26
 4b2:   e8 0f           add     r30, r24
 4b4:   f9 1f           adc     r31, r25
 4b6:   41 93           st      Z+, r20
 4b8:   51 93           st      Z+, r21
 4ba:   02 97           sbiw    r24, 0x02       ; 2
 4bc:   8d 93           st      X+, r24
 4be:   9c 93           st      X, r25
 4c0:   3a c0           rjmp    .+116           ; 0x536 <__stack+0xd7>
 4c2:   fd 01           movw    r30, r26
 4c4:   a2 81           ldd     r26, Z+2        ; 0x02
 4c6:   b3 81           ldd     r27, Z+3        ; 0x03
 4c8:   10 97           sbiw    r26, 0x00       ; 0
 4ca:   c1 f6           brne    .-80            ; 0x47c <__stack+0x1d>
 4cc:   80 91 78 00     lds     r24, 0x0078
 4d0:   90 91 79 00     lds     r25, 0x0079
 4d4:   89 2b           or      r24, r25
 4d6:   41 f4           brne    .+16            ; 0x4e8 <__stack+0x89>
 4d8:   80 91 62 00     lds     r24, 0x0062
 4dc:   90 91 63 00     lds     r25, 0x0063
 4e0:   90 93 79 00     sts     0x0079, r25
 4e4:   80 93 78 00     sts     0x0078, r24
 4e8:   20 91 64 00     lds     r18, 0x0064
 4ec:   30 91 65 00     lds     r19, 0x0065
 4f0:   21 15           cp      r18, r1
 4f2:   31 05           cpc     r19, r1
 4f4:   41 f4           brne    .+16            ; 0x506 <__stack+0xa7>
 4f6:   2d b7           in      r18, 0x3d       ; 61
 4f8:   3e b7           in      r19, 0x3e       ; 62
 4fa:   80 91 60 00     lds     r24, 0x0060
 4fe:   90 91 61 00     lds     r25, 0x0061
 502:   28 1b           sub     r18, r24
 504:   39 0b           sbc     r19, r25
 506:   e0 91 78 00     lds     r30, 0x0078
 50a:   f0 91 79 00     lds     r31, 0x0079
 50e:   2e 1b           sub     r18, r30
 510:   3f 0b           sbc     r19, r31
 512:   24 17           cp      r18, r20
 514:   35 07           cpc     r19, r21
 516:   88 f0           brcs    .+34            ; 0x53a <__stack+0xdb>
 518:   ca 01           movw    r24, r20
 51a:   02 96           adiw    r24, 0x02       ; 2
 51c:   28 17           cp      r18, r24
 51e:   39 07           cpc     r19, r25
 520:   60 f0           brcs    .+24            ; 0x53a <__stack+0xdb>
 522:   cf 01           movw    r24, r30
 524:   84 0f           add     r24, r20
 526:   95 1f           adc     r25, r21
 528:   02 96           adiw    r24, 0x02       ; 2
 52a:   90 93 79 00     sts     0x0079, r25
 52e:   80 93 78 00     sts     0x0078, r24
 532:   41 93           st      Z+, r20
 534:   51 93           st      Z+, r21
 536:   cf 01           movw    r24, r30
 538:   02 c0           rjmp    .+4             ; 0x53e <__stack+0xdf>
 53a:   80 e0           ldi     r24, 0x00       ; 0
 53c:   90 e0           ldi     r25, 0x00       ; 0
 53e:   df 91           pop     r29
 540:   cf 91           pop     r28
 542:   08 95           ret

00000544 <free>:
 544:   cf 93           push    r28
 546:   df 93           push    r29
 548:   00 97           sbiw    r24, 0x00       ; 0
 54a:   09 f4           brne    .+2             ; 0x54e <free+0xa>
 54c:   4e c0           rjmp    .+156           ; 0x5ea <free+0xa6>
 54e:   ec 01           movw    r28, r24
 550:   22 97           sbiw    r28, 0x02       ; 2
 552:   1b 82           std     Y+3, r1 ; 0x03
 554:   1a 82           std     Y+2, r1 ; 0x02
 556:   a0 91 7a 00     lds     r26, 0x007A
 55a:   b0 91 7b 00     lds     r27, 0x007B
 55e:   10 97           sbiw    r26, 0x00       ; 0
 560:   11 f1           breq    .+68            ; 0x5a6 <free+0x62>
 562:   40 e0           ldi     r20, 0x00       ; 0
 564:   50 e0           ldi     r21, 0x00       ; 0
 566:   01 c0           rjmp    .+2             ; 0x56a <free+0x26>
 568:   dc 01           movw    r26, r24
 56a:   ac 17           cp      r26, r28
 56c:   bd 07           cpc     r27, r29
 56e:   00 f1           brcs    .+64            ; 0x5b0 <free+0x6c>
 570:   bb 83           std     Y+3, r27        ; 0x03
 572:   aa 83           std     Y+2, r26        ; 0x02
 574:   fe 01           movw    r30, r28
 576:   21 91           ld      r18, Z+
 578:   31 91           ld      r19, Z+
 57a:   e2 0f           add     r30, r18
 57c:   f3 1f           adc     r31, r19
 57e:   ea 17           cp      r30, r26
 580:   fb 07           cpc     r31, r27
 582:   71 f4           brne    .+28            ; 0x5a0 <free+0x5c>
 584:   2e 5f           subi    r18, 0xFE       ; 254
 586:   3f 4f           sbci    r19, 0xFF       ; 255
 588:   8d 91           ld      r24, X+
 58a:   9c 91           ld      r25, X
 58c:   11 97           sbiw    r26, 0x01       ; 1
 58e:   82 0f           add     r24, r18
 590:   93 1f           adc     r25, r19
 592:   99 83           std     Y+1, r25        ; 0x01
 594:   88 83           st      Y, r24
 596:   fd 01           movw    r30, r26
 598:   82 81           ldd     r24, Z+2        ; 0x02
 59a:   93 81           ldd     r25, Z+3        ; 0x03
 59c:   9b 83           std     Y+3, r25        ; 0x03
 59e:   8a 83           std     Y+2, r24        ; 0x02
 5a0:   41 15           cp      r20, r1
 5a2:   51 05           cpc     r21, r1
 5a4:   59 f4           brne    .+22            ; 0x5bc <free+0x78>
 5a6:   d0 93 7b 00     sts     0x007B, r29
 5aa:   c0 93 7a 00     sts     0x007A, r28
 5ae:   1d c0           rjmp    .+58            ; 0x5ea <free+0xa6>
 5b0:   fd 01           movw    r30, r26
 5b2:   82 81           ldd     r24, Z+2        ; 0x02
 5b4:   93 81           ldd     r25, Z+3        ; 0x03
 5b6:   ad 01           movw    r20, r26
 5b8:   00 97           sbiw    r24, 0x00       ; 0
 5ba:   b1 f6           brne    .-84            ; 0x568 <free+0x24>
 5bc:   fa 01           movw    r30, r20
 5be:   d3 83           std     Z+3, r29        ; 0x03
 5c0:   c2 83           std     Z+2, r28        ; 0x02
 5c2:   21 91           ld      r18, Z+
 5c4:   31 91           ld      r19, Z+
 5c6:   e2 0f           add     r30, r18
 5c8:   f3 1f           adc     r31, r19
 5ca:   ec 17           cp      r30, r28
 5cc:   fd 07           cpc     r31, r29
 5ce:   69 f4           brne    .+26            ; 0x5ea <free+0xa6>
 5d0:   2e 5f           subi    r18, 0xFE       ; 254
 5d2:   3f 4f           sbci    r19, 0xFF       ; 255
 5d4:   88 81           ld      r24, Y
 5d6:   99 81           ldd     r25, Y+1        ; 0x01
 5d8:   82 0f           add     r24, r18
 5da:   93 1f           adc     r25, r19
 5dc:   fa 01           movw    r30, r20
 5de:   91 83           std     Z+1, r25        ; 0x01
 5e0:   80 83           st      Z, r24
 5e2:   8a 81           ldd     r24, Y+2        ; 0x02
 5e4:   9b 81           ldd     r25, Y+3        ; 0x03
 5e6:   93 83           std     Z+3, r25        ; 0x03
 5e8:   82 83           std     Z+2, r24        ; 0x02
 5ea:   df 91           pop     r29
 5ec:   cf 91           pop     r28
 5ee:   08 95           ret

000005f0 <memset>:
 5f0:   dc 01           movw    r26, r24
 5f2:   01 c0           rjmp    .+2             ; 0x5f6 <memset+0x6>
 5f4:   6d 93           st      X+, r22
 5f6:   41 50           subi    r20, 0x01       ; 1
 5f8:   50 40           sbci    r21, 0x00       ; 0
 5fa:   e0 f7           brcc    .-8             ; 0x5f4 <memset+0x4>
 5fc:   08 95           ret

000005fe <__epilogue_restores__>:
 5fe:   2a 88           ldd     r2, Y+18        ; 0x12
 600:   39 88           ldd     r3, Y+17        ; 0x11
 602:   48 88           ldd     r4, Y+16        ; 0x10
 604:   5f 84           ldd     r5, Y+15        ; 0x0f
 606:   6e 84           ldd     r6, Y+14        ; 0x0e
 608:   7d 84           ldd     r7, Y+13        ; 0x0d
 60a:   8c 84           ldd     r8, Y+12        ; 0x0c
 60c:   9b 84           ldd     r9, Y+11        ; 0x0b
 60e:   aa 84           ldd     r10, Y+10       ; 0x0a
 610:   b9 84           ldd     r11, Y+9        ; 0x09
 612:   c8 84           ldd     r12, Y+8        ; 0x08
 614:   df 80           ldd     r13, Y+7        ; 0x07
 616:   ee 80           ldd     r14, Y+6        ; 0x06
 618:   fd 80           ldd     r15, Y+5        ; 0x05
 61a:   0c 81           ldd     r16, Y+4        ; 0x04
 61c:   1b 81           ldd     r17, Y+3        ; 0x03
 61e:   aa 81           ldd     r26, Y+2        ; 0x02
 620:   b9 81           ldd     r27, Y+1        ; 0x01
 622:   ce 0f           add     r28, r30
 624:   d1 1d           adc     r29, r1
 626:   0f b6           in      r0, 0x3f        ; 63
 628:   f8 94           cli
 62a:   de bf           out     0x3e, r29       ; 62
 62c:   0f be           out     0x3f, r0        ; 63
 62e:   cd bf           out     0x3d, r28       ; 61
 630:   ed 01           movw    r28, r26
 632:   08 95           ret

00000634 <_exit>:
 634:   ff cf           rjmp    .-2             ; 0x634 <_exit>