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   1                            .file   "uart.c"
   2                    __SREG__ = 0x3f
   3                    __SP_H__ = 0x3e
   4                    __SP_L__ = 0x3d
   5                    __tmp_reg__ = 0
   6                    __zero_reg__ = 1
   7                            .global __do_copy_data
   8                            .global __do_clear_bss
  11                            .text
  12                    .Ltext0:
 100                    .global __vector_13
 102                    __vector_13:
 103                            .stabd  46,0,0
   1:src/uart.c    **** // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
   2:src/uart.c    **** // + Regler für Brushless-Motoren
   3:src/uart.c    **** // + ATMEGA8 mit 8MHz
   4:src/uart.c    **** // + (c) 01.2007 Holger Buss
   5:src/uart.c    **** // + Nur für den privaten Gebrauch
   6:src/uart.c    **** // + Keine Garantie auf Fehlerfreiheit
   7:src/uart.c    **** // + Kommerzielle Nutzung nur mit meiner Zustimmung
   8:src/uart.c    **** // + Der Code ist für die Hardware BL_Ctrl V1.0 entwickelt worden
   9:src/uart.c    **** // + www.mikrocontroller.com
  10:src/uart.c    **** // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  11:src/uart.c    **** 
  12:src/uart.c    **** #include "main.h"
  13:src/uart.c    **** #include "uart.h"
  14:src/uart.c    **** 
  15:src/uart.c    **** #define MAX_SENDE_BUFF     100
  16:src/uart.c    **** #define MAX_EMPFANGS_BUFF  100
  17:src/uart.c    **** 
  18:src/uart.c    **** unsigned volatile char SIO_Sollwert = 0;
  19:src/uart.c    **** unsigned volatile char SioTmp = 0;
  20:src/uart.c    **** unsigned volatile char SendeBuffer[MAX_SENDE_BUFF];
  21:src/uart.c    **** unsigned volatile char RxdBuffer[MAX_EMPFANGS_BUFF];
  22:src/uart.c    **** unsigned volatile char NeuerDatensatzEmpfangen = 0;
  23:src/uart.c    **** unsigned volatile char UebertragungAbgeschlossen = 1;
  24:src/uart.c    **** unsigned char MeineSlaveAdresse;
  25:src/uart.c    **** unsigned char MotorTest[4] = {0,0,0,0};
  26:src/uart.c    **** unsigned volatile char AnzahlEmpfangsBytes = 0;
  27:src/uart.c    **** 
  28:src/uart.c    **** struct str_DebugOut    DebugOut;
  29:src/uart.c    **** 
  30:src/uart.c    **** 
  31:src/uart.c    **** int Debug_Timer;
  32:src/uart.c    **** 
  33:src/uart.c    **** 
  34:src/uart.c    **** SIGNAL(INT_VEC_TX)
  35:src/uart.c    **** {
 105                    .LM0:
 106                    .LFBB1:
 107                    /* prologue: frame size=0 */
 108 0000 1F92                  push __zero_reg__
 109 0002 0F92                  push __tmp_reg__
 110 0004 0FB6                  in __tmp_reg__,__SREG__
 111 0006 0F92                  push __tmp_reg__
 112 0008 1124                  clr __zero_reg__
 113                    /* prologue end (size=5) */
 114                    /* epilogue: frame size=0 */
 115 000a 0F90                  pop __tmp_reg__
 116 000c 0FBE                  out __SREG__,__tmp_reg__
 117 000e 0F90                  pop __tmp_reg__
 118 0010 1F90                  pop __zero_reg__
 119 0012 1895                  reti
 120                    /* epilogue end (size=5) */
 121                    /* function __vector_13 size 10 (0) */
 123                    .Lscope1:
 125                            .stabd  78,0,0
 127                    .global SendUart
 129                    SendUart:
 130                            .stabd  46,0,0
  36:src/uart.c    **** }
  37:src/uart.c    **** 
  38:src/uart.c    **** void SendUart(void)
  39:src/uart.c    **** {
 132                    .LM1:
 133                    .LFBB2:
 134                    /* prologue: frame size=0 */
 135                    /* prologue end (size=0) */
  40:src/uart.c    ****  static unsigned int ptr = 0;
  41:src/uart.c    ****  unsigned char tmp_tx;
  42:src/uart.c    ****  if(!(UCSRA & 0x40)) return;
 137                    .LM2:
 138 0014 5E9B                  sbis 43-0x20,6
 139 0016 00C0                  rjmp .L11
  43:src/uart.c    ****  if(!UebertragungAbgeschlossen)  
 141                    .LM3:
 142 0018 8091 0000             lds r24,UebertragungAbgeschlossen
 143 001c 8823                  tst r24
 144 001e 01F4                  brne .L6
  44:src/uart.c    ****   {
  45:src/uart.c    ****    ptr++;                    // die [0] wurde schon gesendet
 146                    .LM4:
 147 0020 8091 0000             lds r24,ptr.2069
 148 0024 9091 0000             lds r25,(ptr.2069)+1
 149 0028 0196                  adiw r24,1
 150 002a 9093 0000             sts (ptr.2069)+1,r25
 151 002e 8093 0000             sts ptr.2069,r24
  46:src/uart.c    ****    tmp_tx = SendeBuffer[ptr];  
 153                    .LM5:
 154 0032 FC01                  movw r30,r24
 155 0034 E050                  subi r30,lo8(-(SendeBuffer))
 156 0036 F040                  sbci r31,hi8(-(SendeBuffer))
 157 0038 E081                  ld r30,Z
  47:src/uart.c    ****    if((tmp_tx == '\r') || (ptr == MAX_SENDE_BUFF))
 159                    .LM6:
 160 003a ED30                  cpi r30,lo8(13)
 161 003c 01F0                  breq .L8
 162 003e 8436                  cpi r24,100
 163 0040 9105                  cpc r25,__zero_reg__
 164 0042 01F4                  brne .L10
 165                    .L8:
  48:src/uart.c    ****     {
  49:src/uart.c    ****      ptr = 0;
 167                    .LM7:
 168 0044 1092 0000             sts (ptr.2069)+1,__zero_reg__
 169 0048 1092 0000             sts ptr.2069,__zero_reg__
  50:src/uart.c    ****      UebertragungAbgeschlossen = 1;
 171                    .LM8:
 172 004c 81E0                  ldi r24,lo8(1)
 173 004e 8093 0000             sts UebertragungAbgeschlossen,r24
 174                    .L10:
  51:src/uart.c    ****     }
  52:src/uart.c    ****    USR |= (1<TXC);
 176                    .LM9:
 177 0052 589A                  sbi 43-0x20,0
  53:src/uart.c    ****    UDR = tmp_tx; 
 179                    .LM10:
 180 0054 ECB9                  out 44-0x20,r30
 181 0056 0895                  ret
 182                    .L6:
  54:src/uart.c    ****   } 
  55:src/uart.c    ****   else ptr = 0;
 184                    .LM11:
 185 0058 1092 0000             sts (ptr.2069)+1,__zero_reg__
 186 005c 1092 0000             sts ptr.2069,__zero_reg__
 187                    .L11:
 188 0060 0895                  ret
 189                    /* epilogue: frame size=0 */
 190                    /* epilogue: noreturn */
 191                    /* epilogue end (size=0) */
 192                    /* function SendUart size 39 (39) */
 198                    .Lscope2:
 200                            .stabd  78,0,0
 206                    .global Decode64
 208                    Decode64:
 209                            .stabd  46,0,0
  56:src/uart.c    **** }
  57:src/uart.c    **** 
  58:src/uart.c    **** // --------------------------------------------------------------------------
  59:src/uart.c    **** void Decode64(unsigned char *ptrOut, unsigned char len, unsigned char ptrIn,unsigned char max)  // 
  60:src/uart.c    **** {
 211                    .LM12:
 212                    .LFBB3:
 213                    /* prologue: frame size=0 */
 214 0062 1F93                  push r17
 215 0064 CF93                  push r28
 216 0066 DF93                  push r29
 217                    /* prologue end (size=3) */
 218 0068 EC01                  movw r28,r24
 219 006a 70E0                  ldi r23,lo8(0)
  61:src/uart.c    ****  unsigned char a,b,c,d;
  62:src/uart.c    ****  unsigned char ptr = 0;
  63:src/uart.c    ****  unsigned char x,y,z;
  64:src/uart.c    ****  while(len)
  65:src/uart.c    ****   {
  66:src/uart.c    ****    a = RxdBuffer[ptrIn++] - '=';
  67:src/uart.c    ****    b = RxdBuffer[ptrIn++] - '=';
  68:src/uart.c    ****    c = RxdBuffer[ptrIn++] - '=';
  69:src/uart.c    ****    d = RxdBuffer[ptrIn++] - '=';
  70:src/uart.c    ****    if(ptrIn > max - 2) break;     // nicht mehr Daten verarbeiten, als empfangen wurden
 221                    .LM13:
 222 006c A22F                  mov r26,r18
 223 006e BB27                  clr r27
 224 0070 1297                  sbiw r26,2
 225 0072 00C0                  rjmp .L13
 226                    .L14:
 228                    .LM14:
 229 0074 E42F                  mov r30,r20
 230 0076 FF27                  clr r31
 231 0078 E050                  subi r30,lo8(-(RxdBuffer))
 232 007a F040                  sbci r31,hi8(-(RxdBuffer))
 233 007c 3081                  ld r19,Z
 235                    .LM15:
 236 007e 4F5F                  subi r20,lo8(-(1))
 237 0080 E42F                  mov r30,r20
 238 0082 FF27                  clr r31
 239 0084 E050                  subi r30,lo8(-(RxdBuffer))
 240 0086 F040                  sbci r31,hi8(-(RxdBuffer))
 241 0088 5081                  ld r21,Z
 243                    .LM16:
 244 008a 4F5F                  subi r20,lo8(-(1))
 245 008c E42F                  mov r30,r20
 246 008e FF27                  clr r31
 247 0090 E050                  subi r30,lo8(-(RxdBuffer))
 248 0092 F040                  sbci r31,hi8(-(RxdBuffer))
 249 0094 1081                  ld r17,Z
 251                    .LM17:
 252 0096 4F5F                  subi r20,lo8(-(1))
 253 0098 E42F                  mov r30,r20
 254 009a FF27                  clr r31
 255 009c E050                  subi r30,lo8(-(RxdBuffer))
 256 009e F040                  sbci r31,hi8(-(RxdBuffer))
 257 00a0 2081                  ld r18,Z
 258 00a2 4F5F                  subi r20,lo8(-(1))
 260                    .LM18:
 261 00a4 842F                  mov r24,r20
 262 00a6 9927                  clr r25
 263 00a8 A817                  cp r26,r24
 264 00aa B907                  cpc r27,r25
 265 00ac 04F0                  brlt .L19
 267                    .LM19:
 268 00ae 5D53                  subi r21,lo8(-(-61))
  71:src/uart.c    **** 
  72:src/uart.c    ****    x = (a << 2) | (b >> 4);
  73:src/uart.c    ****    y = ((b & 0x0f) << 4) | (c >> 2);
  74:src/uart.c    ****    z = ((c & 0x03) << 6) | d;
  75:src/uart.c    **** 
  76:src/uart.c    ****    if(len--) ptrOut[ptr++] = x; else break;
 270                    .LM20:
 271 00b0 FE01                  movw r30,r28
 272 00b2 E70F                  add r30,r23
 273 00b4 F11D                  adc r31,__zero_reg__
 274 00b6 852F                  mov r24,r21
 275 00b8 8295                  swap r24
 276 00ba 8F70                  andi r24,0x0f
 277 00bc 3D53                  subi r19,lo8(-(-61))
 278 00be 330F                  lsl r19
 279 00c0 330F                  lsl r19
 280 00c2 382B                  or r19,r24
 281 00c4 3083                  st Z,r19
  77:src/uart.c    ****    if(len--) ptrOut[ptr++] = y; else break;
 283                    .LM21:
 284 00c6 6130                  cpi r22,lo8(1)
 285 00c8 01F0                  breq .L19
 287                    .LM22:
 288 00ca 912F                  mov r25,r17
 289 00cc 9D53                  subi r25,lo8(-(-61))
 291                    .LM23:
 292 00ce 7F5F                  subi r23,lo8(-(1))
 293 00d0 FE01                  movw r30,r28
 294 00d2 E70F                  add r30,r23
 295 00d4 F11D                  adc r31,__zero_reg__
 296 00d6 7150                  subi r23,lo8(-(-1))
 297 00d8 5295                  swap r21
 298 00da 507F                  andi r21,0xf0
 299 00dc 892F                  mov r24,r25
 300 00de 8695                  lsr r24
 301 00e0 8695                  lsr r24
 302 00e2 582B                  or r21,r24
 303 00e4 5083                  st Z,r21
 304 00e6 6350                  subi r22,lo8(-(-3))
  78:src/uart.c    ****    if(len--) ptrOut[ptr++] = z; else break;
 306                    .LM24:
 307 00e8 6F3F                  cpi r22,lo8(-1)
 308 00ea 01F0                  breq .L19
 309 00ec 7E5F                  subi r23,lo8(-(2))
 310 00ee FE01                  movw r30,r28
 311 00f0 E70F                  add r30,r23
 312 00f2 F11D                  adc r31,__zero_reg__
 313 00f4 9295                  swap r25
 314 00f6 990F                  lsl r25
 315 00f8 990F                  lsl r25
 316 00fa 907C                  andi r25,0xc0
 317 00fc 2D53                  subi r18,lo8(-(-61))
 318 00fe 922B                  or r25,r18
 319 0100 9083                  st Z,r25
 320 0102 7F5F                  subi r23,lo8(-(1))
 321                    .L13:
 323                    .LM25:
 324 0104 6623                  tst r22
 325 0106 01F0                  breq .+2
 326 0108 00C0                  rjmp .L14
 327                    .L19:
 328                    /* epilogue: frame size=0 */
 329 010a DF91                  pop r29
 330 010c CF91                  pop r28
 331 010e 1F91                  pop r17
 332 0110 0895                  ret
 333                    /* epilogue end (size=4) */
 334                    /* function Decode64 size 88 (81) */
 341                    .Lscope3:
 343                            .stabd  78,0,0
 346                    .global AddCRC
 348                    AddCRC:
 349                            .stabd  46,0,0
  79:src/uart.c    ****   }
  80:src/uart.c    **** 
  81:src/uart.c    **** }
  82:src/uart.c    **** 
  83:src/uart.c    **** 
  84:src/uart.c    **** //+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  85:src/uart.c    **** //++ Empfangs-Part der Datenübertragung
  86:src/uart.c    **** //+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  87:src/uart.c    **** SIGNAL(INT_VEC_RX)
  88:src/uart.c    **** {
  89:src/uart.c    ****  
  90:src/uart.c    **** #if  X3D_SIO == 1
  91:src/uart.c    ****  static unsigned char serPacketCounter = 100;
  92:src/uart.c    ****     SioTmp = UDR;
  93:src/uart.c    ****         if(SioTmp == 0xF5)     // Startzeichen
  94:src/uart.c    ****          {
  95:src/uart.c    ****           serPacketCounter = 0;
  96:src/uart.c    ****          }
  97:src/uart.c    ****         else 
  98:src/uart.c    ****          {
  99:src/uart.c    ****           if(++serPacketCounter == MotorAdresse) // (1-4)
 100:src/uart.c    ****           {
 101:src/uart.c    ****                 SIO_Sollwert = SioTmp;
 102:src/uart.c    ****             SIO_Timeout = 200; // werte für 200ms gültig
 103:src/uart.c    ****           }
 104:src/uart.c    ****           else
 105:src/uart.c    ****           { 
 106:src/uart.c    ****            if(serPacketCounter > 100) serPacketCounter = 100;
 107:src/uart.c    ****                   }
 108:src/uart.c    ****          }
 109:src/uart.c    **** #else
 110:src/uart.c    ****  static unsigned int crc;
 111:src/uart.c    ****  static unsigned char crc1,crc2,buf_ptr;
 112:src/uart.c    ****  static unsigned char UartState = 0;
 113:src/uart.c    ****  unsigned char CrcOkay = 0;
 114:src/uart.c    ****  
 115:src/uart.c    ****  SioTmp = UDR;
 116:src/uart.c    ****  if(buf_ptr >= MAX_EMPFANGS_BUFF)    UartState = 0;
 117:src/uart.c    ****  if(SioTmp == '\r' && UartState == 2) 
 118:src/uart.c    ****   {
 119:src/uart.c    ****    UartState = 0;
 120:src/uart.c    ****    crc -= RxdBuffer[buf_ptr-2];
 121:src/uart.c    ****    crc -= RxdBuffer[buf_ptr-1];
 122:src/uart.c    ****    crc %= 4096;
 123:src/uart.c    ****    crc1 = '=' + crc / 64;
 124:src/uart.c    ****    crc2 = '=' + crc % 64;
 125:src/uart.c    ****    CrcOkay = 0;
 126:src/uart.c    ****    if((crc1 == RxdBuffer[buf_ptr-2]) && (crc2 == RxdBuffer[buf_ptr-1])) CrcOkay = 1; else { CrcOkay
 127:src/uart.c    ****    if(CrcOkay) // Datensatz schon verarbeitet
 128:src/uart.c    ****     {
 129:src/uart.c    ****      //NeuerDatensatzEmpfangen = 1; 
 130:src/uart.c    ****          AnzahlEmpfangsBytes = buf_ptr;
 131:src/uart.c    ****      
 132:src/uart.c    ****      RxdBuffer[buf_ptr] = '\r';
 133:src/uart.c    ****          if(/*(RxdBuffer[1] == MeineSlaveAdresse || (RxdBuffer[1] == 'a')) && */(RxdBuffer[2] == 'R')) wdt
 134:src/uart.c    ****      uart_putchar(RxdBuffer[2]);         
 135:src/uart.c    ****          if (RxdBuffer[2] == 't') // Motortest
 136:src/uart.c    ****             { Decode64((unsigned char *) &MotorTest[0],sizeof(MotorTest),3,AnzahlEmpfangsBytes);
 137:src/uart.c    ****                           SIO_Sollwert = MotorTest[MotorAdresse - 1];
 138:src/uart.c    ****               SIO_Timeout = 500; // werte für 500ms gültig
 139:src/uart.c    ****  
 140:src/uart.c    ****                         }
 141:src/uart.c    ****         }                                 
 142:src/uart.c    ****   }
 143:src/uart.c    ****   else
 144:src/uart.c    ****   switch(UartState)
 145:src/uart.c    ****   {
 146:src/uart.c    ****    case 0:
 147:src/uart.c    ****           if(SioTmp == '#' && !NeuerDatensatzEmpfangen) UartState = 1;  // Startzeichen und Daten s
 148:src/uart.c    ****                   buf_ptr = 0;
 149:src/uart.c    ****                   RxdBuffer[buf_ptr++] = SioTmp;
 150:src/uart.c    ****                   crc = SioTmp;
 151:src/uart.c    ****           break;
 152:src/uart.c    ****    case 1: // Adresse auswerten
 153:src/uart.c    ****                   UartState++;
 154:src/uart.c    ****                   RxdBuffer[buf_ptr++] = SioTmp;
 155:src/uart.c    ****                   crc += SioTmp;
 156:src/uart.c    ****                   break;
 157:src/uart.c    ****    case 2: //  Eingangsdaten sammeln
 158:src/uart.c    ****                   RxdBuffer[buf_ptr] = SioTmp;
 159:src/uart.c    ****                   if(buf_ptr < MAX_EMPFANGS_BUFF) buf_ptr++; 
 160:src/uart.c    ****                   else UartState = 0;
 161:src/uart.c    ****                   crc += SioTmp;
 162:src/uart.c    ****                   break;
 163:src/uart.c    ****    default: 
 164:src/uart.c    ****           UartState = 0; 
 165:src/uart.c    ****           break;
 166:src/uart.c    ****   }
 167:src/uart.c    **** 
 168:src/uart.c    ****          
 169:src/uart.c    **** #endif
 170:src/uart.c    **** };
 171:src/uart.c    **** 
 172:src/uart.c    **** 
 173:src/uart.c    **** // --------------------------------------------------------------------------
 174:src/uart.c    **** void AddCRC(unsigned int wieviele)
 175:src/uart.c    **** {
 351                    .LM26:
 352                    .LFBB4:
 353                    /* prologue: frame size=0 */
 354                    /* prologue end (size=0) */
 355 0112 DC01                  movw r26,r24
 356 0114 20E0                  ldi r18,lo8(0)
 357 0116 30E0                  ldi r19,hi8(0)
 358 0118 40E0                  ldi r20,lo8(0)
 359 011a 50E0                  ldi r21,hi8(0)
 360 011c 00C0                  rjmp .L21
 361                    .L22:
 176:src/uart.c    ****  unsigned int tmpCRC = 0,i; 
 177:src/uart.c    ****  for(i = 0; i < wieviele;i++)
 178:src/uart.c    ****   {
 179:src/uart.c    ****    tmpCRC += SendeBuffer[i];
 363                    .LM27:
 364 011e FA01                  movw r30,r20
 365 0120 E050                  subi r30,lo8(-(SendeBuffer))
 366 0122 F040                  sbci r31,hi8(-(SendeBuffer))
 367 0124 8081                  ld r24,Z
 368 0126 280F                  add r18,r24
 369 0128 311D                  adc r19,__zero_reg__
 371                    .LM28:
 372 012a 4F5F                  subi r20,lo8(-(1))
 373 012c 5F4F                  sbci r21,hi8(-(1))
 374                    .L21:
 375 012e 4A17                  cp r20,r26
 376 0130 5B07                  cpc r21,r27
 377 0132 01F4                  brne .L22
 180:src/uart.c    ****   }
 181:src/uart.c    ****    tmpCRC %= 4096;
 379                    .LM29:
 380 0134 3F70                  andi r19,hi8(4095)
 182:src/uart.c    ****    SendeBuffer[i++] = '=' + tmpCRC / 64;
 382                    .LM30:
 383 0136 C901                  movw r24,r18
 384 0138 36E0                  ldi r19,6
 385 013a 9695          1:      lsr r25
 386 013c 8795                  ror r24
 387 013e 3A95                  dec r19
 388 0140 01F4                  brne 1b
 389 0142 835C                  subi r24,lo8(-(61))
 390 0144 FD01                  movw r30,r26
 391 0146 E050                  subi r30,lo8(-(SendeBuffer))
 392 0148 F040                  sbci r31,hi8(-(SendeBuffer))
 393 014a 8083                  st Z,r24
 394 014c 1196                  adiw r26,1
 183:src/uart.c    ****    SendeBuffer[i++] = '=' + tmpCRC % 64;
 396                    .LM31:
 397 014e 2F73                  andi r18,lo8(63)
 398 0150 235C                  subi r18,lo8(-(61))
 399 0152 FD01                  movw r30,r26
 400 0154 E050                  subi r30,lo8(-(SendeBuffer))
 401 0156 F040                  sbci r31,hi8(-(SendeBuffer))
 402 0158 2083                  st Z,r18
 184:src/uart.c    ****    SendeBuffer[i++] = '\r';
 404                    .LM32:
 405 015a A050                  subi r26,lo8(-(SendeBuffer+1))
 406 015c B040                  sbci r27,hi8(-(SendeBuffer+1))
 407 015e 8DE0                  ldi r24,lo8(13)
 408 0160 8C93                  st X,r24
 185:src/uart.c    ****   UebertragungAbgeschlossen = 0;
 410                    .LM33:
 411 0162 1092 0000             sts UebertragungAbgeschlossen,__zero_reg__
 186:src/uart.c    ****   UDR = SendeBuffer[0];
 413                    .LM34:
 414 0166 8091 0000             lds r24,SendeBuffer
 415 016a 8CB9                  out 44-0x20,r24
 416                    /* epilogue: frame size=0 */
 417 016c 0895                  ret
 418                    /* epilogue end (size=1) */
 419                    /* function AddCRC size 47 (46) */
 425                    .Lscope4:
 427                            .stabd  78,0,0
 433                    .global SendOutData
 435                    SendOutData:
 436                            .stabd  46,0,0
 187:src/uart.c    **** }
 188:src/uart.c    **** 
 189:src/uart.c    **** 
 190:src/uart.c    **** // --------------------------------------------------------------------------
 191:src/uart.c    **** void SendOutData(unsigned char cmd,unsigned char modul, unsigned char *snd, unsigned char len)
 192:src/uart.c    **** {
 438                    .LM35:
 439                    .LFBB5:
 440                    /* prologue: frame size=0 */
 441 016e 1F93                  push r17
 442 0170 CF93                  push r28
 443 0172 DF93                  push r29
 444                    /* prologue end (size=3) */
 445 0174 EA01                  movw r28,r20
 446 0176 722F                  mov r23,r18
 193:src/uart.c    ****  unsigned int pt = 0;
 194:src/uart.c    ****  unsigned char a,b,c;
 195:src/uart.c    ****  unsigned char ptr = 0;
 196:src/uart.c    ****  
 197:src/uart.c    **** 
 198:src/uart.c    ****  SendeBuffer[pt++] = '#';               // Startzeichen
 448                    .LM36:
 449 0178 93E2                  ldi r25,lo8(35)
 450 017a 9093 0000             sts SendeBuffer,r25
 199:src/uart.c    ****  SendeBuffer[pt++] = modul;             // Adresse (a=0; b=1,...)
 452                    .LM37:
 453 017e 6093 0000             sts SendeBuffer+1,r22
 200:src/uart.c    ****  SendeBuffer[pt++] = cmd;                       // Commando
 455                    .LM38:
 456 0182 8093 0000             sts SendeBuffer+2,r24
 457 0186 A3E0                  ldi r26,lo8(3)
 458 0188 B0E0                  ldi r27,hi8(3)
 459 018a 60E0                  ldi r22,lo8(0)
 460 018c 00C0                  rjmp .L26
 461                    .L27:
 201:src/uart.c    **** 
 202:src/uart.c    ****  while(len)
 203:src/uart.c    ****   {
 204:src/uart.c    ****    if(len) { a = snd[ptr++]; len--;} else a = 0;
 463                    .LM39:
 464 018e FE01                  movw r30,r28
 465 0190 E60F                  add r30,r22
 466 0192 F11D                  adc r31,__zero_reg__
 467 0194 9081                  ld r25,Z
 468 0196 6F5F                  subi r22,lo8(-(1))
 469 0198 7150                  subi r23,lo8(-(-1))
 205:src/uart.c    ****    if(len) { b = snd[ptr++]; len--;} else b = 0;
 471                    .LM40:
 472 019a 01F4                  brne .L28
 473 019c 10E0                  ldi r17,lo8(0)
 474 019e 40E0                  ldi r20,lo8(0)
 475 01a0 00C0                  rjmp .L30
 476                    .L28:
 477 01a2 FE01                  movw r30,r28
 478 01a4 E60F                  add r30,r22
 479 01a6 F11D                  adc r31,__zero_reg__
 480 01a8 4081                  ld r20,Z
 481 01aa 6F5F                  subi r22,lo8(-(1))
 482 01ac 7150                  subi r23,lo8(-(-1))
 206:src/uart.c    ****    if(len) { c = snd[ptr++]; len--;} else c = 0;
 484                    .LM41:
 485 01ae 01F4                  brne .L31
 486 01b0 10E0                  ldi r17,lo8(0)
 487 01b2 00C0                  rjmp .L30
 488                    .L31:
 489 01b4 FE01                  movw r30,r28
 490 01b6 E60F                  add r30,r22
 491 01b8 F11D                  adc r31,__zero_reg__
 492 01ba 1081                  ld r17,Z
 493 01bc 6F5F                  subi r22,lo8(-(1))
 494 01be 7150                  subi r23,lo8(-(-1))
 495                    .L30:
 207:src/uart.c    ****    SendeBuffer[pt++] = '=' + (a >> 2);
 497                    .LM42:
 498 01c0 892F                  mov r24,r25
 499 01c2 8695                  lsr r24
 500 01c4 8695                  lsr r24
 501 01c6 835C                  subi r24,lo8(-(61))
 502 01c8 FD01                  movw r30,r26
 503 01ca E050                  subi r30,lo8(-(SendeBuffer))
 504 01cc F040                  sbci r31,hi8(-(SendeBuffer))
 505 01ce 8083                  st Z,r24
 208:src/uart.c    ****    SendeBuffer[pt++] = '=' + (((a & 0x03) << 4) | ((b & 0xf0) >> 4));
 507                    .LM43:
 508 01d0 5527                  clr r21
 509 01d2 9A01                  movw r18,r20
 510 01d4 84E0                  ldi r24,4
 511 01d6 3695          1:      lsr r19
 512 01d8 2795                  ror r18
 513 01da 8A95                  dec r24
 514 01dc 01F4                  brne 1b
 515 01de 892F                  mov r24,r25
 516 01e0 9927                  clr r25
 517 01e2 8370                  andi r24,lo8(3)
 518 01e4 9070                  andi r25,hi8(3)
 519 01e6 F4E0                  ldi r31,4
 520 01e8 880F          1:      lsl r24
 521 01ea 991F                  rol r25
 522 01ec FA95                  dec r31
 523 01ee 01F4                  brne 1b
 524 01f0 282B                  or r18,r24
 525 01f2 235C                  subi r18,lo8(-(61))
 526 01f4 FD01                  movw r30,r26
 527 01f6 E050                  subi r30,lo8(-(SendeBuffer+1))
 528 01f8 F040                  sbci r31,hi8(-(SendeBuffer+1))
 529 01fa 2083                  st Z,r18
 209:src/uart.c    ****    SendeBuffer[pt++] = '=' + (((b & 0x0f) << 2) | ((c & 0xc0) >> 6));
 531                    .LM44:
 532 01fc 812F                  mov r24,r17
 533 01fe 8295                  swap r24
 534 0200 8695                  lsr r24
 535 0202 8695                  lsr r24
 536 0204 8370                  andi r24,0x3
 537 0206 4F70                  andi r20,lo8(15)
 538 0208 5070                  andi r21,hi8(15)
 539 020a 440F                  lsl r20
 540 020c 551F                  rol r21
 541 020e 440F                  lsl r20
 542 0210 551F                  rol r21
 543 0212 842B                  or r24,r20
 544 0214 835C                  subi r24,lo8(-(61))
 545 0216 FD01                  movw r30,r26
 546 0218 E050                  subi r30,lo8(-(SendeBuffer+2))
 547 021a F040                  sbci r31,hi8(-(SendeBuffer+2))
 548 021c 8083                  st Z,r24
 210:src/uart.c    ****    SendeBuffer[pt++] = '=' + ( c & 0x3f);
 550                    .LM45:
 551 021e 1F73                  andi r17,lo8(63)
 552 0220 135C                  subi r17,lo8(-(61))
 553 0222 FD01                  movw r30,r26
 554 0224 E050                  subi r30,lo8(-(SendeBuffer+3))
 555 0226 F040                  sbci r31,hi8(-(SendeBuffer+3))
 556 0228 1083                  st Z,r17
 557 022a 1496                  adiw r26,4
 558                    .L26:
 560                    .LM46:
 561 022c 7723                  tst r23
 562 022e 01F0                  breq .+2
 563 0230 00C0                  rjmp .L27
 211:src/uart.c    ****   }
 212:src/uart.c    ****  AddCRC(pt);
 565                    .LM47:
 566 0232 CD01                  movw r24,r26
 567 0234 00D0                  rcall AddCRC
 568                    /* epilogue: frame size=0 */
 569 0236 DF91                  pop r29
 570 0238 CF91                  pop r28
 571 023a 1F91                  pop r17
 572 023c 0895                  ret
 573                    /* epilogue end (size=4) */
 574                    /* function SendOutData size 106 (99) */
 583                    .Lscope5:
 585                            .stabd  78,0,0
 588                    .global uart_putchar
 590                    uart_putchar:
 591                            .stabd  46,0,0
 213:src/uart.c    **** }
 214:src/uart.c    **** 
 215:src/uart.c    **** 
 216:src/uart.c    **** 
 217:src/uart.c    **** //############################################################################
 218:src/uart.c    **** //Routine für die Serielle Ausgabe
 219:src/uart.c    **** int uart_putchar (char c)
 220:src/uart.c    **** //############################################################################
 221:src/uart.c    **** {
 593                    .LM48:
 594                    .LFBB6:
 595                    /* prologue: frame size=0 */
 596 023e 1F93                  push r17
 597                    /* prologue end (size=1) */
 598 0240 182F                  mov r17,r24
 222:src/uart.c    ****         if (c == '\n')
 600                    .LM49:
 601 0242 8A30                  cpi r24,lo8(10)
 602 0244 01F4                  brne .L40
 223:src/uart.c    ****                 uart_putchar('\r');
 604                    .LM50:
 605 0246 8DE0                  ldi r24,lo8(13)
 606 0248 00D0                  rcall uart_putchar
 607                    .L40:
 224:src/uart.c    ****         //Warten solange bis Zeichen gesendet wurde
 225:src/uart.c    ****         loop_until_bit_is_set(USR, UDRE);
 609                    .LM51:
 610 024a 5D9B                  sbis 43-0x20,5
 611 024c 00C0                  rjmp .L40
 226:src/uart.c    ****         //Ausgabe des Zeichens
 227:src/uart.c    ****         UDR = c;
 613                    .LM52:
 614 024e 1CB9                  out 44-0x20,r17
 228:src/uart.c    ****         
 229:src/uart.c    ****         return (0);
 230:src/uart.c    **** }
 616                    .LM53:
 617 0250 80E0                  ldi r24,lo8(0)
 618 0252 90E0                  ldi r25,hi8(0)
 619                    /* epilogue: frame size=0 */
 620 0254 1F91                  pop r17
 621 0256 0895                  ret
 622                    /* epilogue end (size=2) */
 623                    /* function uart_putchar size 13 (10) */
 625                    .Lscope6:
 627                            .stabd  78,0,0
 629                    .global __vector_11
 631                    __vector_11:
 632                            .stabd  46,0,0
 634                    .LM54:
 635                    .LFBB7:
 636                    /* prologue: frame size=0 */
 637 0258 1F92                  push __zero_reg__
 638 025a 0F92                  push __tmp_reg__
 639 025c 0FB6                  in __tmp_reg__,__SREG__
 640 025e 0F92                  push __tmp_reg__
 641 0260 1124                  clr __zero_reg__
 642 0262 2F93                  push r18
 643 0264 3F93                  push r19
 644 0266 4F93                  push r20
 645 0268 5F93                  push r21
 646 026a 6F93                  push r22
 647 026c 7F93                  push r23
 648 026e 8F93                  push r24
 649 0270 9F93                  push r25
 650 0272 AF93                  push r26
 651 0274 BF93                  push r27
 652 0276 CF93                  push r28
 653 0278 DF93                  push r29
 654 027a EF93                  push r30
 655 027c FF93                  push r31
 656                    /* prologue end (size=19) */
 658                    .LM55:
 659 027e 8CB1                  in r24,44-0x20
 660 0280 8093 0000             sts SioTmp,r24
 662                    .LM56:
 663 0284 4091 0000             lds r20,buf_ptr.2137
 664 0288 4436                  cpi r20,lo8(100)
 665 028a 00F0                  brlo .L44
 667                    .LM57:
 668 028c 1092 0000             sts UartState.2138,__zero_reg__
 669                    .L44:
 671                    .LM58:
 672 0290 5091 0000             lds r21,SioTmp
 673 0294 5D30                  cpi r21,lo8(13)
 674 0296 01F0                  breq .+2
 675 0298 00C0                  rjmp .L46
 676 029a 8091 0000             lds r24,UartState.2138
 677 029e 8230                  cpi r24,lo8(2)
 678 02a0 01F0                  breq .+2
 679 02a2 00C0                  rjmp .L46
 681                    .LM59:
 682 02a4 1092 0000             sts UartState.2138,__zero_reg__
 684                    .LM60:
 685 02a8 A42F                  mov r26,r20
 686 02aa BB27                  clr r27
 687 02ac FD01                  movw r30,r26
 688 02ae E050                  subi r30,lo8(-(RxdBuffer-2))
 689 02b0 F040                  sbci r31,hi8(-(RxdBuffer-2))
 690 02b2 3081                  ld r19,Z
 692                    .LM61:
 693 02b4 ED01                  movw r28,r26
 694 02b6 C050                  subi r28,lo8(-(RxdBuffer-1))
 695 02b8 D040                  sbci r29,hi8(-(RxdBuffer-1))
 696 02ba 2881                  ld r18,Y
 698                    .LM62:
 699 02bc 8091 0000             lds r24,crc.2134
 700 02c0 9091 0000             lds r25,(crc.2134)+1
 701 02c4 831B                  sub r24,r19
 702 02c6 9109                  sbc r25,__zero_reg__
 703 02c8 821B                  sub r24,r18
 704 02ca 9109                  sbc r25,__zero_reg__
 705 02cc 9F70                  andi r25,hi8(4095)
 706 02ce 9093 0000             sts (crc.2134)+1,r25
 707 02d2 8093 0000             sts crc.2134,r24
 709                    .LM63:
 710 02d6 9C01                  movw r18,r24
 711 02d8 96E0                  ldi r25,6
 712 02da 3695          1:      lsr r19
 713 02dc 2795                  ror r18
 714 02de 9A95                  dec r25
 715 02e0 01F4                  brne 1b
 716 02e2 235C                  subi r18,lo8(-(61))
 717 02e4 2093 0000             sts crc1.2135,r18
 719                    .LM64:
 720 02e8 982F                  mov r25,r24
 721 02ea 9F73                  andi r25,lo8(63)
 722 02ec 935C                  subi r25,lo8(-(61))
 723 02ee 9093 0000             sts crc2.2136,r25
 725                    .LM65:
 726 02f2 8081                  ld r24,Z
 727 02f4 2817                  cp r18,r24
 728 02f6 01F0                  breq .+2
 729 02f8 00C0                  rjmp .L65
 730 02fa 8881                  ld r24,Y
 731 02fc 9817                  cp r25,r24
 732 02fe 01F0                  breq .+2
 733 0300 00C0                  rjmp .L65
 735                    .LM66:
 736 0302 4093 0000             sts AnzahlEmpfangsBytes,r20
 738                    .LM67:
 739 0306 A050                  subi r26,lo8(-(RxdBuffer))
 740 0308 B040                  sbci r27,hi8(-(RxdBuffer))
 741 030a 5C93                  st X,r21
 743                    .LM68:
 744 030c 8091 0000             lds r24,RxdBuffer+2
 745 0310 8235                  cpi r24,lo8(82)
 746 0312 01F4                  brne .L52
 747 0314 88E1                  ldi r24,lo8(24)
 748 0316 90E0                  ldi r25,hi8(24)
 749 0318 2CE0                  ldi r18,lo8(12)
 750                    /* #APP */
 751 031a 0FB6                  in __tmp_reg__,__SREG__
 752 031c F894                  cli
 753 031e A895                  wdr
 754 0320 81BD                  out 33,r24
 755 0322 0FBE                  out __SREG__,__tmp_reg__
 756 0324 21BD                  out 33,r18
 757                    /* #NOAPP */
 758                    .L52:
 760                    .LM69:
 761 0326 8091 0000             lds r24,RxdBuffer+2
 762 032a 00D0                  rcall uart_putchar
 764                    .LM70:
 765 032c 8091 0000             lds r24,RxdBuffer+2
 766 0330 8437                  cpi r24,lo8(116)
 767 0332 01F0                  breq .+2
 768 0334 00C0                  rjmp .L65
 770                    .LM71:
 771 0336 2091 0000             lds r18,AnzahlEmpfangsBytes
 772 033a 43E0                  ldi r20,lo8(3)
 773 033c 64E0                  ldi r22,lo8(4)
 774 033e 80E0                  ldi r24,lo8(MotorTest)
 775 0340 90E0                  ldi r25,hi8(MotorTest)
 776 0342 00D0                  rcall Decode64
 778                    .LM72:
 779 0344 E091 0000             lds r30,MotorAdresse
 780 0348 FF27                  clr r31
 781 034a E050                  subi r30,lo8(-(MotorTest-1))
 782 034c F040                  sbci r31,hi8(-(MotorTest-1))
 783 034e 8081                  ld r24,Z
 784 0350 8093 0000             sts SIO_Sollwert,r24
 786                    .LM73:
 787 0354 84EF                  ldi r24,lo8(500)
 788 0356 91E0                  ldi r25,hi8(500)
 789 0358 9093 0000             sts (SIO_Timeout)+1,r25
 790 035c 8093 0000             sts SIO_Timeout,r24
 791 0360 00C0                  rjmp .L65
 792                    .L46:
 794                    .LM74:
 795 0362 8091 0000             lds r24,UartState.2138
 796 0366 8130                  cpi r24,lo8(1)
 797 0368 01F0                  breq .L57
 798 036a 8130                  cpi r24,lo8(1)
 799 036c 00F0                  brlo .L56
 800 036e 8230                  cpi r24,lo8(2)
 801 0370 01F4                  brne .L66
 802 0372 00C0                  rjmp .L58
 803                    .L56:
 805                    .LM75:
 806 0374 8091 0000             lds r24,SioTmp
 807 0378 8332                  cpi r24,lo8(35)
 808 037a 01F4                  brne .L59
 809 037c 8091 0000             lds r24,NeuerDatensatzEmpfangen
 810 0380 8823                  tst r24
 811 0382 01F4                  brne .L59
 812 0384 81E0                  ldi r24,lo8(1)
 813 0386 8093 0000             sts UartState.2138,r24
 814                    .L59:
 816                    .LM76:
 817 038a 8091 0000             lds r24,SioTmp
 818 038e 8093 0000             sts RxdBuffer,r24
 819 0392 81E0                  ldi r24,lo8(1)
 820 0394 8093 0000             sts buf_ptr.2137,r24
 822                    .LM77:
 823 0398 8091 0000             lds r24,SioTmp
 824 039c 9927                  clr r25
 825 039e 00C0                  rjmp .L67
 826                    .L57:
 828                    .LM78:
 829 03a0 82E0                  ldi r24,lo8(2)
 830 03a2 8093 0000             sts UartState.2138,r24
 832                    .LM79:
 833 03a6 E42F                  mov r30,r20
 834 03a8 FF27                  clr r31
 835 03aa 8091 0000             lds r24,SioTmp
 836 03ae E050                  subi r30,lo8(-(RxdBuffer))
 837 03b0 F040                  sbci r31,hi8(-(RxdBuffer))
 838 03b2 8083                  st Z,r24
 839 03b4 00C0                  rjmp .L68
 840                    .L58:
 842                    .LM80:
 843 03b6 E42F                  mov r30,r20
 844 03b8 FF27                  clr r31
 845 03ba 8091 0000             lds r24,SioTmp
 846 03be E050                  subi r30,lo8(-(RxdBuffer))
 847 03c0 F040                  sbci r31,hi8(-(RxdBuffer))
 848 03c2 8083                  st Z,r24
 850                    .LM81:
 851 03c4 4436                  cpi r20,lo8(100)
 852 03c6 00F4                  brsh .L62
 853                    .L68:
 854 03c8 4F5F                  subi r20,lo8(-(1))
 855 03ca 4093 0000             sts buf_ptr.2137,r20
 856 03ce 00C0                  rjmp .L64
 857                    .L62:
 859                    .LM82:
 860 03d0 1092 0000             sts UartState.2138,__zero_reg__
 861                    .L64:
 863                    .LM83:
 864 03d4 2091 0000             lds r18,SioTmp
 865 03d8 8091 0000             lds r24,crc.2134
 866 03dc 9091 0000             lds r25,(crc.2134)+1
 867 03e0 820F                  add r24,r18
 868 03e2 911D                  adc r25,__zero_reg__
 869                    .L67:
 870 03e4 9093 0000             sts (crc.2134)+1,r25
 871 03e8 8093 0000             sts crc.2134,r24
 872 03ec 00C0                  rjmp .L65
 873                    .L66:
 875                    .LM84:
 876 03ee 1092 0000             sts UartState.2138,__zero_reg__
 877                    .L65:
 878                    /* epilogue: frame size=0 */
 879 03f2 FF91                  pop r31
 880 03f4 EF91                  pop r30
 881 03f6 DF91                  pop r29
 882 03f8 CF91                  pop r28
 883 03fa BF91                  pop r27
 884 03fc AF91                  pop r26
 885 03fe 9F91                  pop r25
 886 0400 8F91                  pop r24
 887 0402 7F91                  pop r23
 888 0404 6F91                  pop r22
 889 0406 5F91                  pop r21
 890 0408 4F91                  pop r20
 891 040a 3F91                  pop r19
 892 040c 2F91                  pop r18
 893 040e 0F90                  pop __tmp_reg__
 894 0410 0FBE                  out __SREG__,__tmp_reg__
 895 0412 0F90                  pop __tmp_reg__
 896 0414 1F90                  pop __zero_reg__
 897 0416 1895                  reti
 898                    /* epilogue end (size=19) */
 899                    /* function __vector_11 size 231 (193) */
 908                    .Lscope7:
 910                            .stabd  78,0,0
 914                    .global WriteProgramData
 916                    WriteProgramData:
 917                            .stabd  46,0,0
 231:src/uart.c    **** 
 232:src/uart.c    **** // --------------------------------------------------------------------------
 233:src/uart.c    **** void WriteProgramData(unsigned int pos, unsigned char wert)
 234:src/uart.c    **** {
 919                    .LM85:
 920                    .LFBB8:
 921                    /* prologue: frame size=0 */
 922                    /* prologue end (size=0) */
 923                    /* epilogue: frame size=0 */
 924 0418 0895                  ret
 925                    /* epilogue end (size=1) */
 926                    /* function WriteProgramData size 1 (0) */
 928                    .Lscope8:
 930                            .stabd  78,0,0
 932                    .global DatenUebertragung
 934                    DatenUebertragung:
 935                            .stabd  46,0,0
 235:src/uart.c    **** }
 236:src/uart.c    **** 
 237:src/uart.c    **** //############################################################################
 238:src/uart.c    **** //INstallation der Seriellen Schnittstelle
 239:src/uart.c    **** void UART_Init (void)
 240:src/uart.c    **** //############################################################################
 241:src/uart.c    **** {
 242:src/uart.c    ****         //Enable TXEN im Register UCR TX-Data Enable & RX Enable
 243:src/uart.c    **** 
 244:src/uart.c    ****         UCR=(1 << TXEN) | (1 << RXEN);
 245:src/uart.c    ****     // UART Double Speed (U2X)
 246:src/uart.c    ****         USR   |= (1<<U2X);           
 247:src/uart.c    ****         // RX-Interrupt Freigabe
 248:src/uart.c    **** 
 249:src/uart.c    ****         UCSRB |= (1<<RXCIE);    // serieller Empfangsinterrupt       
 250:src/uart.c    **** 
 251:src/uart.c    ****         // TX-Interrupt Freigabe
 252:src/uart.c    **** //      UCSRB |= (1<<TXCIE);           
 253:src/uart.c    **** 
 254:src/uart.c    ****         //Teiler wird gesetzt 
 255:src/uart.c    ****         UBRR= (SYSCLK / (BAUD_RATE * 8L) -1 );
 256:src/uart.c    ****         //öffnet einen Kanal für printf (STDOUT)
 257:src/uart.c    ****         fdevopen (uart_putchar, NULL);
 258:src/uart.c    ****     Debug_Timer = SetDelay(200);   
 259:src/uart.c    ****     // Version beim Start ausgeben (nicht schön, aber geht... ) 
 260:src/uart.c    ****         uart_putchar ('\n');uart_putchar ('B');uart_putchar ('L');uart_putchar (':'); 
 261:src/uart.c    ****         uart_putchar ('V');uart_putchar (0x30 + VERSION_HAUPTVERSION);uart_putchar ('.');uart_putchar (0x3
 262:src/uart.c    ****         uart_putchar ('\n');uart_putchar ('A');uart_putchar ('D');uart_putchar ('R'); uart_putchar (':'); 
 263:src/uart.c    **** 
 264:src/uart.c    **** }
 265:src/uart.c    **** 
 266:src/uart.c    **** 
 267:src/uart.c    **** 
 268:src/uart.c    **** 
 269:src/uart.c    **** //---------------------------------------------------------------------------------------------
 270:src/uart.c    **** void DatenUebertragung(void)  
 271:src/uart.c    **** {
 937                    .LM86:
 938                    .LFBB9:
 939                    /* prologue: frame size=0 */
 940                    /* prologue end (size=0) */
 272:src/uart.c    ****  if((CheckDelay(Debug_Timer) && UebertragungAbgeschlossen))      // im Singlestep-Betrieb in jedem Scht
 942                    .LM87:
 943 041a 8091 0000             lds r24,Debug_Timer
 944 041e 9091 0000             lds r25,(Debug_Timer)+1
 945 0422 00D0                  rcall CheckDelay
 946 0424 8823                  tst r24
 947 0426 01F0                  breq .L75
 949                    .LM88:
 950 0428 8091 0000             lds r24,UebertragungAbgeschlossen
 951 042c 8823                  tst r24
 952 042e 01F0                  breq .L75
 273:src/uart.c    ****          {
 274:src/uart.c    ****           SendOutData('D',MeineSlaveAdresse,(unsigned char *) &DebugOut,sizeof(DebugOut));
 954                    .LM89:
 955 0430 6091 0000             lds r22,MeineSlaveAdresse
 956 0434 22E2                  ldi r18,lo8(34)
 957 0436 40E0                  ldi r20,lo8(DebugOut)
 958 0438 50E0                  ldi r21,hi8(DebugOut)
 959 043a 84E4                  ldi r24,lo8(68)
 960 043c 00D0                  rcall SendOutData
 275:src/uart.c    ****           Debug_Timer = SetDelay(50);   // Sendeintervall
 962                    .LM90:
 963 043e 82E3                  ldi r24,lo8(50)
 964 0440 90E0                  ldi r25,hi8(50)
 965 0442 00D0                  rcall SetDelay
 966 0444 9093 0000             sts (Debug_Timer)+1,r25
 967 0448 8093 0000             sts Debug_Timer,r24
 968                    .L75:
 969 044c 0895                  ret
 970                    /* epilogue: frame size=0 */
 971                    /* epilogue: noreturn */
 972                    /* epilogue end (size=0) */
 973                    /* function DatenUebertragung size 26 (26) */
 975                    .Lscope9:
 977                            .stabd  78,0,0
 979                    .global UART_Init
 981                    UART_Init:
 982                            .stabd  46,0,0
 984                    .LM91:
 985                    .LFBB10:
 986                    /* prologue: frame size=0 */
 987                    /* prologue end (size=0) */
 989                    .LM92:
 990 044e 88E1                  ldi r24,lo8(24)
 991 0450 8AB9                  out 42-0x20,r24
 993                    .LM93:
 994 0452 599A                  sbi 43-0x20,1
 996                    .LM94:
 997 0454 579A                  sbi 42-0x20,7
 999                    .LM95:
 1000 0456 80E1                 ldi r24,lo8(16)
 1001 0458 89B9                 out 41-0x20,r24
 1003                   .LM96:
 1004 045a 60E0                 ldi r22,lo8(0)
 1005 045c 70E0                 ldi r23,hi8(0)
 1006 045e 80E0                 ldi r24,lo8(pm(uart_putchar))
 1007 0460 90E0                 ldi r25,hi8(pm(uart_putchar))
 1008 0462 00D0                 rcall fdevopen
 1010                   .LM97:
 1011 0464 88EC                 ldi r24,lo8(200)
 1012 0466 90E0                 ldi r25,hi8(200)
 1013 0468 00D0                 rcall SetDelay
 1014 046a 9093 0000            sts (Debug_Timer)+1,r25
 1015 046e 8093 0000            sts Debug_Timer,r24
 1017                   .LM98:
 1018 0472 8AE0                 ldi r24,lo8(10)
 1019 0474 00D0                 rcall uart_putchar
 1020 0476 82E4                 ldi r24,lo8(66)
 1021 0478 00D0                 rcall uart_putchar
 1022 047a 8CE4                 ldi r24,lo8(76)
 1023 047c 00D0                 rcall uart_putchar
 1024 047e 8AE3                 ldi r24,lo8(58)
 1025 0480 00D0                 rcall uart_putchar
 1027                   .LM99:
 1028 0482 86E5                 ldi r24,lo8(86)
 1029 0484 00D0                 rcall uart_putchar
 1030 0486 80E3                 ldi r24,lo8(48)
 1031 0488 00D0                 rcall uart_putchar
 1032 048a 8EE2                 ldi r24,lo8(46)
 1033 048c 00D0                 rcall uart_putchar
 1034 048e 83E3                 ldi r24,lo8(51)
 1035 0490 00D0                 rcall uart_putchar
 1036 0492 87E3                 ldi r24,lo8(55)
 1037 0494 00D0                 rcall uart_putchar
 1039                   .LM100:
 1040 0496 8AE0                 ldi r24,lo8(10)
 1041 0498 00D0                 rcall uart_putchar
 1042 049a 81E4                 ldi r24,lo8(65)
 1043 049c 00D0                 rcall uart_putchar
 1044 049e 84E4                 ldi r24,lo8(68)
 1045 04a0 00D0                 rcall uart_putchar
 1046 04a2 82E5                 ldi r24,lo8(82)
 1047 04a4 00D0                 rcall uart_putchar
 1048 04a6 8AE3                 ldi r24,lo8(58)
 1049 04a8 00D0                 rcall uart_putchar
 1050 04aa 8091 0000            lds r24,MotorAdresse
 1051 04ae 805D                 subi r24,lo8(-(48))
 1052 04b0 00D0                 rcall uart_putchar
 1053                   /* epilogue: frame size=0 */
 1054 04b2 0895                 ret
 1055                   /* epilogue end (size=1) */
 1056                   /* function UART_Init size 51 (50) */
 1058                   .Lscope10:
 1060                           .stabd  78,0,0
 1061                   .global SIO_Sollwert
 1062                   .global SIO_Sollwert
 1063                           .section .bss
 1066                   SIO_Sollwert:
 1067 0000 00                   .skip 1,0
 1068                   .global SioTmp
 1069                   .global SioTmp
 1072                   SioTmp:
 1073 0001 00                   .skip 1,0
 1074                   .global NeuerDatensatzEmpfangen
 1075                   .global NeuerDatensatzEmpfangen
 1078                   NeuerDatensatzEmpfangen:
 1079 0002 00                   .skip 1,0
 1080                   .global UebertragungAbgeschlossen
 1081                           .data
 1084                   UebertragungAbgeschlossen:
 1085 0000 01                   .byte   1
 1086                   .global MotorTest
 1087                   .global MotorTest
 1088                           .section .bss
 1091                   MotorTest:
 1092 0003 0000 0000            .skip 4,0
 1093                   .global AnzahlEmpfangsBytes
 1094                   .global AnzahlEmpfangsBytes
 1097                   AnzahlEmpfangsBytes:
 1098 0007 00                   .skip 1,0
 1099                           .lcomm UartState.2138,1
 1100                           .lcomm buf_ptr.2137,1
 1101                           .lcomm crc2.2136,1
 1102                           .lcomm crc1.2135,1
 1103                           .lcomm crc.2134,2
 1104                           .lcomm ptr.2069,2
 1105                           .comm MeineSlaveAdresse,1,1
 1106                           .comm Debug_Timer,2,1
 1107                           .comm DebugOut,34,1
 1108                           .comm SendeBuffer,100,1
 1109                           .comm RxdBuffer,100,1
 1127                           .text
 1129                   .Letext0:
 1130                   /* File "src/uart.c": code  612 = 0x0264 ( 544), prologues  31, epilogues  37 */
DEFINED SYMBOLS
                            *ABS*:00000000 uart.c
     /tmp/ccYvbISt.s:2      *ABS*:0000003f __SREG__
     /tmp/ccYvbISt.s:3      *ABS*:0000003e __SP_H__
     /tmp/ccYvbISt.s:4      *ABS*:0000003d __SP_L__
     /tmp/ccYvbISt.s:5      *ABS*:00000000 __tmp_reg__
     /tmp/ccYvbISt.s:6      *ABS*:00000001 __zero_reg__
     /tmp/ccYvbISt.s:102    .text:00000000 __vector_13
     /tmp/ccYvbISt.s:129    .text:00000014 SendUart
     /tmp/ccYvbISt.s:1084   .data:00000000 UebertragungAbgeschlossen
     /tmp/ccYvbISt.s:1103   .bss:0000000e ptr.2069
                            *COM*:00000064 SendeBuffer
     /tmp/ccYvbISt.s:208    .text:00000062 Decode64
                            *COM*:00000064 RxdBuffer
     /tmp/ccYvbISt.s:348    .text:00000112 AddCRC
     /tmp/ccYvbISt.s:435    .text:0000016e SendOutData
     /tmp/ccYvbISt.s:590    .text:0000023e uart_putchar
     /tmp/ccYvbISt.s:631    .text:00000258 __vector_11
     /tmp/ccYvbISt.s:1072   .bss:00000001 SioTmp
     /tmp/ccYvbISt.s:1099   .bss:00000009 buf_ptr.2137
                             .bss:00000008 UartState.2138
     /tmp/ccYvbISt.s:1102   .bss:0000000c crc.2134
     /tmp/ccYvbISt.s:1101   .bss:0000000b crc1.2135
     /tmp/ccYvbISt.s:1100   .bss:0000000a crc2.2136
     /tmp/ccYvbISt.s:1097   .bss:00000007 AnzahlEmpfangsBytes
     /tmp/ccYvbISt.s:1091   .bss:00000003 MotorTest
     /tmp/ccYvbISt.s:1066   .bss:00000000 SIO_Sollwert
     /tmp/ccYvbISt.s:1078   .bss:00000002 NeuerDatensatzEmpfangen
     /tmp/ccYvbISt.s:916    .text:00000418 WriteProgramData
     /tmp/ccYvbISt.s:934    .text:0000041a DatenUebertragung
                            *COM*:00000002 Debug_Timer
                            *COM*:00000001 MeineSlaveAdresse
                            *COM*:00000022 DebugOut
     /tmp/ccYvbISt.s:981    .text:0000044e UART_Init

UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss
MotorAdresse
SIO_Timeout
CheckDelay
SetDelay
fdevopen