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Rev 838 | Rev 903 | ||
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1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
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1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
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2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols
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2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols
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3 | *
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3 | *
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4 | * Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de
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4 | * Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de
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5 | *
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5 | *
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6 | * $Id: irmp.c,v 1.84 2010/11/09 19:18:32 fm Exp $
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6 | * $Id: irmp.c,v 1.87 2011/01/18 13:02:15 fm Exp $
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7 | *
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7 | *
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8 | * ATMEGA88 @ 8 MHz
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8 | * ATMEGA88 @ 8 MHz
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9 | *
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9 | *
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10 | * Typical manufacturers:
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10 | * Typical manufacturers:
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11 | *
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11 | *
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12 | * SIRCS - Sony
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12 | * SIRCS - Sony
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13 | * NEC - NEC, Yamaha, Canon, Tevion, Harman/Kardon, Hitachi, JVC, Pioneer, Toshiba, Xoro, Orion, and many other Japanese manufacturers
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13 | * NEC - NEC, Yamaha, Canon, Tevion, Harman/Kardon, Hitachi, JVC, Pioneer, Toshiba, Xoro, Orion, and many other Japanese manufacturers
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14 | * SAMSUNG - Samsung
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14 | * SAMSUNG - Samsung
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15 | * SAMSUNG32 - Samsung
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15 | * SAMSUNG32 - Samsung
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16 | * MATSUSHITA - Matsushita
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16 | * MATSUSHITA - Matsushita
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17 | * KASEIKYO - Panasonic, Denon & other Japanese manufacturers (members of "Japan's Association for Electric Home Application")
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17 | * KASEIKYO - Panasonic, Denon & other Japanese manufacturers (members of "Japan's Association for Electric Home Application")
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18 | * RECS80 - Philips, Nokia, Thomson, Nordmende, Telefunken, Saba
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18 | * RECS80 - Philips, Nokia, Thomson, Nordmende, Telefunken, Saba
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19 | * RC5 - Philips and other European manufacturers
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19 | * RC5 - Philips and other European manufacturers
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20 | * DENON - Denon
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20 | * DENON - Denon, Sharp
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21 | * RC6 - Philips and other European manufacturers
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21 | * RC6 - Philips and other European manufacturers
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22 | * APPLE - Apple
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22 | * APPLE - Apple
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23 | * NUBERT - Nubert Subwoofer System
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23 | * NUBERT - Nubert Subwoofer System
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24 | * B&O - Bang & Olufsen
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24 | * B&O - Bang & Olufsen
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25 | * PANASONIC - Panasonic (older, yet not implemented)
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25 | * PANASONIC - Panasonic (older, yet not implemented)
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26 | * GRUNDIG - Grundig
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26 | * GRUNDIG - Grundig
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27 | * NOKIA - Nokia
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27 | * NOKIA - Nokia
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28 | * SIEMENS - Siemens, e.g. Gigaset M740AV
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28 | * SIEMENS - Siemens, e.g. Gigaset M740AV
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29 | *
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29 | *
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30 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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30 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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31 | *
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31 | *
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32 | * SIRCS
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32 | * SIRCS
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33 | * -----
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33 | * -----
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34 | *
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34 | *
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35 | * frame: 1 start bit + 12-20 data bits + no stop bit
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35 | * frame: 1 start bit + 12-20 data bits + no stop bit
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36 | * data: 7 command bits + 5 address bits + 0 to 8 additional bits
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36 | * data: 7 command bits + 5 address bits + 0 to 8 additional bits
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37 | *
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37 | *
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38 | * start bit: data "0": data "1": stop bit:
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38 | * start bit: data "0": data "1": stop bit:
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39 | * -----------------_________ ------_____ ------------______
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39 | * -----------------_________ ------_____ ------------______
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40 | * 2400us 600us 600us 600us 1200us 600 us no stop bit
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40 | * 2400us 600us 600us 600us 1200us 600 us no stop bit
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41 | *
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41 | *
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42 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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42 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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43 | *
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43 | *
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44 | * NEC + extended NEC
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44 | * NEC + extended NEC
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45 | * -------------------------
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45 | * -------------------------
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46 | *
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46 | *
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47 | * frame: 1 start bit + 32 data bits + 1 stop bit
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47 | * frame: 1 start bit + 32 data bits + 1 stop bit
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48 | * data NEC: 8 address bits + 8 inverted address bits + 8 command bits + 8 inverted command bits
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48 | * data NEC: 8 address bits + 8 inverted address bits + 8 command bits + 8 inverted command bits
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49 | * data extended NEC: 16 address bits + 8 command bits + 8 inverted command bits
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49 | * data extended NEC: 16 address bits + 8 command bits + 8 inverted command bits
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50 | *
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50 | *
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51 | * start bit: data "0": data "1": stop bit:
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51 | * start bit: data "0": data "1": stop bit:
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52 | * -----------------_________ ------______ ------________________ ------______....
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52 | * -----------------_________ ------______ ------________________ ------______....
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53 | * 9000us 4500us 560us 560us 560us 1690 us 560us
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53 | * 9000us 4500us 560us 560us 560us 1690 us 560us
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54 | *
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54 | *
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55 | *
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55 | *
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56 | * Repetition frame:
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56 | * Repetition frame:
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57 | *
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57 | *
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58 | * -----------------_________------______ .... ~100ms Pause, then repeat
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58 | * -----------------_________------______ .... ~100ms Pause, then repeat
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59 | * 9000us 2250us 560us
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59 | * 9000us 2250us 560us
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60 | *
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60 | *
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61 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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61 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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62 | *
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62 | *
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63 | * SAMSUNG
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63 | * SAMSUNG
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64 | * -------
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64 | * -------
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65 | *
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65 | *
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66 | * frame: 1 start bit + 16 data(1) bits + 1 sync bit + additional 20 data(2) bits + 1 stop bit
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66 | * frame: 1 start bit + 16 data(1) bits + 1 sync bit + additional 20 data(2) bits + 1 stop bit
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67 | * data(1): 16 address bits
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67 | * data(1): 16 address bits
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68 | * data(2): 4 ID bits + 8 command bits + 8 inverted command bits
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68 | * data(2): 4 ID bits + 8 command bits + 8 inverted command bits
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69 | *
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69 | *
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70 | * start bit: data "0": data "1": sync bit: stop bit:
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70 | * start bit: data "0": data "1": sync bit: stop bit:
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71 | * ----------______________ ------______ ------________________ ------______________ ------______....
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71 | * ----------______________ ------______ ------________________ ------______________ ------______....
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72 | * 4500us 4500us 550us 450us 550us 1450us 550us 4500us 550us
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72 | * 4500us 4500us 550us 450us 550us 1450us 550us 4500us 550us
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73 | *
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73 | *
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74 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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74 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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75 | *
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75 | *
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76 | * SAMSUNG32
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76 | * SAMSUNG32
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77 | * ----------
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77 | * ----------
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78 | *
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78 | *
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79 | * frame: 1 start bit + 32 data bits + 1 stop bit
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79 | * frame: 1 start bit + 32 data bits + 1 stop bit
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80 | * data: 16 address bits + 16 command bits
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80 | * data: 16 address bits + 16 command bits
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81 | *
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81 | *
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82 | * start bit: data "0": data "1": stop bit:
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82 | * start bit: data "0": data "1": stop bit:
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83 | * ----------______________ ------______ ------________________ ------______....
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83 | * ----------______________ ------______ ------________________ ------______....
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84 | * 4500us 4500us 550us 450us 550us 1450us 550us
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84 | * 4500us 4500us 550us 450us 550us 1450us 550us
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85 | *
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85 | *
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86 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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86 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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87 | *
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87 | *
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88 | * MATSUSHITA
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88 | * MATSUSHITA
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89 | * ----------
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89 | * ----------
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90 | *
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90 | *
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91 | * frame: 1 start bit + 24 data bits + 1 stop bit
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91 | * frame: 1 start bit + 24 data bits + 1 stop bit
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92 | * data: 6 custom bits + 6 command bits + 12 address bits
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92 | * data: 6 custom bits + 6 command bits + 12 address bits
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93 | *
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93 | *
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94 | * start bit: data "0": data "1": stop bit:
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94 | * start bit: data "0": data "1": stop bit:
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95 | * ----------_________ ------______ ------________________ ------______....
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95 | * ----------_________ ------______ ------________________ ------______....
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96 | * 3488us 3488us 872us 872us 872us 2616us 872us
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96 | * 3488us 3488us 872us 872us 872us 2616us 872us
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97 | *
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97 | *
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98 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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98 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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99 | *
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99 | *
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100 | * KASEIKYO
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100 | * KASEIKYO
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101 | * --------
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101 | * --------
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102 | *
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102 | *
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103 | * frame: 1 start bit + 48 data bits + 1 stop bit
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103 | * frame: 1 start bit + 48 data bits + 1 stop bit
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104 | * data: 16 manufacturer bits + 4 parity bits + 4 genre1 bits + 4 genre2 bits + 10 command bits + 2 id bits + 8 parity bits
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104 | * data: 16 manufacturer bits + 4 parity bits + 4 genre1 bits + 4 genre2 bits + 10 command bits + 2 id bits + 8 parity bits
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105 | *
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105 | *
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106 | * start bit: data "0": data "1": stop bit:
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106 | * start bit: data "0": data "1": stop bit:
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107 | * ----------______ ------______ ------________________ ------______....
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107 | * ----------______ ------______ ------________________ ------______....
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108 | * 3380us 1690us 423us 423us 423us 1269us 423us
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108 | * 3380us 1690us 423us 423us 423us 1269us 423us
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109 | *
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109 | *
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110 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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110 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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111 | *
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111 | *
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112 | * RECS80
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112 | * RECS80
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113 | * ------
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113 | * ------
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114 | *
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114 | *
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115 | * frame: 2 start bits + 10 data bits + 1 stop bit
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115 | * frame: 2 start bits + 10 data bits + 1 stop bit
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116 | * data: 1 toggle bit + 3 address bits + 6 command bits
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116 | * data: 1 toggle bit + 3 address bits + 6 command bits
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117 | *
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117 | *
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118 | * start bit: data "0": data "1": stop bit:
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118 | * start bit: data "0": data "1": stop bit:
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119 | * -----_____________________ -----____________ -----______________ ------_______....
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119 | * -----_____________________ -----____________ -----______________ ------_______....
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120 | * 158us 7432us 158us 4902us 158us 7432us 158us
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120 | * 158us 7432us 158us 4902us 158us 7432us 158us
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121 | *
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121 | *
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122 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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122 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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123 | *
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123 | *
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124 | * RECS80EXT
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124 | * RECS80EXT
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125 | * ---------
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125 | * ---------
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126 | *
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126 | *
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127 | * frame: 2 start bits + 11 data bits + 1 stop bit
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127 | * frame: 2 start bits + 11 data bits + 1 stop bit
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128 | * data: 1 toggle bit + 4 address bits + 6 command bits
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128 | * data: 1 toggle bit + 4 address bits + 6 command bits
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129 | *
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129 | *
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130 | * start bit: data "0": data "1": stop bit:
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130 | * start bit: data "0": data "1": stop bit:
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131 | * -----_____________________ -----____________ -----______________ ------_______....
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131 | * -----_____________________ -----____________ -----______________ ------_______....
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132 | * 158us 3637us 158us 4902us 158us 7432us 158us
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132 | * 158us 3637us 158us 4902us 158us 7432us 158us
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133 | *
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133 | *
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134 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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134 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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135 | *
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135 | *
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136 | * RC5 + RC5X
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136 | * RC5 + RC5X
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137 | * ----------
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137 | * ----------
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138 | *
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138 | *
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139 | * RC5 frame: 2 start bits + 12 data bits + no stop bit
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139 | * RC5 frame: 2 start bits + 12 data bits + no stop bit
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140 | * RC5 data: 1 toggle bit + 5 address bits + 6 command bits
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140 | * RC5 data: 1 toggle bit + 5 address bits + 6 command bits
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141 | * RC5X frame: 1 start bit + 13 data bits + no stop bit
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141 | * RC5X frame: 1 start bit + 13 data bits + no stop bit
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142 | * RC5X data: 1 inverted command bit + 1 toggle bit + 5 address bits + 6 command bits
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142 | * RC5X data: 1 inverted command bit + 1 toggle bit + 5 address bits + 6 command bits
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143 | *
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143 | *
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144 | * start bit: data "0": data "1":
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144 | * start bit: data "0": data "1":
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145 | * ______----- ------______ ______------
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145 | * ______----- ------______ ______------
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146 | * 889us 889us 889us 889us 889us 889us
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146 | * 889us 889us 889us 889us 889us 889us
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147 | *
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147 | *
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148 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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148 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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149 | *
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149 | *
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150 | * DENON
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150 | * DENON
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151 | * -----
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151 | * -----
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152 | *
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152 | *
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153 | * frame: 0 start bits + 16 data bits + stop bit + 65ms pause + 16 inverted data bits + stop bit
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153 | * frame: 0 start bits + 16 data bits + stop bit + 65ms pause + 16 inverted data bits + stop bit
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154 | * data: 5 address bits + 10 command bits
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154 | * data: 5 address bits + 10 command bits
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155 | *
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155 | *
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- | 156 | * Theory:
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- | 157 | *
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156 | * data "0": data "1":
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158 | * data "0": data "1":
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157 | * ------________________ ------______________
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159 | * ------________________ ------______________
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158 | * 275us 775us 275us 1900us
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160 | * 275us 775us 275us 1900us
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159 | *
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161 | *
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- | 162 | * Practice:
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- | 163 | *
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- | 164 | * data "0": data "1":
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- | 165 | * ------________________ ------______________
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- | 166 | * 310us 745us 310us 1780us
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- | 167 | *
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160 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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168 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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161 | *
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169 | *
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162 | * RC6
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170 | * RC6
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163 | * ---
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171 | * ---
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164 | *
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172 | *
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165 | * RC6 frame: 1 start bit + 1 bit "1" + 3 mode bits + 1 toggle bit + 16 data bits + 2666 µs pause
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173 | * RC6 frame: 1 start bit + 1 bit "1" + 3 mode bits + 1 toggle bit + 16 data bits + 2666 µs pause
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166 | * RC6 data: 8 address bits + 8 command bits
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174 | * RC6 data: 8 address bits + 8 command bits
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167 | *
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175 | *
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168 | * start bit toggle bit "0": toggle bit "1": data/mode "0": data/mode "1":
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176 | * start bit toggle bit "0": toggle bit "1": data/mode "0": data/mode "1":
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169 | * ____________------- _______------- -------_______ _______------- -------_______
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177 | * ____________------- _______------- -------_______ _______------- -------_______
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170 | * 2666us 889us 889us 889us 889us 889us 444us 444us 444us 444us
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178 | * 2666us 889us 889us 889us 889us 889us 444us 444us 444us 444us
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171 | *
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179 | *
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172 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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180 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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173 | *
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181 | *
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174 | * APPLE
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182 | * APPLE
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175 | * -----
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183 | * -----
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176 | *
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184 | *
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177 | * frame: 1 start bit + 32 data bits + 1 stop bit
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185 | * frame: 1 start bit + 32 data bits + 1 stop bit
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178 | * data: 16 address bits + 11100000 + 8 command bits
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186 | * data: 16 address bits + 11100000 + 8 command bits
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179 | *
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187 | *
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180 | * start bit: data "0": data "1": stop bit:
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188 | * start bit: data "0": data "1": stop bit:
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181 | * -----------------_________ ------______ ------________________ ------______....
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189 | * -----------------_________ ------______ ------________________ ------______....
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182 | * 9000us 4500us 560us 560us 560us 1690 us 560us
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190 | * 9000us 4500us 560us 560us 560us 1690 us 560us
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183 | *
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191 | *
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184 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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192 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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185 | *
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193 | *
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186 | * NUBERT (subwoofer system)
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194 | * NUBERT (subwoofer system)
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187 | * -------------------------
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195 | * -------------------------
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188 | *
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196 | *
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189 | * frame: 1 start bit + 10 data bits + 1 stop bit
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197 | * frame: 1 start bit + 10 data bits + 1 stop bit
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190 | * data: 0 address bits + 10 command bits ?
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198 | * data: 0 address bits + 10 command bits ?
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191 | *
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199 | *
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192 | * start bit: data "0": data "1": stop bit:
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200 | * start bit: data "0": data "1": stop bit:
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193 | * ----------_____ ------______ ------________________ ------______....
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201 | * ----------_____ ------______ ------________________ ------______....
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194 | * 1340us 340us 500us 1300us 1340us 340us 500us
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202 | * 1340us 340us 500us 1300us 1340us 340us 500us
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195 | *
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203 | *
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196 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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204 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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197 | *
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205 | *
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198 | * BANG_OLUFSEN
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206 | * BANG_OLUFSEN
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199 | * ------------
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207 | * ------------
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200 | *
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208 | *
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201 | * frame: 4 start bits + 16 data bits + 1 trailer bit + 1 stop bit
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209 | * frame: 4 start bits + 16 data bits + 1 trailer bit + 1 stop bit
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202 | * data: 0 address bits + 16 command bits
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210 | * data: 0 address bits + 16 command bits
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203 | *
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211 | *
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204 | * 1st start bit: 2nd start bit: 3rd start bit: 4th start bit:
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212 | * 1st start bit: 2nd start bit: 3rd start bit: 4th start bit:
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205 | * -----________ -----________ -----_____________ -----________
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213 | * -----________ -----________ -----_____________ -----________
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206 | * 210us 3000us 210us 3000us 210us 15000us 210us 3000us
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214 | * 210us 3000us 210us 3000us 210us 15000us 210us 3000us
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207 | *
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215 | *
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208 | * data "0": data "1": data "repeat bit": trailer bit: stop bit:
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216 | * data "0": data "1": data "repeat bit": trailer bit: stop bit:
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209 | * -----________ -----_____________ -----___________ -----_____________ -----____...
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217 | * -----________ -----_____________ -----___________ -----_____________ -----____...
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210 | * 210us 3000us 210us 9000us 210us 6000us 210us 12000us 210us
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218 | * 210us 3000us 210us 9000us 210us 6000us 210us 12000us 210us
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211 | *
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219 | *
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212 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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220 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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213 | *
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221 | *
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214 | * GRUNDIG
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222 | * GRUNDIG
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215 | * -------
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223 | * -------
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216 | *
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224 | *
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217 | * packet: 1 start frame + 19,968ms pause + N info frames + 117,76ms pause + 1 stop frame
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225 | * packet: 1 start frame + 19,968ms pause + N info frames + 117,76ms pause + 1 stop frame
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218 | * frame: 1 pre bit + 1 start bit + 9 data bits + no stop bit
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226 | * frame: 1 pre bit + 1 start bit + 9 data bits + no stop bit
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219 | * pause between info frames: 117,76ms
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227 | * pause between info frames: 117,76ms
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220 | *
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228 | *
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221 | * data of start frame: 9 x 1
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229 | * data of start frame: 9 x 1
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222 | * data of info frame: 9 command bits
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230 | * data of info frame: 9 command bits
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223 | * data of stop frame: 9 x 1
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231 | * data of stop frame: 9 x 1
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224 | *
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232 | *
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225 | * pre bit: start bit data "0": data "1":
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233 | * pre bit: start bit data "0": data "1":
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226 | * ------____________ ------______ ______------ ------______
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234 | * ------____________ ------______ ______------ ------______
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227 | * 528us 2639us 528us 528us 528us 528us 528us 528us
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235 | * 528us 2639us 528us 528us 528us 528us 528us 528us
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228 | *
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236 | *
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229 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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237 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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230 | *
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238 | *
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231 | * NOKIA:
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239 | * NOKIA:
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232 | * ------
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240 | * ------
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233 | *
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241 | *
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234 | * Timing similar to Grundig, but 16 data bits:
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242 | * Timing similar to Grundig, but 16 data bits:
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235 | * frame: 1 pre bit + 1 start bit + 8 command bits + 8 address bits + no stop bit
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243 | * frame: 1 pre bit + 1 start bit + 8 command bits + 8 address bits + no stop bit
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236 | *
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244 | *
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237 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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245 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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238 | *
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246 | *
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239 | * SIEMENS:
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247 | * SIEMENS:
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240 | * --------
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248 | * --------
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241 | *
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249 | *
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242 | * SIEMENS frame: 1 start bit + 22 data bits + no stop bit
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250 | * SIEMENS frame: 1 start bit + 22 data bits + no stop bit
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243 | * SIEMENS data: 13 address bits + 1 repeat bit + 7 data bits + 1 unknown bit
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251 | * SIEMENS data: 13 address bits + 1 repeat bit + 7 data bits + 1 unknown bit
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244 | *
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252 | *
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245 | * start bit data "0": data "1":
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253 | * start bit data "0": data "1":
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246 | * -------_______ _______------- -------_______
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254 | * -------_______ _______------- -------_______
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247 | * 250us 250us 250us 250us 250us 250us
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255 | * 250us 250us 250us 250us 250us 250us
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248 | *
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256 | *
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249 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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257 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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250 | *
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258 | *
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251 | * PANASONIC (older protocol, yet not implemented, see also MATSUSHITA, timing very similar)
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259 | * PANASONIC (older protocol, yet not implemented, see also MATSUSHITA, timing very similar)
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252 | * -----------------------------------------------------------------------------------------
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260 | * -----------------------------------------------------------------------------------------
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253 | *
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261 | *
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254 | * frame: 1 start bit + 22 data bits + 1 stop bit
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262 | * frame: 1 start bit + 22 data bits + 1 stop bit
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255 | * 22 data bits = 5 custom bits + 6 data bits + 5 inverted custom bits + 6 inverted data bits
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263 | * 22 data bits = 5 custom bits + 6 data bits + 5 inverted custom bits + 6 inverted data bits
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256 | *
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264 | *
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257 | * European version: T = 456us
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265 | * European version: T = 456us
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258 | * USA & Canada version: T = 422us
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266 | * USA & Canada version: T = 422us
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259 | *
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267 | *
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260 | * start bit: data "0": data "1": stop bit:
|
268 | * start bit: data "0": data "1": stop bit:
|
261 | * 8T 8T 2T 2T 2T 6T 2T
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269 | * 8T 8T 2T 2T 2T 6T 2T
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262 | * -------------____________ ------_____ ------_____________ ------_______....
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270 | * -------------____________ ------_____ ------_____________ ------_______....
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263 | * 3648us 3648us 912us 912us 912us 2736us 912us (Europe)
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271 | * 3648us 3648us 912us 912us 912us 2736us 912us (Europe)
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264 | * 3376us 3376us 844us 844us 844us 2532us 844us (US)
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272 | * 3376us 3376us 844us 844us 844us 2532us 844us (US)
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265 | *
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273 | *
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266 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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274 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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267 | *
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275 | *
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268 | * This program is free software; you can redistribute it and/or modify
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276 | * This program is free software; you can redistribute it and/or modify
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269 | * it under the terms of the GNU General Public License as published by
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277 | * it under the terms of the GNU General Public License as published by
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270 | * the Free Software Foundation; either version 2 of the License, or
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278 | * the Free Software Foundation; either version 2 of the License, or
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271 | * (at your option) any later version.
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279 | * (at your option) any later version.
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272 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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280 | *---------------------------------------------------------------------------------------------------------------------------------------------------
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273 | */
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281 | */
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274 | 282 | ||
275 | #if defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC Compiler instead of AVR
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283 | #if defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC Compiler instead of AVR
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276 | #define PIC_CCS_COMPILER
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284 | #define PIC_CCS_COMPILER
|
277 | #endif
|
285 | #endif
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278 | 286 | ||
279 | #ifdef unix // test on linux/unix
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287 | #ifdef unix // test on linux/unix
|
280 | #include <stdio.h>
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288 | #include <stdio.h>
|
281 | #include <unistd.h>
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289 | #include <unistd.h>
|
282 | #include <stdlib.h>
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290 | #include <stdlib.h>
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283 | #include <string.h>
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291 | #include <string.h>
|
284 | #include <inttypes.h>
|
292 | #include <inttypes.h>
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285 | 293 | ||
286 | #define ANALYZE
|
294 | #define ANALYZE
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287 | #define PROGMEM
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295 | #define PROGMEM
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288 | #define memcpy_P memcpy
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296 | #define memcpy_P memcpy
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289 | 297 | ||
290 | #else // not unix:
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298 | #else // not unix:
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291 | 299 | ||
292 | #ifdef WIN32
|
300 | #ifdef WIN32
|
293 | #include <stdio.h>
|
301 | #include <stdio.h>
|
294 | #include <string.h>
|
302 | #include <string.h>
|
295 | typedef unsigned char uint8_t; |
303 | typedef unsigned char uint8_t; |
296 | typedef unsigned short uint16_t; |
304 | typedef unsigned short uint16_t; |
297 | #define ANALYZE
|
305 | #define ANALYZE
|
298 | #define PROGMEM
|
306 | #define PROGMEM
|
299 | #define memcpy_P memcpy
|
307 | #define memcpy_P memcpy
|
300 | 308 | ||
301 | #else
|
309 | #else
|
302 | 310 | ||
303 | #ifndef CODEVISION
|
311 | #ifndef CODEVISION
|
304 | 312 | ||
305 | #ifdef PIC_CCS_COMPILER
|
313 | #ifdef PIC_CCS_COMPILER
|
306 | 314 | ||
307 | #include <string.h>
|
315 | #include <string.h>
|
308 | typedef unsigned int8 uint8_t; |
316 | typedef unsigned int8 uint8_t; |
309 | typedef unsigned int16 uint16_t; |
317 | typedef unsigned int16 uint16_t; |
310 | #define PROGMEM
|
318 | #define PROGMEM
|
311 | #define memcpy_P memcpy
|
319 | #define memcpy_P memcpy
|
312 | 320 | ||
313 | #else // AVR:
|
321 | #else // AVR:
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314 | 322 | ||
315 | #include <inttypes.h>
|
323 | #include <inttypes.h>
|
316 | #include <stdio.h>
|
324 | #include <stdio.h>
|
317 | #include <string.h>
|
325 | #include <string.h>
|
318 | #include <avr/io.h>
|
326 | #include <avr/io.h>
|
319 | #include <util/delay.h>
|
327 | #include <util/delay.h>
|
320 | #include <avr/pgmspace.h>
|
328 | #include <avr/pgmspace.h>
|
321 | 329 | ||
322 | #endif // PIC_CCS_COMPILER
|
330 | #endif // PIC_CCS_COMPILER
|
323 | #endif // CODEVISION
|
331 | #endif // CODEVISION
|
324 | 332 | ||
325 | #endif // windows
|
333 | #endif // windows
|
326 | #endif // unix
|
334 | #endif // unix
|
327 | 335 | ||
328 | #ifndef IRMP_USE_AS_LIB
|
336 | #ifndef IRMP_USE_AS_LIB
|
329 | #include "irmpconfig.h"
|
337 | #include "irmpconfig.h"
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330 | #endif
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338 | #endif
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331 | #include "irmp.h"
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339 | #include "irmp.h"
|
332 | 340 | ||
333 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1
|
341 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1
|
334 | #define IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL 1
|
342 | #define IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL 1
|
335 | #else
|
343 | #else
|
336 | #define IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL 0
|
344 | #define IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL 0
|
337 | #endif
|
345 | #endif
|
338 | 346 | ||
339 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1
|
347 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_RC6_PROTOCOL == 1 || IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_SIEMENS_PROTOCOL == 1
|
340 | #define IRMP_SUPPORT_MANCHESTER 1
|
348 | #define IRMP_SUPPORT_MANCHESTER 1
|
341 | #else
|
349 | #else
|
342 | #define IRMP_SUPPORT_MANCHESTER 0
|
350 | #define IRMP_SUPPORT_MANCHESTER 0
|
343 | #endif
|
351 | #endif
|
344 | 352 | ||
345 | #define IRMP_KEY_REPETITION_LEN (uint16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec
|
353 | #define IRMP_KEY_REPETITION_LEN (uint16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec
|
346 | 354 | ||
347 | #define MIN_TOLERANCE_00 1.0 // -0%
|
355 | #define MIN_TOLERANCE_00 1.0 // -0%
|
348 | #define MAX_TOLERANCE_00 1.0 // +0%
|
356 | #define MAX_TOLERANCE_00 1.0 // +0%
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349 | 357 | ||
350 | #define MIN_TOLERANCE_05 0.95 // -5%
|
358 | #define MIN_TOLERANCE_05 0.95 // -5%
|
351 | #define MAX_TOLERANCE_05 1.05 // +5%
|
359 | #define MAX_TOLERANCE_05 1.05 // +5%
|
352 | 360 | ||
353 | #define MIN_TOLERANCE_10 0.9 // -10%
|
361 | #define MIN_TOLERANCE_10 0.9 // -10%
|
354 | #define MAX_TOLERANCE_10 1.1 // +10%
|
362 | #define MAX_TOLERANCE_10 1.1 // +10%
|
355 | 363 | ||
356 | #define MIN_TOLERANCE_15 0.85 // -15%
|
364 | #define MIN_TOLERANCE_15 0.85 // -15%
|
357 | #define MAX_TOLERANCE_15 1.15 // +15%
|
365 | #define MAX_TOLERANCE_15 1.15 // +15%
|
358 | 366 | ||
359 | #define MIN_TOLERANCE_20 0.8 // -20%
|
367 | #define MIN_TOLERANCE_20 0.8 // -20%
|
360 | #define MAX_TOLERANCE_20 1.2 // +20%
|
368 | #define MAX_TOLERANCE_20 1.2 // +20%
|
361 | 369 | ||
362 | #define MIN_TOLERANCE_30 0.7 // -30%
|
370 | #define MIN_TOLERANCE_30 0.7 // -30%
|
363 | #define MAX_TOLERANCE_30 1.3 // +30%
|
371 | #define MAX_TOLERANCE_30 1.3 // +30%
|
364 | 372 | ||
365 | #define MIN_TOLERANCE_40 0.6 // -40%
|
373 | #define MIN_TOLERANCE_40 0.6 // -40%
|
366 | #define MAX_TOLERANCE_40 1.4 // +40%
|
374 | #define MAX_TOLERANCE_40 1.4 // +40%
|
367 | 375 | ||
368 | #define MIN_TOLERANCE_50 0.5 // -50%
|
376 | #define MIN_TOLERANCE_50 0.5 // -50%
|
369 | #define MAX_TOLERANCE_50 1.5 // +50%
|
377 | #define MAX_TOLERANCE_50 1.5 // +50%
|
370 | 378 | ||
371 | #define MIN_TOLERANCE_60 0.4 // -60%
|
379 | #define MIN_TOLERANCE_60 0.4 // -60%
|
372 | #define MAX_TOLERANCE_60 1.6 // +60%
|
380 | #define MAX_TOLERANCE_60 1.6 // +60%
|
373 | 381 | ||
374 | #define MIN_TOLERANCE_70 0.3 // -70%
|
382 | #define MIN_TOLERANCE_70 0.3 // -70%
|
375 | #define MAX_TOLERANCE_70 1.7 // +70%
|
383 | #define MAX_TOLERANCE_70 1.7 // +70%
|
376 | 384 | ||
377 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
385 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
378 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
386 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
379 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
387 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
380 | #define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // only 5% to avoid conflict with RC6
|
388 | #define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // only 5% to avoid conflict with RC6
|
381 | #define SIRCS_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
389 | #define SIRCS_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
382 | #define SIRCS_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
390 | #define SIRCS_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
383 | #define SIRCS_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
391 | #define SIRCS_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
384 | #define SIRCS_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
392 | #define SIRCS_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
385 | #define SIRCS_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
393 | #define SIRCS_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
386 | #define SIRCS_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
394 | #define SIRCS_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
387 | 395 | ||
388 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
396 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
389 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
397 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
390 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
398 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
391 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
399 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
392 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
400 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
393 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
401 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
394 | #define NEC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
402 | #define NEC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
395 | #define NEC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
403 | #define NEC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
396 | #define NEC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
404 | #define NEC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
397 | #define NEC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
405 | #define NEC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
398 | #define NEC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
406 | #define NEC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
399 | #define NEC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
407 | #define NEC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
400 | // autodetect nec repetition frame within 50 msec:
|
408 | // autodetect nec repetition frame within 50 msec:
|
401 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms
|
409 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms
|
402 | #if 0
|
410 | #if 0
|
403 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)
|
411 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)
|
404 | #else
|
412 | #else
|
405 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)
|
413 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)
|
406 | #endif
|
414 | #endif
|
407 | 415 | ||
408 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
416 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
409 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
417 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
410 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
418 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
|
411 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
419 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
|
412 | #define SAMSUNG_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
|
420 | #define SAMSUNG_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
|
413 | #define SAMSUNG_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
421 | #define SAMSUNG_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
414 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
|
422 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
|
415 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
423 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
416 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
|
424 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
|
417 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
425 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
418 | 426 | ||
419 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
427 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
420 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
428 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
421 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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429 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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422 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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430 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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423 | #define MATSUSHITA_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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431 | #define MATSUSHITA_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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424 | #define MATSUSHITA_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
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432 | #define MATSUSHITA_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
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425 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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433 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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426 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
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434 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
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427 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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435 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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428 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
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436 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
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429 | 437 | ||
430 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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438 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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431 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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439 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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432 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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440 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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433 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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441 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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434 | #define KASEIKYO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)
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442 | #define KASEIKYO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)
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435 | #define KASEIKYO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)
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443 | #define KASEIKYO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)
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436 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
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444 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
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437 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
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445 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
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438 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)
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446 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)
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439 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)
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447 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)
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440 | 448 | ||
441 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_00 + 0.5) - 1)
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449 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_00 + 0.5) - 1)
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442 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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450 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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443 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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451 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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444 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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452 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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445 | #define RECS80_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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453 | #define RECS80_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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446 | #define RECS80_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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454 | #define RECS80_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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447 | #define RECS80_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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455 | #define RECS80_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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448 | #define RECS80_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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456 | #define RECS80_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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449 | #define RECS80_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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457 | #define RECS80_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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450 | #define RECS80_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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458 | #define RECS80_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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451 | 459 | ||
452 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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460 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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453 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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461 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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454 | #define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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462 | #define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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455 | #define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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463 | #define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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456 | 464 | ||
457 | #define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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465 | #define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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458 | #define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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466 | #define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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459 | #define DENON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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467 | #define DENON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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460 | #define DENON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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468 | #define DENON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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461 | #define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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469 | #define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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462 | #define DENON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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470 | #define DENON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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463 | 471 | ||
464 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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472 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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465 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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473 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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466 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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474 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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467 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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475 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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468 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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476 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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469 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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477 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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470 | #define RC6_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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478 | #define RC6_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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471 | #define RC6_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_30 + 0.5) + 1) // pulses: 300 - 700
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479 | #define RC6_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_30 + 0.5) + 1) // pulses: 300 - 700
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472 | #define RC6_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1) // pauses: 300 - 600
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480 | #define RC6_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1) // pauses: 300 - 600
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473 | #define RC6_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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481 | #define RC6_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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474 | 482 | ||
475 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_00 + 0.5) - 1)
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483 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_00 + 0.5) - 1)
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476 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_00 + 0.5) + 1)
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484 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_00 + 0.5) + 1)
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477 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)
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485 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)
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478 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)
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486 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)
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479 | #define RECS80EXT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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487 | #define RECS80EXT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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480 | #define RECS80EXT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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488 | #define RECS80EXT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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481 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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489 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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482 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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490 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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483 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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491 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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484 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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492 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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485 | 493 | ||
486 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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494 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
487 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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495 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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488 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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496 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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489 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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497 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
490 | #define NUBERT_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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498 | #define NUBERT_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
491 | #define NUBERT_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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499 | #define NUBERT_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
492 | #define NUBERT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
500 | #define NUBERT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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493 | #define NUBERT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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501 | #define NUBERT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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494 | #define NUBERT_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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502 | #define NUBERT_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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495 | #define NUBERT_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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503 | #define NUBERT_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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496 | #define NUBERT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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504 | #define NUBERT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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497 | #define NUBERT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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505 | #define NUBERT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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498 | 506 | ||
499 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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507 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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500 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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508 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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501 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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509 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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502 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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510 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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503 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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511 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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504 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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512 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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505 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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513 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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506 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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514 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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507 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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515 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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508 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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516 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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509 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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517 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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510 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT
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518 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT
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511 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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519 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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512 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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520 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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513 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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521 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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514 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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522 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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515 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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523 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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516 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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524 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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517 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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525 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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518 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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526 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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519 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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527 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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520 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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528 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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521 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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529 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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522 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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530 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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523 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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531 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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524 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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532 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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525 | 533 | ||
526 | #define GRUNDIG_OR_NOKIA_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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534 | #define GRUNDIG_OR_NOKIA_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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527 | #define GRUNDIG_OR_NOKIA_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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535 | #define GRUNDIG_OR_NOKIA_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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528 | #define GRUNDIG_OR_NOKIA_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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536 | #define GRUNDIG_OR_NOKIA_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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529 | #define GRUNDIG_OR_NOKIA_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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537 | #define GRUNDIG_OR_NOKIA_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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530 | #define GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)
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538 | #define GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)
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531 | #define GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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539 | #define GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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532 | 540 | ||
533 | #define SIEMENS_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) - 1)
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541 | #define SIEMENS_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) - 1)
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534 | #define SIEMENS_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) + 1)
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542 | #define SIEMENS_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) + 1)
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535 | #define SIEMENS_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) - 1)
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543 | #define SIEMENS_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) - 1)
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536 | #define SIEMENS_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) + 1)
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544 | #define SIEMENS_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME * 1 + 0.5) + 1)
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537 | 545 | ||
538 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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546 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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539 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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547 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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540 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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548 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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541 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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549 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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542 | #define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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550 | #define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
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543 | #define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)
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551 | #define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)
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544 | #define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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552 | #define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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545 | #define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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553 | #define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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546 | #if 0
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554 | #if 0
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547 | #define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255
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555 | #define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255
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548 | #else
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556 | #else
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549 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1
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557 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1
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550 | #endif
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558 | #endif
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551 | #define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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559 | #define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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552 | 560 | ||
553 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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561 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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554 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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562 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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555 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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563 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)
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556 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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564 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)
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557 | #define RCCAR_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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565 | #define RCCAR_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
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558 | #define RCCAR_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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566 | #define RCCAR_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
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559 | #define RCCAR_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
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567 | #define RCCAR_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
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560 | #define RCCAR_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
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568 | #define RCCAR_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
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561 | #define RCCAR_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
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569 | #define RCCAR_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)
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562 | #define RCCAR_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
570 | #define RCCAR_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)
|
563 | 571 | ||
564 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
572 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
565 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
573 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
566 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!
|
574 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!
|
567 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!
|
575 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!
|
568 | #define JVC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
576 | #define JVC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
569 | #define JVC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
577 | #define JVC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
570 | #define JVC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
578 | #define JVC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
571 | #define JVC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
579 | #define JVC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
572 | #define JVC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
580 | #define JVC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)
|
573 | #define JVC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
581 | #define JVC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)
|
574 | // autodetect JVC repetition frame within 50 msec:
|
582 | // autodetect JVC repetition frame within 50 msec:
|
575 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)
|
583 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)
|
576 | 584 | ||
577 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
585 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
578 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
586 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
579 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
587 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
580 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
588 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
581 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
589 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
582 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
590 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
583 | #define NIKON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
591 | #define NIKON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
584 | #define NIKON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
592 | #define NIKON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
585 | #define NIKON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
593 | #define NIKON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
586 | #define NIKON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
594 | #define NIKON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
587 | #define NIKON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
595 | #define NIKON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)
|
588 | #define NIKON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
596 | #define NIKON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)
|
589 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)
|
597 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)
|
590 | 598 | ||
591 | #define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!
|
599 | #define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!
|
592 | 600 | ||
593 | #ifdef ANALYZE
|
601 | #ifdef ANALYZE
|
594 | #define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }
|
602 | #define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }
|
595 | #define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }
|
603 | #define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }
|
596 | #define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }
|
604 | #define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }
|
597 | #define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }
|
605 | #define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }
|
598 | static int silent; |
606 | static int silent; |
599 | static int time_counter; |
607 | static int time_counter; |
600 | static int verbose; |
608 | static int verbose; |
601 | #else
|
609 | #else
|
602 | #define ANALYZE_PUTCHAR(a)
|
610 | #define ANALYZE_PUTCHAR(a)
|
603 | #define ANALYZE_ONLY_NORMAL_PUTCHAR(a)
|
611 | #define ANALYZE_ONLY_NORMAL_PUTCHAR(a)
|
604 | #define ANALYZE_PRINTF(...)
|
612 | #define ANALYZE_PRINTF(...)
|
605 | #define ANALYZE_NEWLINE()
|
613 | #define ANALYZE_NEWLINE()
|
606 | #endif
|
614 | #endif
|
607 | 615 | ||
608 | #if IRMP_LOGGING == 1
|
616 | #if IRMP_LOGGING == 1
|
609 | #define BAUD 9600L
|
617 | #define BAUD 9600L
|
610 | #include <util/setbaud.h>
|
618 | #include <util/setbaud.h>
|
611 | 619 | ||
612 | #ifdef UBRR0H
|
620 | #ifdef UBRR0H
|
613 | 621 | ||
614 | #define UART0_UBRRH UBRR0H
|
622 | #define UART0_UBRRH UBRR0H
|
615 | #define UART0_UBRRL UBRR0L
|
623 | #define UART0_UBRRL UBRR0L
|
616 | #define UART0_UCSRA UCSR0A
|
624 | #define UART0_UCSRA UCSR0A
|
617 | #define UART0_UCSRB UCSR0B
|
625 | #define UART0_UCSRB UCSR0B
|
618 | #define UART0_UCSRC UCSR0C
|
626 | #define UART0_UCSRC UCSR0C
|
619 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)
|
627 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)
|
620 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)
|
628 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)
|
621 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)
|
629 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)
|
622 | #ifdef URSEL0
|
630 | #ifdef URSEL0
|
623 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)
|
631 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)
|
624 | #else
|
632 | #else
|
625 | #define UART0_URSEL_BIT_VALUE (0)
|
633 | #define UART0_URSEL_BIT_VALUE (0)
|
626 | #endif
|
634 | #endif
|
627 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)
|
635 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)
|
628 | #define UART0_UDR UDR0
|
636 | #define UART0_UDR UDR0
|
629 | #define UART0_U2X U2X0
|
637 | #define UART0_U2X U2X0
|
630 | 638 | ||
631 | #else
|
639 | #else
|
632 | 640 | ||
633 | #define UART0_UBRRH UBRRH
|
641 | #define UART0_UBRRH UBRRH
|
634 | #define UART0_UBRRL UBRRL
|
642 | #define UART0_UBRRL UBRRL
|
635 | #define UART0_UCSRA UCSRA
|
643 | #define UART0_UCSRA UCSRA
|
636 | #define UART0_UCSRB UCSRB
|
644 | #define UART0_UCSRB UCSRB
|
637 | #define UART0_UCSRC UCSRC
|
645 | #define UART0_UCSRC UCSRC
|
638 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)
|
646 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)
|
639 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)
|
647 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)
|
640 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)
|
648 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)
|
641 | #ifdef URSEL
|
649 | #ifdef URSEL
|
642 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)
|
650 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)
|
643 | #else
|
651 | #else
|
644 | #define UART0_URSEL_BIT_VALUE (0)
|
652 | #define UART0_URSEL_BIT_VALUE (0)
|
645 | #endif
|
653 | #endif
|
646 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)
|
654 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)
|
647 | #define UART0_UDR UDR
|
655 | #define UART0_UDR UDR
|
648 | #define UART0_U2X U2X
|
656 | #define UART0_U2X U2X
|
649 | 657 | ||
650 | #endif
|
658 | #endif
|
651 | 659 | ||
652 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
660 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
653 | * Initialize UART
|
661 | * Initialize UART
|
654 | * @details Initializes UART
|
662 | * @details Initializes UART
|
655 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
663 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
656 | */
|
664 | */
|
657 | void
|
665 | void
|
658 | irmp_uart_init (void) |
666 | irmp_uart_init (void) |
659 | {
|
667 | {
|
660 | UART0_UBRRH = UBRRH_VALUE; // set baud rate |
668 | UART0_UBRRH = UBRRH_VALUE; // set baud rate |
661 | UART0_UBRRL = UBRRL_VALUE; |
669 | UART0_UBRRL = UBRRL_VALUE; |
662 | 670 | ||
663 | #if USE_2X
|
671 | #if USE_2X
|
664 | UART0_UCSRA |= (1<<UART0_U2X); |
672 | UART0_UCSRA |= (1<<UART0_U2X); |
665 | #else
|
673 | #else
|
666 | UART0_UCSRA &= ~(1<<UART0_U2X); |
674 | UART0_UCSRA &= ~(1<<UART0_U2X); |
667 | #endif
|
675 | #endif
|
668 | 676 | ||
669 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE; |
677 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE; |
670 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX |
678 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX |
671 | }
|
679 | }
|
672 | 680 | ||
673 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
681 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
674 | * Send character
|
682 | * Send character
|
675 | * @details Sends character
|
683 | * @details Sends character
|
676 | * @param ch character to be transmitted
|
684 | * @param ch character to be transmitted
|
677 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
685 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
678 | */
|
686 | */
|
679 | void
|
687 | void
|
680 | irmp_uart_putc (unsigned char ch) |
688 | irmp_uart_putc (unsigned char ch) |
681 | {
|
689 | {
|
682 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE)) |
690 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE)) |
683 | {
|
691 | {
|
684 | ;
|
692 | ;
|
685 | }
|
693 | }
|
686 | 694 | ||
687 | UART0_UDR = ch; |
695 | UART0_UDR = ch; |
688 | }
|
696 | }
|
689 | 697 | ||
690 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
698 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
691 | * Log IR signal
|
699 | * Log IR signal
|
692 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
700 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
693 | */
|
701 | */
|
694 | 702 | ||
695 | #define STARTCYCLES 2 // min count of zeros before start of logging
|
703 | #define STARTCYCLES 2 // min count of zeros before start of logging
|
696 | #define ENDBITS 1000 // number of sequenced highbits to detect end
|
704 | #define ENDBITS 1000 // number of sequenced highbits to detect end
|
697 | #define DATALEN 700 // log buffer size
|
705 | #define DATALEN 700 // log buffer size
|
698 | 706 | ||
699 | static void |
707 | static void |
700 | irmp_log (uint8_t val) |
708 | irmp_log (uint8_t val) |
701 | {
|
709 | {
|
702 | static uint8_t buf[DATALEN]; // logging buffer |
710 | static uint8_t buf[DATALEN]; // logging buffer |
703 | static uint16_t buf_idx; // number of written bits |
711 | static uint16_t buf_idx; // number of written bits |
704 | static uint8_t startcycles; // current number of start-zeros |
712 | static uint8_t startcycles; // current number of start-zeros |
705 | static uint16_t cnt; // counts sequenced highbits - to detect end |
713 | static uint16_t cnt; // counts sequenced highbits - to detect end |
706 | 714 | ||
707 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging |
715 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging |
708 | {
|
716 | {
|
709 | startcycles++;
|
717 | startcycles++;
|
710 | }
|
718 | }
|
711 | else
|
719 | else
|
712 | {
|
720 | {
|
713 | startcycles = 0; |
721 | startcycles = 0; |
714 | 722 | ||
715 | if (! val || (val && buf_idx != 0)) // start or continue logging on "0", "1" cannot init logging |
723 | if (! val || (val && buf_idx != 0)) // start or continue logging on "0", "1" cannot init logging |
716 | {
|
724 | {
|
717 | if (buf_idx < DATALEN * 8) // index in range? |
725 | if (buf_idx < DATALEN * 8) // index in range? |
718 | { // yes |
726 | { // yes |
719 | if (val) |
727 | if (val) |
720 | {
|
728 | {
|
721 | buf[(buf_idx / 8)] |= (1<<(buf_idx % 8)); // set bit |
729 | buf[(buf_idx / 8)] |= (1<<(buf_idx % 8)); // set bit |
722 | }
|
730 | }
|
723 | else
|
731 | else
|
724 | {
|
732 | {
|
725 | buf[(buf_idx / 8)] &= ~(1<<(buf_idx % 8)); // reset bit |
733 | buf[(buf_idx / 8)] &= ~(1<<(buf_idx % 8)); // reset bit |
726 | }
|
734 | }
|
727 | 735 | ||
728 | buf_idx++;
|
736 | buf_idx++;
|
729 | }
|
737 | }
|
730 | 738 | ||
731 | if (val) |
739 | if (val) |
732 | { // if high received then look at log-stop condition |
740 | { // if high received then look at log-stop condition |
733 | cnt++;
|
741 | cnt++;
|
734 | 742 | ||
735 | if (cnt > ENDBITS) |
743 | if (cnt > ENDBITS) |
736 | { // if stop condition is true, output on uart |
744 | { // if stop condition is true, output on uart |
737 | uint16_t i; |
745 | uint16_t i; |
738 | 746 | ||
739 | for (i = 0; i < STARTCYCLES; i++) |
747 | for (i = 0; i < STARTCYCLES; i++) |
740 | {
|
748 | {
|
741 | irmp_uart_putc ('0'); // the ignored starting zeros |
749 | irmp_uart_putc ('0'); // the ignored starting zeros |
742 | }
|
750 | }
|
743 | 751 | ||
744 | for (i = 0; i < (buf_idx - ENDBITS + 20) / 8; i++) // transform bitset into uart chars |
752 | for (i = 0; i < (buf_idx - ENDBITS + 20) / 8; i++) // transform bitset into uart chars |
745 | {
|
753 | {
|
746 | uint8_t d = buf[i]; |
754 | uint8_t d = buf[i]; |
747 | uint8_t j; |
755 | uint8_t j; |
748 | 756 | ||
749 | for (j = 0; j < 8; j++) |
757 | for (j = 0; j < 8; j++) |
750 | {
|
758 | {
|
751 | irmp_uart_putc ((d & 1) + '0'); |
759 | irmp_uart_putc ((d & 1) + '0'); |
752 | d >>= 1; |
760 | d >>= 1; |
753 | }
|
761 | }
|
754 | }
|
762 | }
|
755 | 763 | ||
756 | irmp_uart_putc ('\n'); |
764 | irmp_uart_putc ('\n'); |
757 | buf_idx = 0; |
765 | buf_idx = 0; |
758 | }
|
766 | }
|
759 | }
|
767 | }
|
760 | else
|
768 | else
|
761 | {
|
769 | {
|
762 | cnt = 0; |
770 | cnt = 0; |
763 | }
|
771 | }
|
764 | }
|
772 | }
|
765 | }
|
773 | }
|
766 | }
|
774 | }
|
767 | 775 | ||
768 | #else
|
776 | #else
|
769 | #define irmp_log(val)
|
777 | #define irmp_log(val)
|
770 | #endif
|
778 | #endif
|
771 | 779 | ||
772 | typedef struct |
780 | typedef struct |
773 | {
|
781 | {
|
774 | uint8_t protocol; // ir protocol |
782 | uint8_t protocol; // ir protocol |
775 | uint8_t pulse_1_len_min; // minimum length of pulse with bit value 1 |
783 | uint8_t pulse_1_len_min; // minimum length of pulse with bit value 1 |
776 | uint8_t pulse_1_len_max; // maximum length of pulse with bit value 1 |
784 | uint8_t pulse_1_len_max; // maximum length of pulse with bit value 1 |
777 | uint8_t pause_1_len_min; // minimum length of pause with bit value 1 |
785 | uint8_t pause_1_len_min; // minimum length of pause with bit value 1 |
778 | uint8_t pause_1_len_max; // maximum length of pause with bit value 1 |
786 | uint8_t pause_1_len_max; // maximum length of pause with bit value 1 |
779 | uint8_t pulse_0_len_min; // minimum length of pulse with bit value 0 |
787 | uint8_t pulse_0_len_min; // minimum length of pulse with bit value 0 |
780 | uint8_t pulse_0_len_max; // maximum length of pulse with bit value 0 |
788 | uint8_t pulse_0_len_max; // maximum length of pulse with bit value 0 |
781 | uint8_t pause_0_len_min; // minimum length of pause with bit value 0 |
789 | uint8_t pause_0_len_min; // minimum length of pause with bit value 0 |
782 | uint8_t pause_0_len_max; // maximum length of pause with bit value 0 |
790 | uint8_t pause_0_len_max; // maximum length of pause with bit value 0 |
783 | uint8_t address_offset; // address offset |
791 | uint8_t address_offset; // address offset |
784 | uint8_t address_end; // end of address |
792 | uint8_t address_end; // end of address |
785 | uint8_t command_offset; // command offset |
793 | uint8_t command_offset; // command offset |
786 | uint8_t command_end; // end of command |
794 | uint8_t command_end; // end of command |
787 | uint8_t complete_len; // complete length of frame |
795 | uint8_t complete_len; // complete length of frame |
788 | uint8_t stop_bit; // flag: frame has stop bit |
796 | uint8_t stop_bit; // flag: frame has stop bit |
789 | uint8_t lsb_first; // flag: LSB first |
797 | uint8_t lsb_first; // flag: LSB first |
790 | uint8_t flags; // some flags |
798 | uint8_t flags; // some flags |
791 | } IRMP_PARAMETER; |
799 | } IRMP_PARAMETER; |
792 | 800 | ||
793 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1
|
801 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1
|
794 | 802 | ||
795 | static PROGMEM IRMP_PARAMETER sircs_param = |
803 | static PROGMEM IRMP_PARAMETER sircs_param = |
796 | {
|
804 | {
|
797 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol |
805 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol |
798 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
806 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
799 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
807 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
800 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
808 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
801 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
809 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
802 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
810 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
803 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
811 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
804 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
812 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
805 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
813 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
806 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset |
814 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset |
807 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address |
815 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address |
808 | SIRCS_COMMAND_OFFSET, // command_offset: command offset |
816 | SIRCS_COMMAND_OFFSET, // command_offset: command offset |
809 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command |
817 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command |
810 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
818 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
811 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit |
819 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit |
812 | SIRCS_LSB, // lsb_first: flag: LSB first |
820 | SIRCS_LSB, // lsb_first: flag: LSB first |
813 | SIRCS_FLAGS // flags: some flags
|
821 | SIRCS_FLAGS // flags: some flags
|
814 | }; |
822 | }; |
815 | 823 | ||
816 | #endif
|
824 | #endif
|
817 | 825 | ||
818 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1
|
826 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1
|
819 | 827 | ||
820 | static PROGMEM IRMP_PARAMETER nec_param = |
828 | static PROGMEM IRMP_PARAMETER nec_param = |
821 | {
|
829 | {
|
822 | IRMP_NEC_PROTOCOL, // protocol: ir protocol |
830 | IRMP_NEC_PROTOCOL, // protocol: ir protocol |
823 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
831 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
824 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
832 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
825 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
833 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
826 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
834 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
827 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
835 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
828 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
836 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
829 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
837 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
830 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
838 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
831 | NEC_ADDRESS_OFFSET, // address_offset: address offset |
839 | NEC_ADDRESS_OFFSET, // address_offset: address offset |
832 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address |
840 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address |
833 | NEC_COMMAND_OFFSET, // command_offset: command offset |
841 | NEC_COMMAND_OFFSET, // command_offset: command offset |
834 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command |
842 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command |
835 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
843 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
836 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit |
844 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit |
837 | NEC_LSB, // lsb_first: flag: LSB first |
845 | NEC_LSB, // lsb_first: flag: LSB first |
838 | NEC_FLAGS // flags: some flags
|
846 | NEC_FLAGS // flags: some flags
|
839 | }; |
847 | }; |
840 | 848 | ||
841 | static PROGMEM IRMP_PARAMETER nec_rep_param = |
849 | static PROGMEM IRMP_PARAMETER nec_rep_param = |
842 | {
|
850 | {
|
843 | IRMP_NEC_PROTOCOL, // protocol: ir protocol |
851 | IRMP_NEC_PROTOCOL, // protocol: ir protocol |
844 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
852 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
845 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
853 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
846 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
854 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
847 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
855 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
848 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
856 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
849 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
857 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
850 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
858 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
851 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
859 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
852 | 0, // address_offset: address offset |
860 | 0, // address_offset: address offset |
853 | 0, // address_end: end of address |
861 | 0, // address_end: end of address |
854 | 0, // command_offset: command offset |
862 | 0, // command_offset: command offset |
855 | 0, // command_end: end of command |
863 | 0, // command_end: end of command |
856 | 0, // complete_len: complete length of frame |
864 | 0, // complete_len: complete length of frame |
857 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit |
865 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit |
858 | NEC_LSB, // lsb_first: flag: LSB first |
866 | NEC_LSB, // lsb_first: flag: LSB first |
859 | NEC_FLAGS // flags: some flags
|
867 | NEC_FLAGS // flags: some flags
|
860 | }; |
868 | }; |
861 | 869 | ||
862 | #endif
|
870 | #endif
|
863 | 871 | ||
864 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
872 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
865 | 873 | ||
866 | static PROGMEM IRMP_PARAMETER samsung_param = |
874 | static PROGMEM IRMP_PARAMETER samsung_param = |
867 | {
|
875 | {
|
868 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol |
876 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol |
869 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
877 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
870 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
878 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
871 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
879 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
872 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
880 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
873 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
881 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
874 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
882 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
875 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
883 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
876 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
884 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
877 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset |
885 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset |
878 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address |
886 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address |
879 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset |
887 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset |
880 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command |
888 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command |
881 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
889 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
882 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit |
890 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit |
883 | SAMSUNG_LSB, // lsb_first: flag: LSB first |
891 | SAMSUNG_LSB, // lsb_first: flag: LSB first |
884 | SAMSUNG_FLAGS // flags: some flags
|
892 | SAMSUNG_FLAGS // flags: some flags
|
885 | }; |
893 | }; |
886 | 894 | ||
887 | #endif
|
895 | #endif
|
888 | 896 | ||
889 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1
|
897 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1
|
890 | 898 | ||
891 | static PROGMEM IRMP_PARAMETER matsushita_param = |
899 | static PROGMEM IRMP_PARAMETER matsushita_param = |
892 | {
|
900 | {
|
893 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol |
901 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol |
894 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
902 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
895 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
903 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
896 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
904 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
897 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
905 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
898 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
906 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
899 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
907 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
900 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
908 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
901 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
909 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
902 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset |
910 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset |
903 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address |
911 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address |
904 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset |
912 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset |
905 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command |
913 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command |
906 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
914 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
907 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit |
915 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit |
908 | MATSUSHITA_LSB, // lsb_first: flag: LSB first |
916 | MATSUSHITA_LSB, // lsb_first: flag: LSB first |
909 | MATSUSHITA_FLAGS // flags: some flags
|
917 | MATSUSHITA_FLAGS // flags: some flags
|
910 | }; |
918 | }; |
911 | 919 | ||
912 | #endif
|
920 | #endif
|
913 | 921 | ||
914 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
922 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
915 | 923 | ||
916 | static PROGMEM IRMP_PARAMETER kaseikyo_param = |
924 | static PROGMEM IRMP_PARAMETER kaseikyo_param = |
917 | {
|
925 | {
|
918 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol |
926 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol |
919 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
927 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
920 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
928 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
921 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
929 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
922 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
930 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
923 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
931 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
924 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
932 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
925 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
933 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
926 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
934 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
927 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset |
935 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset |
928 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address |
936 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address |
929 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset |
937 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset |
930 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command |
938 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command |
931 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
939 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
932 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit |
940 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit |
933 | KASEIKYO_LSB, // lsb_first: flag: LSB first |
941 | KASEIKYO_LSB, // lsb_first: flag: LSB first |
934 | KASEIKYO_FLAGS // flags: some flags
|
942 | KASEIKYO_FLAGS // flags: some flags
|
935 | }; |
943 | }; |
936 | 944 | ||
937 | #endif
|
945 | #endif
|
938 | 946 | ||
939 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1
|
947 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1
|
940 | 948 | ||
941 | static PROGMEM IRMP_PARAMETER recs80_param = |
949 | static PROGMEM IRMP_PARAMETER recs80_param = |
942 | {
|
950 | {
|
943 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol |
951 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol |
944 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
952 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
945 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
953 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
946 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
954 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
947 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
955 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
948 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
956 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
949 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
957 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
950 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
958 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
951 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
959 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
952 | RECS80_ADDRESS_OFFSET, // address_offset: address offset |
960 | RECS80_ADDRESS_OFFSET, // address_offset: address offset |
953 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address |
961 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address |
954 | RECS80_COMMAND_OFFSET, // command_offset: command offset |
962 | RECS80_COMMAND_OFFSET, // command_offset: command offset |
955 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command |
963 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command |
956 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
964 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
957 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit |
965 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit |
958 | RECS80_LSB, // lsb_first: flag: LSB first |
966 | RECS80_LSB, // lsb_first: flag: LSB first |
959 | RECS80_FLAGS // flags: some flags
|
967 | RECS80_FLAGS // flags: some flags
|
960 | }; |
968 | }; |
961 | 969 | ||
962 | #endif
|
970 | #endif
|
963 | 971 | ||
964 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
972 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
965 | 973 | ||
966 | static PROGMEM IRMP_PARAMETER rc5_param = |
974 | static PROGMEM IRMP_PARAMETER rc5_param = |
967 | {
|
975 | {
|
968 | IRMP_RC5_PROTOCOL, // protocol: ir protocol |
976 | IRMP_RC5_PROTOCOL, // protocol: ir protocol |
969 | RC5_BIT_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
977 | RC5_BIT_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
970 | RC5_BIT_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
978 | RC5_BIT_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
971 | RC5_BIT_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
979 | RC5_BIT_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
972 | RC5_BIT_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
980 | RC5_BIT_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
973 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
981 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
974 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
982 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
975 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
983 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
976 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
984 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
977 | RC5_ADDRESS_OFFSET, // address_offset: address offset |
985 | RC5_ADDRESS_OFFSET, // address_offset: address offset |
978 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address |
986 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address |
979 | RC5_COMMAND_OFFSET, // command_offset: command offset |
987 | RC5_COMMAND_OFFSET, // command_offset: command offset |
980 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command |
988 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command |
981 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
989 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
982 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit |
990 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit |
983 | RC5_LSB, // lsb_first: flag: LSB first |
991 | RC5_LSB, // lsb_first: flag: LSB first |
984 | RC5_FLAGS // flags: some flags
|
992 | RC5_FLAGS // flags: some flags
|
985 | }; |
993 | }; |
986 | 994 | ||
987 | #endif
|
995 | #endif
|
988 | 996 | ||
989 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1
|
997 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1
|
990 | 998 | ||
991 | static PROGMEM IRMP_PARAMETER denon_param = |
999 | static PROGMEM IRMP_PARAMETER denon_param = |
992 | {
|
1000 | {
|
993 | IRMP_DENON_PROTOCOL, // protocol: ir protocol |
1001 | IRMP_DENON_PROTOCOL, // protocol: ir protocol |
994 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1002 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
995 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1003 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
996 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1004 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
997 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1005 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
998 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1006 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
999 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1007 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1000 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1008 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1001 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1009 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1002 | DENON_ADDRESS_OFFSET, // address_offset: address offset |
1010 | DENON_ADDRESS_OFFSET, // address_offset: address offset |
1003 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address |
1011 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address |
1004 | DENON_COMMAND_OFFSET, // command_offset: command offset |
1012 | DENON_COMMAND_OFFSET, // command_offset: command offset |
1005 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command |
1013 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command |
1006 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1014 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1007 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit |
1015 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit |
1008 | DENON_LSB, // lsb_first: flag: LSB first |
1016 | DENON_LSB, // lsb_first: flag: LSB first |
1009 | DENON_FLAGS // flags: some flags
|
1017 | DENON_FLAGS // flags: some flags
|
1010 | }; |
1018 | }; |
1011 | 1019 | ||
1012 | #endif
|
1020 | #endif
|
1013 | 1021 | ||
1014 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1
|
1022 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1
|
1015 | 1023 | ||
1016 | static PROGMEM IRMP_PARAMETER rc6_param = |
1024 | static PROGMEM IRMP_PARAMETER rc6_param = |
1017 | {
|
1025 | {
|
1018 | IRMP_RC6_PROTOCOL, // protocol: ir protocol |
1026 | IRMP_RC6_PROTOCOL, // protocol: ir protocol |
1019 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1027 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1020 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1028 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1021 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1029 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1022 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1030 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1023 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
1031 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
1024 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1032 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1025 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
1033 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
1026 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
1034 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
1027 | RC6_ADDRESS_OFFSET, // address_offset: address offset |
1035 | RC6_ADDRESS_OFFSET, // address_offset: address offset |
1028 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address |
1036 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address |
1029 | RC6_COMMAND_OFFSET, // command_offset: command offset |
1037 | RC6_COMMAND_OFFSET, // command_offset: command offset |
1030 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command |
1038 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command |
1031 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame |
1039 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame |
1032 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit |
1040 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit |
1033 | RC6_LSB, // lsb_first: flag: LSB first |
1041 | RC6_LSB, // lsb_first: flag: LSB first |
1034 | RC6_FLAGS // flags: some flags
|
1042 | RC6_FLAGS // flags: some flags
|
1035 | }; |
1043 | }; |
1036 | 1044 | ||
1037 | #endif
|
1045 | #endif
|
1038 | 1046 | ||
1039 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1
|
1047 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1
|
1040 | 1048 | ||
1041 | static PROGMEM IRMP_PARAMETER recs80ext_param = |
1049 | static PROGMEM IRMP_PARAMETER recs80ext_param = |
1042 | {
|
1050 | {
|
1043 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol |
1051 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol |
1044 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1052 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1045 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1053 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1046 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1054 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1047 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1055 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1048 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1056 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1049 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1057 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1050 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1058 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1051 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1059 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1052 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset |
1060 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset |
1053 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address |
1061 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address |
1054 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset |
1062 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset |
1055 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command |
1063 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command |
1056 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1064 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1057 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit |
1065 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit |
1058 | RECS80EXT_LSB, // lsb_first: flag: LSB first |
1066 | RECS80EXT_LSB, // lsb_first: flag: LSB first |
1059 | RECS80EXT_FLAGS // flags: some flags
|
1067 | RECS80EXT_FLAGS // flags: some flags
|
1060 | }; |
1068 | }; |
1061 | 1069 | ||
1062 | #endif
|
1070 | #endif
|
1063 | 1071 | ||
1064 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1
|
1072 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1
|
1065 | 1073 | ||
1066 | static PROGMEM IRMP_PARAMETER nubert_param = |
1074 | static PROGMEM IRMP_PARAMETER nubert_param = |
1067 | {
|
1075 | {
|
1068 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol |
1076 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol |
1069 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1077 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1070 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1078 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1071 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1079 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1072 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1080 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1073 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1081 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1074 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1082 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1075 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1083 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1076 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1084 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1077 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset |
1085 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset |
1078 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address |
1086 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address |
1079 | NUBERT_COMMAND_OFFSET, // command_offset: command offset |
1087 | NUBERT_COMMAND_OFFSET, // command_offset: command offset |
1080 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command |
1088 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command |
1081 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1089 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1082 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit |
1090 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit |
1083 | NUBERT_LSB, // lsb_first: flag: LSB first |
1091 | NUBERT_LSB, // lsb_first: flag: LSB first |
1084 | NUBERT_FLAGS // flags: some flags
|
1092 | NUBERT_FLAGS // flags: some flags
|
1085 | }; |
1093 | }; |
1086 | 1094 | ||
1087 | #endif
|
1095 | #endif
|
1088 | 1096 | ||
1089 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
|
1097 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
|
1090 | 1098 | ||
1091 | static PROGMEM IRMP_PARAMETER bang_olufsen_param = |
1099 | static PROGMEM IRMP_PARAMETER bang_olufsen_param = |
1092 | {
|
1100 | {
|
1093 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol |
1101 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol |
1094 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1102 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1095 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1103 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1096 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1104 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1097 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1105 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1098 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1106 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1099 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1107 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1100 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1108 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1101 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1109 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1102 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset |
1110 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset |
1103 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address |
1111 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address |
1104 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset |
1112 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset |
1105 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command |
1113 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command |
1106 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1114 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1107 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit |
1115 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit |
1108 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first |
1116 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first |
1109 | BANG_OLUFSEN_FLAGS // flags: some flags
|
1117 | BANG_OLUFSEN_FLAGS // flags: some flags
|
1110 | }; |
1118 | }; |
1111 | 1119 | ||
1112 | #endif
|
1120 | #endif
|
1113 | 1121 | ||
1114 | #if IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1
|
1122 | #if IRMP_SUPPORT_GRUNDIG_OR_NOKIA_PROTOCOL == 1
|
1115 | 1123 | ||
1116 | static PROGMEM IRMP_PARAMETER grundig_param = |
1124 | static PROGMEM IRMP_PARAMETER grundig_param = |
1117 | {
|
1125 | {
|
1118 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol |
1126 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol |
1119 | GRUNDIG_OR_NOKIA_BIT_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1127 | GRUNDIG_OR_NOKIA_BIT_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1120 | GRUNDIG_OR_NOKIA_BIT_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1128 | GRUNDIG_OR_NOKIA_BIT_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1121 | GRUNDIG_OR_NOKIA_BIT_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1129 | GRUNDIG_OR_NOKIA_BIT_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1122 | GRUNDIG_OR_NOKIA_BIT_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1130 | GRUNDIG_OR_NOKIA_BIT_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1123 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
1131 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
1124 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1132 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1125 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
1133 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
1126 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
1134 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
1127 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset |
1135 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset |
1128 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address |
1136 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address |
1129 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset |
1137 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset |
1130 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!) |
1138 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!) |
1131 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG! |
1139 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG! |
1132 | GRUNDIG_OR_NOKIA_STOP_BIT, // stop_bit: flag: frame has stop bit |
1140 | GRUNDIG_OR_NOKIA_STOP_BIT, // stop_bit: flag: frame has stop bit |
1133 | GRUNDIG_OR_NOKIA_LSB, // lsb_first: flag: LSB first |
1141 | GRUNDIG_OR_NOKIA_LSB, // lsb_first: flag: LSB first |
1134 | GRUNDIG_OR_NOKIA_FLAGS // flags: some flags
|
1142 | GRUNDIG_OR_NOKIA_FLAGS // flags: some flags
|
1135 | }; |
1143 | }; |
1136 | 1144 | ||
1137 | #endif
|
1145 | #endif
|
1138 | 1146 | ||
1139 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1
|
1147 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1
|
1140 | 1148 | ||
1141 | static PROGMEM IRMP_PARAMETER siemens_param = |
1149 | static PROGMEM IRMP_PARAMETER siemens_param = |
1142 | {
|
1150 | {
|
1143 | IRMP_SIEMENS_PROTOCOL, // protocol: ir protocol |
1151 | IRMP_SIEMENS_PROTOCOL, // protocol: ir protocol |
1144 | SIEMENS_BIT_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1152 | SIEMENS_BIT_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1145 | SIEMENS_BIT_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1153 | SIEMENS_BIT_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1146 | SIEMENS_BIT_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1154 | SIEMENS_BIT_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1147 | SIEMENS_BIT_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1155 | SIEMENS_BIT_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1148 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
1156 | 1, // tricky: use this as stop bit length // pulse_0_len_min: minimum length of pulse with bit value 0 |
1149 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1157 | 1, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1150 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
1158 | 1, // pause_0_len_min: minimum length of pause with bit value 0 |
1151 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
1159 | 1, // pause_0_len_max: maximum length of pause with bit value 0 |
1152 | SIEMENS_ADDRESS_OFFSET, // address_offset: address offset |
1160 | SIEMENS_ADDRESS_OFFSET, // address_offset: address offset |
1153 | SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN, // address_end: end of address |
1161 | SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN, // address_end: end of address |
1154 | SIEMENS_COMMAND_OFFSET, // command_offset: command offset |
1162 | SIEMENS_COMMAND_OFFSET, // command_offset: command offset |
1155 | SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN, // command_end: end of command |
1163 | SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN, // command_end: end of command |
1156 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1164 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1157 | SIEMENS_STOP_BIT, // stop_bit: flag: frame has stop bit |
1165 | SIEMENS_STOP_BIT, // stop_bit: flag: frame has stop bit |
1158 | SIEMENS_LSB, // lsb_first: flag: LSB first |
1166 | SIEMENS_LSB, // lsb_first: flag: LSB first |
1159 | SIEMENS_FLAGS // flags: some flags
|
1167 | SIEMENS_FLAGS // flags: some flags
|
1160 | }; |
1168 | }; |
1161 | 1169 | ||
1162 | #endif
|
1170 | #endif
|
1163 | 1171 | ||
1164 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1
|
1172 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1
|
1165 | 1173 | ||
1166 | static PROGMEM IRMP_PARAMETER fdc_param = |
1174 | static PROGMEM IRMP_PARAMETER fdc_param = |
1167 | {
|
1175 | {
|
1168 | IRMP_FDC_PROTOCOL, // protocol: ir protocol |
1176 | IRMP_FDC_PROTOCOL, // protocol: ir protocol |
1169 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1177 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1170 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1178 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1171 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1179 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1172 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1180 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1173 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1181 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1174 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1182 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1175 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1183 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1176 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1184 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1177 | FDC_ADDRESS_OFFSET, // address_offset: address offset |
1185 | FDC_ADDRESS_OFFSET, // address_offset: address offset |
1178 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address |
1186 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address |
1179 | FDC_COMMAND_OFFSET, // command_offset: command offset |
1187 | FDC_COMMAND_OFFSET, // command_offset: command offset |
1180 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command |
1188 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command |
1181 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1189 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1182 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit |
1190 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit |
1183 | FDC_LSB, // lsb_first: flag: LSB first |
1191 | FDC_LSB, // lsb_first: flag: LSB first |
1184 | FDC_FLAGS // flags: some flags
|
1192 | FDC_FLAGS // flags: some flags
|
1185 | }; |
1193 | }; |
1186 | 1194 | ||
1187 | #endif
|
1195 | #endif
|
1188 | 1196 | ||
1189 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1197 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1190 | 1198 | ||
1191 | static PROGMEM IRMP_PARAMETER rccar_param = |
1199 | static PROGMEM IRMP_PARAMETER rccar_param = |
1192 | {
|
1200 | {
|
1193 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol |
1201 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol |
1194 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1202 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1195 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1203 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1196 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1204 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1197 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1205 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1198 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1206 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1199 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1207 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1200 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1208 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1201 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1209 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1202 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset |
1210 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset |
1203 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address |
1211 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address |
1204 | RCCAR_COMMAND_OFFSET, // command_offset: command offset |
1212 | RCCAR_COMMAND_OFFSET, // command_offset: command offset |
1205 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command |
1213 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command |
1206 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1214 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1207 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit |
1215 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit |
1208 | RCCAR_LSB, // lsb_first: flag: LSB first |
1216 | RCCAR_LSB, // lsb_first: flag: LSB first |
1209 | RCCAR_FLAGS // flags: some flags
|
1217 | RCCAR_FLAGS // flags: some flags
|
1210 | }; |
1218 | }; |
1211 | 1219 | ||
1212 | #endif
|
1220 | #endif
|
1213 | 1221 | ||
1214 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1222 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1215 | 1223 | ||
1216 | static PROGMEM IRMP_PARAMETER nikon_param = |
1224 | static PROGMEM IRMP_PARAMETER nikon_param = |
1217 | {
|
1225 | {
|
1218 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol |
1226 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol |
1219 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1227 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1 |
1220 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1228 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1 |
1221 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1229 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1 |
1222 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1230 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1 |
1223 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1231 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0 |
1224 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1232 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0 |
1225 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1233 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0 |
1226 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1234 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0 |
1227 | NIKON_ADDRESS_OFFSET, // address_offset: address offset |
1235 | NIKON_ADDRESS_OFFSET, // address_offset: address offset |
1228 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address |
1236 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address |
1229 | NIKON_COMMAND_OFFSET, // command_offset: command offset |
1237 | NIKON_COMMAND_OFFSET, // command_offset: command offset |
1230 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command |
1238 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command |
1231 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1239 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame |
1232 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit |
1240 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit |
1233 | NIKON_LSB, // lsb_first: flag: LSB first |
1241 | NIKON_LSB, // lsb_first: flag: LSB first |
1234 | NIKON_FLAGS // flags: some flags
|
1242 | NIKON_FLAGS // flags: some flags
|
1235 | }; |
1243 | }; |
1236 | 1244 | ||
1237 | #endif
|
1245 | #endif
|
1238 | 1246 | ||
1239 | static uint8_t irmp_bit; // current bit position |
1247 | static uint8_t irmp_bit; // current bit position |
1240 | static IRMP_PARAMETER irmp_param; |
1248 | static IRMP_PARAMETER irmp_param; |
1241 | 1249 | ||
1242 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1250 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1243 | static IRMP_PARAMETER irmp_param2; |
1251 | static IRMP_PARAMETER irmp_param2; |
1244 | #endif
|
1252 | #endif
|
1245 | 1253 | ||
1246 | static volatile uint8_t irmp_ir_detected; |
1254 | static volatile uint8_t irmp_ir_detected; |
1247 | static volatile uint8_t irmp_protocol; |
1255 | static volatile uint8_t irmp_protocol; |
1248 | static volatile uint16_t irmp_address; |
1256 | static volatile uint16_t irmp_address; |
1249 | static volatile uint16_t irmp_command; |
1257 | static volatile uint16_t irmp_command; |
1250 | static volatile uint16_t irmp_id; // only used for SAMSUNG protocol |
1258 | static volatile uint16_t irmp_id; // only used for SAMSUNG protocol |
1251 | static volatile uint8_t irmp_flags; |
1259 | static volatile uint8_t irmp_flags; |
1252 | 1260 | ||
1253 | #ifdef ANALYZE
|
1261 | #ifdef ANALYZE
|
1254 | static uint8_t IRMP_PIN; |
1262 | static uint8_t IRMP_PIN; |
1255 | #endif
|
1263 | #endif
|
1256 | 1264 | ||
1257 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1265 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1258 | * Initialize IRMP decoder
|
1266 | * Initialize IRMP decoder
|
1259 | * @details Configures IRMP input pin
|
1267 | * @details Configures IRMP input pin
|
1260 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1268 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1261 | */
|
1269 | */
|
1262 | #ifndef ANALYZE
|
1270 | #ifndef ANALYZE
|
1263 | void
|
1271 | void
|
1264 | irmp_init (void) |
1272 | irmp_init (void) |
1265 | {
|
1273 | {
|
1266 | #ifndef PIC_CCS_COMPILER
|
1274 | #ifndef PIC_CCS_COMPILER
|
1267 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup |
1275 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup |
1268 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input |
1276 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input |
1269 | #endif // PIC_CCS_COMPILER
|
1277 | #endif // PIC_CCS_COMPILER
|
1270 | 1278 | ||
1271 | #if IRMP_LOGGING == 1
|
1279 | #if IRMP_LOGGING == 1
|
1272 | irmp_uart_init (); |
1280 | irmp_uart_init (); |
1273 | #endif
|
1281 | #endif
|
1274 | }
|
1282 | }
|
1275 | #endif
|
1283 | #endif
|
1276 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1284 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1277 | * Get IRMP data
|
1285 | * Get IRMP data
|
1278 | * @details gets decoded IRMP data
|
1286 | * @details gets decoded IRMP data
|
1279 | * @param pointer in order to store IRMP data
|
1287 | * @param pointer in order to store IRMP data
|
1280 | * @return TRUE: successful, FALSE: failed
|
1288 | * @return TRUE: successful, FALSE: failed
|
1281 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1289 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1282 | */
|
1290 | */
|
1283 | uint8_t
|
1291 | uint8_t
|
1284 | irmp_get_data (IRMP_DATA * irmp_data_p) |
1292 | irmp_get_data (IRMP_DATA * irmp_data_p) |
1285 | {
|
1293 | {
|
1286 | uint8_t rtc = FALSE; |
1294 | uint8_t rtc = FALSE; |
1287 | 1295 | ||
1288 | if (irmp_ir_detected) |
1296 | if (irmp_ir_detected) |
1289 | {
|
1297 | {
|
1290 | switch (irmp_protocol) |
1298 | switch (irmp_protocol) |
1291 | {
|
1299 | {
|
1292 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1300 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1293 | case IRMP_SAMSUNG_PROTOCOL: |
1301 | case IRMP_SAMSUNG_PROTOCOL: |
1294 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF)) |
1302 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF)) |
1295 | {
|
1303 | {
|
1296 | irmp_command &= 0xff; |
1304 | irmp_command &= 0xff; |
1297 | irmp_command |= irmp_id << 8; |
1305 | irmp_command |= irmp_id << 8; |
1298 | rtc = TRUE; |
1306 | rtc = TRUE; |
1299 | }
|
1307 | }
|
1300 | break; |
1308 | break; |
1301 | #endif
|
1309 | #endif
|
1302 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1
|
1310 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1
|
1303 | case IRMP_NEC_PROTOCOL: |
1311 | case IRMP_NEC_PROTOCOL: |
1304 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF)) |
1312 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF)) |
1305 | {
|
1313 | {
|
1306 | irmp_command &= 0xff; |
1314 | irmp_command &= 0xff; |
1307 | rtc = TRUE; |
1315 | rtc = TRUE; |
1308 | }
|
1316 | }
|
1309 | else if (irmp_address == 0x87EE) |
1317 | else if (irmp_address == 0x87EE) |
1310 | {
|
1318 | {
|
1311 | ANALYZE_PRINTF ("Switching to APPLE protocol\n"); |
1319 | ANALYZE_PRINTF ("Switching to APPLE protocol\n"); |
1312 | irmp_protocol = IRMP_APPLE_PROTOCOL; |
1320 | irmp_protocol = IRMP_APPLE_PROTOCOL; |
1313 | irmp_address = (irmp_command & 0xFF00) >> 8; |
1321 | irmp_address = (irmp_command & 0xFF00) >> 8; |
1314 | irmp_command &= 0x00FF; |
1322 | irmp_command &= 0x00FF; |
1315 | rtc = TRUE; |
1323 | rtc = TRUE; |
1316 | }
|
1324 | }
|
1317 | break; |
1325 | break; |
1318 | #endif
|
1326 | #endif
|
1319 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1
|
1327 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1
|
1320 | case IRMP_SIEMENS_PROTOCOL: |
1328 | case IRMP_SIEMENS_PROTOCOL: |
1321 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001)) |
1329 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001)) |
1322 | {
|
1330 | {
|
1323 | irmp_command >>= 1; |
1331 | irmp_command >>= 1; |
1324 | rtc = TRUE; |
1332 | rtc = TRUE; |
1325 | }
|
1333 | }
|
1326 | break; |
1334 | break; |
1327 | #endif
|
1335 | #endif
|
1328 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1336 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1329 | case IRMP_RCCAR_PROTOCOL: |
1337 | case IRMP_RCCAR_PROTOCOL: |
1330 | // frame in irmp_data:
|
1338 | // frame in irmp_data:
|
1331 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0
|
1339 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0
|
1332 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0
|
1340 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0
|
1333 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0 |
1341 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0 |
1334 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0 |
1342 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0 |
1335 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0 |
1343 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0 |
1336 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0 |
1344 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0 |
1337 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0 |
1345 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0 |
1338 | break; |
1346 | break; |
1339 | #endif
|
1347 | #endif
|
1340 | default: |
1348 | default: |
1341 | rtc = TRUE; |
1349 | rtc = TRUE; |
1342 | }
|
1350 | }
|
1343 | 1351 | ||
1344 | if (rtc) |
1352 | if (rtc) |
1345 | {
|
1353 | {
|
1346 | irmp_data_p->protocol = irmp_protocol; |
1354 | irmp_data_p->protocol = irmp_protocol; |
1347 | irmp_data_p->address = irmp_address; |
1355 | irmp_data_p->address = irmp_address; |
1348 | irmp_data_p->command = irmp_command; |
1356 | irmp_data_p->command = irmp_command; |
1349 | irmp_data_p->flags = irmp_flags; |
1357 | irmp_data_p->flags = irmp_flags; |
1350 | irmp_command = 0; |
1358 | irmp_command = 0; |
1351 | irmp_address = 0; |
1359 | irmp_address = 0; |
1352 | irmp_flags = 0; |
1360 | irmp_flags = 0; |
1353 | }
|
1361 | }
|
1354 | 1362 | ||
1355 | irmp_ir_detected = FALSE; |
1363 | irmp_ir_detected = FALSE; |
1356 | }
|
1364 | }
|
1357 | 1365 | ||
1358 | return rtc; |
1366 | return rtc; |
1359 | }
|
1367 | }
|
1360 | 1368 | ||
1361 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()
|
1369 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()
|
1362 | static uint16_t irmp_tmp_address; // ir address |
1370 | static uint16_t irmp_tmp_address; // ir address |
1363 | static uint16_t irmp_tmp_command; // ir command |
1371 | static uint16_t irmp_tmp_command; // ir command |
1364 | 1372 | ||
1365 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1373 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1366 | static uint16_t irmp_tmp_address2; // ir address |
1374 | static uint16_t irmp_tmp_address2; // ir address |
1367 | static uint16_t irmp_tmp_command2; // ir command |
1375 | static uint16_t irmp_tmp_command2; // ir command |
1368 | #endif
|
1376 | #endif
|
1369 | 1377 | ||
1370 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1378 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1371 | static uint16_t irmp_tmp_id; // ir id (only SAMSUNG) |
1379 | static uint16_t irmp_tmp_id; // ir id (only SAMSUNG) |
1372 | #endif
|
1380 | #endif
|
1373 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1381 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1374 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits |
1382 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits |
1375 | #endif
|
1383 | #endif
|
1376 | 1384 | ||
1377 | static uint8_t irmp_bit; // current bit position |
1385 | static uint8_t irmp_bit; // current bit position |
1378 | 1386 | ||
1379 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1387 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1380 | * store bit
|
1388 | * store bit
|
1381 | * @details store bit in temp address or temp command
|
1389 | * @details store bit in temp address or temp command
|
1382 | * @param value to store: 0 or 1
|
1390 | * @param value to store: 0 or 1
|
1383 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1391 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1384 | */
|
1392 | */
|
1385 | // verhindert, dass irmp_store_bit() inline compiliert wird:
|
1393 | // verhindert, dass irmp_store_bit() inline compiliert wird:
|
1386 | // static void irmp_store_bit (uint8_t) __attribute__ ((noinline));
|
1394 | // static void irmp_store_bit (uint8_t) __attribute__ ((noinline));
|
1387 | 1395 | ||
1388 | static void |
1396 | static void |
1389 | irmp_store_bit (uint8_t value) |
1397 | irmp_store_bit (uint8_t value) |
1390 | {
|
1398 | {
|
1391 | 1399 | ||
1392 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end) |
1400 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end) |
1393 | {
|
1401 | {
|
1394 | if (irmp_param.lsb_first) |
1402 | if (irmp_param.lsb_first) |
1395 | {
|
1403 | {
|
1396 | irmp_tmp_address |= (((uint16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast |
1404 | irmp_tmp_address |= (((uint16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast |
1397 | }
|
1405 | }
|
1398 | else
|
1406 | else
|
1399 | {
|
1407 | {
|
1400 | irmp_tmp_address <<= 1; |
1408 | irmp_tmp_address <<= 1; |
1401 | irmp_tmp_address |= value; |
1409 | irmp_tmp_address |= value; |
1402 | }
|
1410 | }
|
1403 | }
|
1411 | }
|
1404 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end) |
1412 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end) |
1405 | {
|
1413 | {
|
1406 | if (irmp_param.lsb_first) |
1414 | if (irmp_param.lsb_first) |
1407 | {
|
1415 | {
|
1408 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast |
1416 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast |
1409 | }
|
1417 | }
|
1410 | else
|
1418 | else
|
1411 | {
|
1419 | {
|
1412 | irmp_tmp_command <<= 1; |
1420 | irmp_tmp_command <<= 1; |
1413 | irmp_tmp_command |= value; |
1421 | irmp_tmp_command |= value; |
1414 | }
|
1422 | }
|
1415 | }
|
1423 | }
|
1416 | 1424 | ||
1417 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1425 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1418 | else if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN) |
1426 | else if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN) |
1419 | {
|
1427 | {
|
1420 | irmp_tmp_id |= (((uint16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first |
1428 | irmp_tmp_id |= (((uint16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first |
1421 | }
|
1429 | }
|
1422 | #endif
|
1430 | #endif
|
1423 | 1431 | ||
1424 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1432 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1425 | else if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && irmp_bit >= 20 && irmp_bit < 24) |
1433 | else if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && irmp_bit >= 20 && irmp_bit < 24) |
1426 | {
|
1434 | {
|
1427 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - 8)); // store 4 system bits in upper nibble with LSB first |
1435 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - 8)); // store 4 system bits in upper nibble with LSB first |
1428 | }
|
1436 | }
|
1429 | 1437 | ||
1430 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && irmp_bit < KASEIKYO_COMPLETE_DATA_LEN) |
1438 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && irmp_bit < KASEIKYO_COMPLETE_DATA_LEN) |
1431 | {
|
1439 | {
|
1432 | if (value) |
1440 | if (value) |
1433 | {
|
1441 | {
|
1434 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8); |
1442 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8); |
1435 | }
|
1443 | }
|
1436 | else
|
1444 | else
|
1437 | {
|
1445 | {
|
1438 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8)); |
1446 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8)); |
1439 | }
|
1447 | }
|
1440 | }
|
1448 | }
|
1441 | 1449 | ||
1442 | #endif
|
1450 | #endif
|
1443 | 1451 | ||
1444 | irmp_bit++;
|
1452 | irmp_bit++;
|
1445 | }
|
1453 | }
|
1446 | 1454 | ||
1447 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1455 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1448 | * store bit
|
1456 | * store bit
|
1449 | * @details store bit in temp address or temp command
|
1457 | * @details store bit in temp address or temp command
|
1450 | * @param value to store: 0 or 1
|
1458 | * @param value to store: 0 or 1
|
1451 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1459 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1452 | */
|
1460 | */
|
1453 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1461 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1454 | static void |
1462 | static void |
1455 | irmp_store_bit2 (uint8_t value) |
1463 | irmp_store_bit2 (uint8_t value) |
1456 | {
|
1464 | {
|
1457 | uint8_t irmp_bit2; |
1465 | uint8_t irmp_bit2; |
1458 | 1466 | ||
1459 | if (irmp_param.protocol) |
1467 | if (irmp_param.protocol) |
1460 | {
|
1468 | {
|
1461 | irmp_bit2 = irmp_bit - 2; |
1469 | irmp_bit2 = irmp_bit - 2; |
1462 | }
|
1470 | }
|
1463 | else
|
1471 | else
|
1464 | {
|
1472 | {
|
1465 | irmp_bit2 = irmp_bit - 1; |
1473 | irmp_bit2 = irmp_bit - 1; |
1466 | }
|
1474 | }
|
1467 | 1475 | ||
1468 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end) |
1476 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end) |
1469 | {
|
1477 | {
|
1470 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast |
1478 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast |
1471 | }
|
1479 | }
|
1472 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end) |
1480 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end) |
1473 | {
|
1481 | {
|
1474 | irmp_tmp_command2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast |
1482 | irmp_tmp_command2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast |
1475 | }
|
1483 | }
|
1476 | }
|
1484 | }
|
1477 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1485 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1478 | 1486 | ||
1479 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1487 | /*---------------------------------------------------------------------------------------------------------------------------------------------------
|
1480 | * ISR routine
|
1488 | * ISR routine
|
1481 | * @details ISR routine, called 10000 times per second
|
1489 | * @details ISR routine, called 10000 times per second
|
1482 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1490 | *---------------------------------------------------------------------------------------------------------------------------------------------------
|
1483 | */
|
1491 | */
|
1484 | uint8_t
|
1492 | uint8_t
|
1485 | irmp_ISR (void) |
1493 | irmp_ISR (void) |
1486 | {
|
1494 | {
|
1487 | static uint8_t irmp_start_bit_detected; // flag: start bit detected |
1495 | static uint8_t irmp_start_bit_detected; // flag: start bit detected |
1488 | static uint8_t wait_for_space; // flag: wait for data bit space |
1496 | static uint8_t wait_for_space; // flag: wait for data bit space |
1489 | static uint8_t wait_for_start_space; // flag: wait for start bit space |
1497 | static uint8_t wait_for_start_space; // flag: wait for start bit space |
1490 | static uint8_t irmp_pulse_time; // count bit time for pulse |
1498 | static uint8_t irmp_pulse_time; // count bit time for pulse |
1491 | static PAUSE_LEN irmp_pause_time; // count bit time for pause |
1499 | static PAUSE_LEN irmp_pause_time; // count bit time for pause |
1492 | static uint16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition |
1500 | static uint16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition |
1493 | static uint16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition |
1501 | static uint16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition |
1494 | static uint16_t repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause |
1502 | static uint16_t repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause |
1495 | static uint8_t repetition_frame_number; |
1503 | static uint8_t repetition_frame_number; |
1496 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1
|
1504 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1
|
1497 | static uint16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition |
1505 | static uint16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition |
1498 | #endif
|
1506 | #endif
|
1499 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
1507 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
1500 | static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit |
1508 | static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit |
1501 | #endif
|
1509 | #endif
|
1502 | #if IRMP_SUPPORT_MANCHESTER == 1
|
1510 | #if IRMP_SUPPORT_MANCHESTER == 1
|
1503 | static PAUSE_LEN last_pause; // last pause value |
1511 | static PAUSE_LEN last_pause; // last pause value |
1504 | #endif
|
1512 | #endif
|
1505 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
|
1513 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
|
1506 | static uint8_t last_value; // last bit value |
1514 | static uint8_t last_value; // last bit value |
1507 | #endif
|
1515 | #endif
|
1508 | uint8_t irmp_input; // input value |
1516 | uint8_t irmp_input; // input value |
1509 | 1517 | ||
1510 | #ifdef ANALYZE
|
1518 | #ifdef ANALYZE
|
1511 | time_counter++;
|
1519 | time_counter++;
|
1512 | #endif
|
1520 | #endif
|
1513 | 1521 | ||
1514 | irmp_input = input(IRMP_PIN); |
1522 | irmp_input = input(IRMP_PIN); |
1515 | 1523 | ||
1516 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined |
1524 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined |
1517 | 1525 | ||
1518 | if (! irmp_ir_detected) // ir code already detected? |
1526 | if (! irmp_ir_detected) // ir code already detected? |
1519 | { // no... |
1527 | { // no... |
1520 | if (! irmp_start_bit_detected) // start bit detected? |
1528 | if (! irmp_start_bit_detected) // start bit detected? |
1521 | { // no... |
1529 | { // no... |
1522 | if (! irmp_input) // receiving burst? |
1530 | if (! irmp_input) // receiving burst? |
1523 | { // yes... |
1531 | { // yes... |
1524 | #ifdef ANALYZE
|
1532 | #ifdef ANALYZE
|
1525 | if (! irmp_pulse_time) |
1533 | if (! irmp_pulse_time) |
1526 | {
|
1534 | {
|
1527 | ANALYZE_PRINTF("%8d [starting pulse]\n", time_counter); |
1535 | ANALYZE_PRINTF("%8d [starting pulse]\n", time_counter); |
1528 | }
|
1536 | }
|
1529 | #endif
|
1537 | #endif
|
1530 | irmp_pulse_time++; // increment counter |
1538 | irmp_pulse_time++; // increment counter |
1531 | }
|
1539 | }
|
1532 | else
|
1540 | else
|
1533 | { // no... |
1541 | { // no... |
1534 | if (irmp_pulse_time) // it's dark.... |
1542 | if (irmp_pulse_time) // it's dark.... |
1535 | { // set flags for counting the time of darkness... |
1543 | { // set flags for counting the time of darkness... |
1536 | irmp_start_bit_detected = 1; |
1544 | irmp_start_bit_detected = 1; |
1537 | wait_for_start_space = 1; |
1545 | wait_for_start_space = 1; |
1538 | wait_for_space = 0; |
1546 | wait_for_space = 0; |
1539 | irmp_tmp_command = 0; |
1547 | irmp_tmp_command = 0; |
1540 | irmp_tmp_address = 0; |
1548 | irmp_tmp_address = 0; |
1541 | 1549 | ||
1542 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1550 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1543 | irmp_tmp_command2 = 0; |
1551 | irmp_tmp_command2 = 0; |
1544 | irmp_tmp_address2 = 0; |
1552 | irmp_tmp_address2 = 0; |
1545 | #endif
|
1553 | #endif
|
1546 | 1554 | ||
1547 | irmp_bit = 0xff; |
1555 | irmp_bit = 0xff; |
1548 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0! |
1556 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0! |
1549 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
1557 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
1550 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame! |
1558 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame! |
1551 | #endif
|
1559 | #endif
|
1552 | }
|
1560 | }
|
1553 | else
|
1561 | else
|
1554 | {
|
1562 | {
|
1555 | if (repetition_len < 0xFFFF) // avoid overflow of counter |
1563 | if (repetition_len < 0xFFFF) // avoid overflow of counter |
1556 | {
|
1564 | {
|
1557 | repetition_len++;
|
1565 | repetition_len++;
|
1558 | }
|
1566 | }
|
1559 | }
|
1567 | }
|
1560 | }
|
1568 | }
|
1561 | }
|
1569 | }
|
1562 | else
|
1570 | else
|
1563 | {
|
1571 | {
|
1564 | if (wait_for_start_space) // we have received start bit... |
1572 | if (wait_for_start_space) // we have received start bit... |
1565 | { // ...and are counting the time of darkness |
1573 | { // ...and are counting the time of darkness |
1566 | if (irmp_input) // still dark? |
1574 | if (irmp_input) // still dark? |
1567 | { // yes |
1575 | { // yes |
1568 | irmp_pause_time++; // increment counter |
1576 | irmp_pause_time++; // increment counter |
1569 | 1577 | ||
1570 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1578 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1571 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) || |
1579 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) || |
1572 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN) |
1580 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN) |
1573 | #else
|
1581 | #else
|
1574 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout? |
1582 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout? |
1575 | #endif
|
1583 | #endif
|
1576 | { // yes... |
1584 | { // yes... |
1577 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1585 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1578 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below! |
1586 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below! |
1579 | {
|
1587 | {
|
1580 | ;
|
1588 | ;
|
1581 | }
|
1589 | }
|
1582 | else
|
1590 | else
|
1583 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1591 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1584 | {
|
1592 | {
|
1585 | ANALYZE_PRINTF ("%8d error 1: pause after start bit pulse %d too long: %d\n", time_counter, irmp_pulse_time, irmp_pause_time); |
1593 | ANALYZE_PRINTF ("%8d error 1: pause after start bit pulse %d too long: %d\n", time_counter, irmp_pulse_time, irmp_pause_time); |
1586 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n'); |
1594 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n'); |
1587 | }
|
1595 | }
|
1588 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit |
1596 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit |
1589 | irmp_pulse_time = 0; |
1597 | irmp_pulse_time = 0; |
1590 | irmp_pause_time = 0; |
1598 | irmp_pause_time = 0; |
1591 | }
|
1599 | }
|
1592 | }
|
1600 | }
|
1593 | else
|
1601 | else
|
1594 | { // receiving first data pulse! |
1602 | { // receiving first data pulse! |
1595 | IRMP_PARAMETER * irmp_param_p = (IRMP_PARAMETER *) 0; |
1603 | IRMP_PARAMETER * irmp_param_p = (IRMP_PARAMETER *) 0; |
1596 | 1604 | ||
1597 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1605 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)
|
1598 | irmp_param2.protocol = 0; |
1606 | irmp_param2.protocol = 0; |
1599 | #endif
|
1607 | #endif
|
1600 | 1608 | ||
1601 | ANALYZE_PRINTF ("%8d [start-bit: pulse = %2d, pause = %2d]\n", time_counter, irmp_pulse_time, irmp_pause_time); |
1609 | ANALYZE_PRINTF ("%8d [start-bit: pulse = %2d, pause = %2d]\n", time_counter, irmp_pulse_time, irmp_pause_time); |
1602 | 1610 | ||
1603 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1
|
1611 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1
|
1604 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX && |
1612 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX && |
1605 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX) |
1613 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX) |
1606 | { // it's SIRCS |
1614 | { // it's SIRCS |
1607 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1615 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1608 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX, |
1616 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX, |
1609 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX); |
1617 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX); |
1610 | irmp_param_p = (IRMP_PARAMETER *) (IRMP_PARAMETER *) &sircs_param; |
1618 | irmp_param_p = (IRMP_PARAMETER *) (IRMP_PARAMETER *) &sircs_param; |
1611 | }
|
1619 | }
|
1612 | else
|
1620 | else
|
1613 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1
|
1621 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1
|
1614 | 1622 | ||
1615 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1623 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1616 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame |
1624 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame |
1617 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX && |
1625 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX && |
1618 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX) |
1626 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX) |
1619 | {
|
1627 | {
|
1620 | ANALYZE_PRINTF ("protocol = NEC or JVC repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1628 | ANALYZE_PRINTF ("protocol = NEC or JVC repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1621 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX, |
1629 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX, |
1622 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX); |
1630 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX); |
1623 | irmp_param_p = (IRMP_PARAMETER *) &nec_param; // tricky: use nec parameters |
1631 | irmp_param_p = (IRMP_PARAMETER *) &nec_param; // tricky: use nec parameters |
1624 | }
|
1632 | }
|
1625 | else
|
1633 | else
|
1626 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1634 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1
|
1627 | 1635 | ||
1628 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1
|
1636 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1
|
1629 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX && |
1637 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX && |
1630 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX) |
1638 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX) |
1631 | {
|
1639 | {
|
1632 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1640 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1633 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, |
1641 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, |
1634 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX); |
1642 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX); |
1635 | irmp_param_p = (IRMP_PARAMETER *) &nec_param; |
1643 | irmp_param_p = (IRMP_PARAMETER *) &nec_param; |
1636 | }
|
1644 | }
|
1637 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX && |
1645 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX && |
1638 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX) |
1646 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX) |
1639 | { // it's NEC |
1647 | { // it's NEC |
1640 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1648 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1641 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, |
1649 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, |
1642 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX); |
1650 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX); |
1643 | 1651 | ||
1644 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param; |
1652 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param; |
1645 | }
|
1653 | }
|
1646 | else
|
1654 | else
|
1647 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1
|
1655 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1
|
1648 | 1656 | ||
1649 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1657 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1650 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX && |
1658 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX && |
1651 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX) |
1659 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX) |
1652 | {
|
1660 | {
|
1653 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1661 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1654 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX, |
1662 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX, |
1655 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX); |
1663 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX); |
1656 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param; |
1664 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param; |
1657 | }
|
1665 | }
|
1658 | else
|
1666 | else
|
1659 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1667 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1
|
1660 | 1668 | ||
1661 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1669 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1662 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX && |
1670 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX && |
1663 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX) |
1671 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX) |
1664 | { // it's SAMSUNG |
1672 | { // it's SAMSUNG |
1665 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1673 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1666 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX, |
1674 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX, |
1667 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX); |
1675 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX); |
1668 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param; |
1676 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param; |
1669 | }
|
1677 | }
|
1670 | else
|
1678 | else
|
1671 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1679 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1
|
1672 | 1680 | ||
1673 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1
|
1681 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1
|
1674 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX && |
1682 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX && |
1675 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX) |
1683 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX) |
1676 | { // it's MATSUSHITA |
1684 | { // it's MATSUSHITA |
1677 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1685 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1678 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX, |
1686 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX, |
1679 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX); |
1687 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX); |
1680 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param; |
1688 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param; |
1681 | }
|
1689 | }
|
1682 | else
|
1690 | else
|
1683 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1
|
1691 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1
|
1684 | 1692 | ||
1685 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1693 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1686 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX && |
1694 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX && |
1687 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX) |
1695 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX) |
1688 | { // it's KASEIKYO |
1696 | { // it's KASEIKYO |
1689 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1697 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1690 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX, |
1698 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX, |
1691 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX); |
1699 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX); |
1692 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param; |
1700 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param; |
1693 | }
|
1701 | }
|
1694 | else
|
1702 | else
|
1695 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1703 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1
|
1696 | 1704 | ||
1697 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1
|
1705 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1
|
1698 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX && |
1706 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX && |
1699 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX) |
1707 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX) |
1700 | { // it's RECS80 |
1708 | { // it's RECS80 |
1701 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1709 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1702 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX, |
1710 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX, |
1703 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX); |
1711 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX); |
1704 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param; |
1712 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param; |
1705 | }
|
1713 | }
|
1706 | else
|
1714 | else
|
1707 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1
|
1715 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1
|
1708 | 1716 | ||
1709 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
1717 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1
|
1710 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) || |
1718 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) || |
1711 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) && |
1719 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) && |
1712 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) || |
1720 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) || |
1713 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))) |
1721 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))) |
1714 | { // it's RC5 |
1722 | { // it's RC5 |
1715 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1
|
1723 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1
|
1716 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX && |
1724 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX && |
1717 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX) |
1725 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX) |
1718 | {
|
1726 | {
|
1719 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n"); |
1727 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n"); |
1720 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1728 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1721 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, |
1729 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, |
1722 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX); |
1730 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX); |
1723 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1731 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1724 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, |
1732 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, |
1725 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX); |
1733 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX); |
1726 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER)); |
1734 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER)); |
1727 | }
|
1735 | }
|
1728 | else
|
1736 | else
|
1729 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1
|
1737 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1
|
1730 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1738 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1731 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX && |
1739 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX && |
1732 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX) |
1740 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX) |
1733 | {
|
1741 | {
|
1734 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n"); |
1742 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n"); |
1735 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1743 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1736 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX, |
1744 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX, |
1737 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX); |
1745 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX); |
1738 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1746 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1739 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, |
1747 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, |
1740 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX); |
1748 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX); |
1741 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER)); |
1749 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER)); |
1742 | }
|
1750 | }
|
1743 | else
|
1751 | else
|
1744 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1752 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1
|
1745 | {
|
1753 | {
|
1746 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1754 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n", |
1747 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, |
1755 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, |
1748 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX); |
1756 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX); |
1749 | }
|
1757 | }
|
1750 | 1758 | ||
1751 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param; |
1759 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param; |
1752 | last_pause = irmp_pause_time; |
1760 | last_pause = irmp_pause_time; |
1753 | 1761 | ||
1754 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) || |
1762 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) || |
1755 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)) |
1763 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)) |