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        // Timer/Counter 0 Control Register A
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        // Timer/Counter 0 Control Register A
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        // Normal Timer Counter Mode (Bits WGM02 = 0, WGM01 = 0, WGM00 = 0)
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        // Normal Timer Counter Mode (Bits WGM02 = 0, WGM01 = 0, WGM00 = 0)
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    // OC0A disconnected (Bits COM0A1 = 0, COM0A0 = 0)
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        // OC0A disconnected (Bits COM0A1 = 0, COM0A0 = 0)
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    // OC0B disconnected (Bits COM0B1 = 0, COM0B0 = 0)
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        // OC0B disconnected (Bits COM0B1 = 0, COM0B0 = 0)
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    TCCR0A &= ~((1<<COM0A1)|(1<<COM0A0)|(1<<COM0B1)|(1<<COM0B0)|(1<<WGM01)|(1<<WGM00));
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        TCCR0A &= ~((1<<COM0A1)|(1<<COM0A0)|(1<<COM0B1)|(1<<COM0B0)|(1<<WGM01)|(1<<WGM00));
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        // Timer/Counter 0 Control Register B
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        // Timer/Counter 0 Control Register B
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        // set clock devider for timer 0 to SYSKLOCK/8 = 8MHz / 8 = 1MHz
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        // set clock devider for timer 0 to SYSKLOCK/8 = 8MHz / 8 = 1MHz
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        // i.e. the timer increments from 0x00 to 0xFF with an update rate of 2.5 MHz
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        // i.e. the timer increments from 0x00 to 0xFF with an update rate of 2.5 MHz
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        // hence the timer overflow interrupt frequency is 2.5 MHz / 256 = 9.765 kHz
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        // hence the timer overflow interrupt frequency is 2.5 MHz / 256 = 9.765 kHz
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        // divider 8 (Bits CS02 = 0, CS01 = 1, CS00 = 0)
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        // divider 8 (Bits CS02 = 0, CS01 = 1, CS00 = 0)
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        TCCR0B &= ~((1<<FOC0A)|(1<<FOC0B)|(1<<WGM02)|(1<<CS02));
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        TCCR0B &= ~((1<<FOC0A)|(1<<FOC0B)|(1<<WGM02)|(1<<CS02));
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    TCCR0B = (1<<CS01)|(0<<CS00);
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        TCCR0B = (1<<CS01)|(0<<CS00);
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// -----------------------------------------------------------------------
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// -----------------------------------------------------------------------
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uint16_t SetDelay (uint16_t t)
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uint16_t SetDelay (uint16_t t)
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{
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{
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  return(CountMilliseconds + t - 1);
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        return(CountMilliseconds + t - 1);
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}
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}
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        uint16_t t_stop;
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        uint16_t t_stop;
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        t_stop = SetDelay(wait);
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        t_stop = SetDelay(wait);
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        while (!CheckDelay(t_stop));
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        while (!CheckDelay(t_stop));
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}
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}
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