WebSVN - MK3Mag - Diff - Rev 19 and 22 - /branches/MK3Mag V0.14 Code Redesign Killagreg/twislave.c

 #include <util/twi.h>
 #include "twislave.h"
 #include "uart.h"
 #include "main.h"
 #include "timer0.h"
+#include "led.h"
-#define TWI_BUS_ERR_1   0x00
-#define TWI_BUS_ERR_2   0xF8
-// Status Slave RX Mode
-#define SR_SLA_ACK      0x60
-#define SR_LOST_ACK     0x68
-#define SR_GEN_CALL_ACK 0x70
-#define GEN_LOST_ACK    0x78
-#define SR_PREV_ACK     0x80
-#define SR_PREV_NACK    0x88
-#define GEN_PREV_ACK    0x90
-#define GEN_PREV_NACK   0x98
-#define STOP_CONDITION  0xA0
-#define REPEATED_START  0xA0
-// Status Slave TX mode
-#define SW_SLA_ACK      0xA8
-#define SW_LOST_ACK     0xB0
-#define SW_DATA_ACK     0xB8
-#define SW_DATA_NACK    0xC0
-#define SW_LAST_ACK     0xC8
-uint8_t I2C_RxBufferSize, I2C_TxBufferSize;
+uint8_t I2C_RxBufferSize = 0, I2C_TxBufferSize = 0;
-uint8_t *I2C_TxBuffer, *I2C_RxBuffer;
+uint8_t *I2C_TxBuffer = 0, *I2C_RxBuffer = 0;
-uint8_t Tx_Idx = 0, Rx_Idx = 0, I2C_Direction;
+uint8_t Tx_Idx = 0, Rx_Idx = 0;
 uint8_t I2C_Command;
 I2C_WriteCal_t      I2C_WriteCal;
+void I2C_Init(void)
-void I2C_Init(void)
+{
+        uint8_t sreg;
+        // backup status register
         sreg = SREG;
-        uint8_t sreg = SREG;
+    // disable global interrupts
         cli();
-        //SPI SCK/SCL and  MISO/SDA are at put together on the same connector pin in the schematic
+        // SCK/SCL and  MISO/SDA are at put together on the same connector pin in the schematic
-        // set PB4 (SCK) and PB5 (MISO) as input pull up
+        // set PB4 (SCK) and PB5 (MISO) as input tristate
         DDRB &= ~((1<<DDB4)|(1<<DDB5));
+        PORTB &= ~((1<<PORTB4)|(1<<PORTB5));
+        // set PC4 (SDA) and PC5 (SCL) as input tristate
+        DDRC &= ~((1<<DDC4)|(1<<DDC5));
+        PORTC &= ~((1<<PORTC4)|(1<<PORTC5));
+        I2C_TxBuffer = 0;
+        Tx_Idx = 0;
+        I2C_TxBufferSize = 0;
+        I2C_RxBuffer = 0;
+        Rx_Idx = 0;
+        I2C_RxBufferSize = 0;
-        PORTB |= ((1<<PORTB4)|(1<<PORTB5));
-        // set PC4 (SDA) and PC5 (SCL) as input pull up
+        TWCR &= ~(1<<TWSTA)|(1<<TWSTO);
-        DDRC &= ~((1<<DDC4)|(1<<DDC5));
-        PORTC |= ((1<<PORTC4)|(1<<PORTC5));
+        TWCR|= (1<<TWEA) | (1<<TWEN)|(1<<TWIE);
-         // set own address
+        // set own address
-    TWAR = I2C_SLAVE_ADDRESS; // set own address
-        // TWI Control Register
+        // set own address in the upper 7 bits
-        // clear TWI interrupt flag (TWINT=1)
+    TWAR = I2C_SLAVE_ADDRESS; // set own address only the upper 7 bits are relevant
+        // TWI Control Register
         // enable TWI Acknowledge Bit (TWEA = 1)
+        // disable TWI START Condition Bit (TWSTA = 0), SLAVE
-        // disable TWI START Condition Bit (TWSTA = 0), SLAVE
+        // disable TWI  STOP Condition Bit (TWSTO = 0), SLAVE
-        // disable TWI STOP Condition Bit (TWSTO = 0), SLAVE
+        // enable TWI (TWEN = 1)
-        // disable TWI Write Collision Flag (TWWC = 0)
+        // enable TWI Interrupt (TWIE = 1)
-        // enable i2c (TWEN = 1)
+        TWCR &= ~((1<<TWSTA)|(1<<TWSTO));
+        TWCR |= (1<<TWEA)|(1<<TWEN)|(1<<TWIE);
         // enable TWI Interrupt (TWIE = 1)
-    TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWIE) | (1<<TWEA);
+        // update version info
-        // update version info
-        I2C_Version.Major = VERSION_MAJOR;
+        I2C_Version.Major = VERSION_MAJOR;
         I2C_Version.Minor = VERSION_MINOR;
+        I2C_Version.Compatible = I2C_PROTOCOL_COMP;
+        // resore status register
+        SREG = sreg;
+}
-        I2C_Version.Compatible = I2C_PROTOCOL_COMP;
+// send ACK after recieving a byte / ACK is expected after transmitting a byte
 #define TWCR_ACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC)
+// send no ACK after recieving a byte / No ACK is expected after transmitting a byte
-        SREG = sreg;
+#define TWCR_NACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC)
-}
+// switched to the non adressed slave mode
 #define TWCR_RESET TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC)
+// The bit pattern for TWCR_ACK and TWCR_RESET are equal. This is no errro but used for better understanding.
+#define TWCR_CLEARBUS TWCR =(1<<TWEA) | (1<<TWSTO) | (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
-#define TWCR_ACK TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC)
 ISR (TWI_vect)
-ISR (TWI_vect)
+{
-{
+        uint8_t data;
         // check event
-        switch (TWSR & 0xF8)
-        {
+        switch (TW_STATUS)
-        case SR_SLA_ACK:
-            Rx_Idx = 0;
+        {
-                        TWCR_ACK;
+        case TW_SR_SLA_ACK: // slave addressed in receiver mode and ack has been returned
-            return;
+            Rx_Idx = 0xFF;  // reset rx buffer pointer
                         TWCR_ACK;       // trigger receiving of first data byte and send ack afterwards
-        case SR_PREV_ACK: // data byte received
+            return;
                                                 I2C_Heading.Heading = Heading;
                                                 // copy current attitude from I2C rx buffer to uart rx buffer (this is used for the calulation of the heading)
                                                 ExternData.Attitude[NICK] = I2C_WriteAttitude.Nick;
                                                 ExternData.Attitude[ROLL] = I2C_WriteAttitude.Roll;
                                                 break;
+                                        default:
+                                                I2C_RxBuffer = 0;
+                                                I2C_RxBufferSize = 0;
+                                                I2C_TxBuffer = 0;
+                                                I2C_TxBufferSize = 0;
+                                        break;
+                                }
+                                Rx_Idx = 0; // set rx buffer index to start of the buffer
+                                if(I2C_RxBufferSize > 1) TWCR_ACK; // prepare receiving of next byte and send ACK afterwards
+                                else TWCR_NACK; // prepare receiving of next byte and send NACK afterwards
+                        }
-                        else // Rx_Idx  != 0
+                        else // Rx_Idx  != 0xFF
+                        {
+                                // fill receiver buffer with byte that has been received
-                                // fill receiver buffer
+                                // if buffer exist
+                                if(I2C_RxBuffer != 0)
+                                {       // and there is still some free space
-                                if ((Rx_Idx - 1) < I2C_RxBufferSize) I2C_RxBuffer[Rx_Idx - 1] = TWDR;
+                                        if (Rx_Idx  < I2C_RxBufferSize) I2C_RxBuffer[Rx_Idx++] = data;
+                                        // if there is space for more than one byte
+                                        if(Rx_Idx < (I2C_RxBufferSize - 1)) TWCR_ACK;
+                                        // with the next incomming byte the rx buffer is full
+                                        else TWCR_NACK;
+                                }
+                                // rx buffer does not exist
+                                else TWCR_NACK; // prepare receiving of next byte and send NACK afterwards
+                        }
-                        // next byte
-                        Rx_Idx++;
-            I2C_Timeout = 500;
-                        TWCR_ACK; // send acknowledge
             return;
+        case TW_SR_DATA_NACK: // data has been received and NACK has been returned
+                // read the last byte that is expected
+                data = TWDR;
+                if((I2C_RxBuffer != 0) && (Rx_Idx != 0xFF))
+                        {       // and there is still some free space
+                                if (Rx_Idx  < I2C_RxBufferSize) I2C_RxBuffer[Rx_Idx++] = data;
+                        }
+                        TWCR_RESET; // switched to the non adressed slave mode
+                return;
-        case SW_SLA_ACK: // slave transmitter selected
+        case TW_ST_SLA_ACK: // slave transmitter selected
                 // reset position in tx buffer
+            Tx_Idx = 0;
-            Tx_Idx = 0;
+                case TW_ST_DATA_ACK: // data byte has been transmitted ack has been received
+                        // put next byte from tx buffer to twi data register
+                        if(I2C_TxBuffer != 0)
+                        {
+                if (Tx_Idx < I2C_TxBufferSize)
-            // write first bte o tx buffer to the twi data register
+                {
+                                        TWDR = I2C_TxBuffer[Tx_Idx++];
+                                        if(Tx_Idx + 1 < I2C_TxBufferSize) TWCR_ACK; // more than one byte to send
+                                        else TWCR_NACK; // last byte was send NACK should be received
+                                }
+                                else
+                                {   //
+                                        TWDR = 0x00;
+                                        TWCR_NACK;// NACK should be received
+                                }
-                        if (I2C_TxBufferSize > 0) TWDR = I2C_TxBuffer[Tx_Idx++];
+                        }
+                        else // buffer not existent
-                        // send acknowledge
+                        {
+                                TWDR = 0x00;
+                                TWCR_NACK;// NACK should be received
             TWCR_ACK;
             return;
-                case SW_DATA_ACK: // send data byte
-                        // put next byte from tx buffer to twi data register
-            if (Tx_Idx < I2C_TxBufferSize) TWDR = I2C_TxBuffer[Tx_Idx++];
-                        else TWDR = 0x00;
+        case TW_BUS_ERROR:  // Bus-Error
-                        TWCR_ACK; // send acknowledge
+            TWCR_CLEARBUS;      // free bus reset to nonselected slave
             return;
-        // clear Bus-Error
+                case TW_ST_DATA_NACK:   // data transmitted, NACK received
-        case TWI_BUS_ERR_2:
+                case TW_ST_LAST_DATA:   // last data byte transmitted, ACK received
-            TWCR |=(1<<TWSTO) | (1<<TWINT);
+                case TW_SR_STOP:                // stop or repeated start condition received while selected
-        // clear Bus-Error
+                default:
-        case TWI_BUS_ERR_1:
-            TWCR |=(1<<TWSTO) | (1<<TWINT);
-        }
-        // clear interrupt flag (TWINT = 1)
-        // enable TWI Acknowledge Bit (TWEA = 1)
-        // enable TWI (TWEN = 1)
+                        TWCR_RESET; // switch to the not addressed slave mode, own SLA will be recognized

Subversion Repositories MK3Mag

(root)/branches/MK3Mag V0.14 Code Redesign Killagreg/twislave.c - Rev 19 → 22