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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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#include <avr/io.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/interrupt.h>
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#include "main.h"
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#include "main.h"
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#include "uart1.h"
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#include "uart1.h"
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#include "fifo.h"
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#if defined (USE_KILLAGREG) || defined (USE_MK3MAG)
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#if defined (USE_KILLAGREG) || defined (USE_MK3MAG)
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#include "ubx.h"
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#include "ubx.h"
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#define USART1_BAUD 57600
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#else
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#ifdef USE_RC_DSL
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#include "dsl.h"
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#define USART1_BAUD 38400
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#endif
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#ifdef USE_RC_SPECTRUM
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#include "spectrum.h"
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#define USART1_BAUD 115200
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#endif
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#endif
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#endif
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// FIFO-objects and buffers for input and output
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//#define BUFSIZE_IN  0x96
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//volatile uint8_t inbuf[BUFSIZE_IN];
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//fifo_t infifo;
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#ifndef USART1_BAUD
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#define BUFSIZE_OUT 0x96
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volatile uint8_t outbuf[BUFSIZE_OUT];
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#define USART1_BAUD 57600
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fifo_t outfifo;
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#endif
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/****************************************************************/
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/****************************************************************/
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/*              Initialization of the USART1                    */
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/*              Initialization of the USART1                    */
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        // enable interrupts at the end
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        // enable interrupts at the end
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        // enable RX-Interrupt
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        // enable RX-Interrupt
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        UCSR1B |= (1 << RXCIE1);
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        UCSR1B |= (1 << RXCIE1);
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        // enable TX-Interrupt
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        // enable TX-Interrupt
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        UCSR1B |= (1 << TXCIE1);
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        //UCSR1B |= (1 << TXCIE1);
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        // enable DRE interrupt
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        // enable DRE interrupt
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        //UCSR1B |= (1 << UDRIE1);
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        //UCSR1B |= (1 << UDRIE1);
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        // restore global interrupt flags
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    SREG = sreg;
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    // inint FIFO buffer
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        //fifo_init (&infifo,   inbuf, BUFSIZE_IN);
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    //fifo_init (&outfifo, outbuf, BUFSIZE_OUT);
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}
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/*int16_t USART1_putc (const uint8_t c)
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{
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    int16_t ret = fifo_put (&outfifo, c);
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    // create an data register empty interrupt
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    UCSR1B |= (1 << UDRIE1);
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    return ret;
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}
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*/
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/*int16_t USART1_getc_nowait ()
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{
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    return fifo_get_nowait (&infifo);
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}
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        // restore global interrupt flags
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uint8_t USART1_getc_wait ()
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    SREG = sreg;
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{
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    return fifo_get_wait (&infifo);
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}
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}
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*/
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/****************************************************************/
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/*               USART1 data register empty ISR                 */
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/****************************************************************/
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/*ISR(USART1_UDRE_vect)
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{
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// Move a character from the output buffer to the data register.
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// When the character was processed the next interrupt is generated.
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/****************************************************************/
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// If the output buffer is empty the DRE-interrupt is disabled.
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/*               USART1 data register empty ISR                 */
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    if (outfifo.count > 0)
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/****************************************************************/
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ISR(USART1_RX_vect)
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ISR(USART1_RX_vect)
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{
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{
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        uint8_t c;
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        uint8_t c;
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        c = UDR1; // get data byte
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        c = UDR1; // get data byte
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        #if (defined (USE_KILLAGREG) || defined (USE_MK3MAG))
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        #if (defined (USE_KILLAGREG) || defined (USE_MK3MAG))
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        ubx_parser(c); // and put it into the ubx protocol parser
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        ubx_parser(c);                  // and put it into the ubx protocol parser
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        #else
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        #ifdef USE_RC_DSL
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        dsl_parser(c);                  // parse dsl data stream
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        #endif
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        #ifdef USE_RC_SPECTRUM
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        spectrum_parser(c);             // parse spectrum data stream
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        #endif
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        #endif
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        #endif
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}
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}