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Line 79... Line 79...
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        // set SCK (PB7), MOSI (PB5) as output
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        // set SCK (PB7), MOSI (PB5) as output
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        DDRB |= (1<<DDB7)|(1<<DDB5);
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        DDRB |= (1<<DDB7)|(1<<DDB5);
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        // set MISO (PB6) as input
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        // set MISO (PB6) as input
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        DDRB &= ~(1<<DDB6);
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        DDRB &= ~(1<<DDB6);
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#ifdef USE_WALTER_EXT // walthers board
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        // Output Pins (J9)PC6->MM3_SS ,(J8)PB2->MM3_RESET
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        DDRB |= (1<<DDB2);
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        DDRC |= (1<<DDC6);
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        // set pins permanent to low
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        PORTB &= ~((1<<PORTB2));
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        PORTC &= ~((1<<PORTC6));
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#else // killagregs board
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        // Output Pins PC4->MM3_SS ,PC5->MM3_RESET
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        // Output Pins PC4->MM3_SS ,PC5->MM3_RESET
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        DDRC |= (1<<DDC4)|(1<<DDC5);
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        DDRC |= (1<<DDC4)|(1<<DDC5);
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        // set pins permanent to low
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        // set pins permanent to low
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        PORTC &= ~((1<<PORTC4)|(1<<PORTC5));
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        PORTC &= ~((1<<PORTC4)|(1<<PORTC5));
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#endif
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        // Initialize SPI-Interface
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        // Initialize SPI-Interface
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        // Enable interrupt (SPIE=1)
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        // Enable interrupt (SPIE=1)
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        // Enable SPI bus (SPE=1)
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        // Enable SPI bus (SPE=1)
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        // MSB transmitted first (DORD = 0)
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        // MSB transmitted first (DORD = 0)
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        // Master SPI Mode (MSTR=1)
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        // Master SPI Mode (MSTR=1)
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        // Clock polarity low whn idle (CPOL=0)
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        // Clock polarity low when idle (CPOL=0)
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        // clock phase sample at leading edge (CPHA=0)
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        // Clock phase sample at leading edge (CPHA=0)
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        // clock rate = SYSCLK/128 (SPI2X=0, SPR1=1, SPR0=1) 20MHz/128 = 156.25kHz
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        // Clock rate = SYSCLK/128 (SPI2X=0, SPR1=1, SPR0=1) 20MHz/128 = 156.25kHz
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        SPCR = (1<<SPIE)|(1<<SPE)|(0<<DORD)|(1<<MSTR)|(0<<CPOL)|(0<<CPHA)|(1<<SPR1)|(1<<SPR0);
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        SPCR = (1<<SPIE)|(1<<SPE)|(0<<DORD)|(1<<MSTR)|(0<<CPOL)|(0<<CPHA)|(1<<SPR1)|(1<<SPR0);
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        SPSR &= ~(1<<SPI2X);
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        SPSR &= ~(1<<SPI2X);
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void MM3_Update(void) // called every 102.4 µs by timer 0 ISR
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void MM3_Update(void) // called every 102.4 µs by timer 0 ISR
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{
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{
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        switch (MM3.STATE)
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        switch (MM3.STATE)
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        {
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        {
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        case MM3_STATE_RESET:
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        case MM3_STATE_RESET:
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                #ifdef USE_WALTER_EXT // walthers board
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                PORTC &= ~(1<<PORTC6);  // select slave
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                PORTB |= (1<<PORTB2);   // PB2 to High, MM3 Reset
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                #else
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                PORTC &= ~(1<<PORTC4);  // select slave
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                PORTC &= ~(1<<PORTC4);  // select slave
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                PORTC |= (1<<PORTC5);   // PC5 to High, MM3 Reset
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                PORTC |= (1<<PORTC5);   // PC5 to High, MM3 Reset
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                #endif
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                MM3.STATE = MM3_STATE_START_TRANSFER;
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                MM3.STATE = MM3_STATE_START_TRANSFER;
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                return;
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                return;
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        case MM3_STATE_START_TRANSFER:
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                #ifdef USE_WALTER_EXT // walthers board
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                PORTB &= ~(1<<PORTB2);  // PB2 auf Low (was 102.4 µs at high level)
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        case MM3_STATE_START_TRANSFER:
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                #else
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                PORTC &= ~(1<<PORTC5);  // PC4 auf Low (was 102.4 µs at high level)
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                PORTC &= ~(1<<PORTC5);  // PC4 auf Low (was 102.4 µs at high level)
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                #endif
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                // write to SPDR triggers automatically the transfer MOSI MISO
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                // write to SPDR triggers automatically the transfer MOSI MISO
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                // MM3 Period, + AXIS code
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                // MM3 Period, + AXIS code
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                switch(MM3.AXIS)
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                switch(MM3.AXIS)
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                {
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                {
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                        default:
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                        default:
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                                MM3.AXIS = MM3_X_AXIS;
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                                MM3.AXIS = MM3_X_AXIS;
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                                break;
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                                break;
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                        }
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                        }
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                }
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                }
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                #ifdef USE_WALTER_EXT // walthers board
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                PORTC |= (1<<PORTC6); // deselect slave
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                #else
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                PORTC |= (1<<PORTC4); // deselect slave
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                PORTC |= (1<<PORTC4); // deselect slave
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                #endif
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                MM3.STATE = MM3_STATE_RESET;
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                MM3.STATE = MM3_STATE_RESET;
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                // Update timeout is called every 102.4 µs.
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                // Update timeout is called every 102.4 µs.
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                // It takes 2 cycles to write a measurement data request for one axis and
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                // It takes 2 cycles to write a measurement data request for one axis and
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                // at at least 8 ms / 102.4 µs = 79 cycles to read the requested data back.
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                // at at least 8 ms / 102.4 µs = 79 cycles to read the requested data back.
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                // I.e. 81 cycles * 102.4 µs = 8.3ms per axis.
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                // I.e. 81 cycles * 102.4 µs = 8.3ms per axis.