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#if defined (__AVR_ATmega644__)
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#if defined (__AVR_ATmega644__)
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#define SYSCLK  20000000L       //Quarz Frequenz in Hz
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#define SYSCLK  20000000L       //Quarz Frequenz in Hz
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//#define SYSCLK        16000000L       //Quarz Frequenz in Hz
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//#define SYSCLK        16000000L       //Quarz Frequenz in Hz
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#endif
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#endif
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// neue Hardware
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// neue Hardware
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#define ROT_OFF   PORTB &=~0x01
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#define ROT_OFF   {if(PlatinenVersion == 10) PORTB &=~0x01; else  PORTB |= 0x01;}
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#define ROT_ON    PORTB |= 0x01
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#define ROT_ON    {if(PlatinenVersion == 10) PORTB |= 0x01; else  PORTB &=~0x01;}
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#define ROT_FLASH PORTB ^= 0x01
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#define ROT_FLASH PORTB ^= 0x01
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#define GRN_OFF   PORTB &=~0x02
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#define GRN_OFF   PORTB &=~0x02
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#define GRN_ON    PORTB |= 0x02
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#define GRN_ON    PORTB |= 0x02
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#define GRN_FLASH PORTD ^= 0x02
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#define GRN_FLASH PORTB ^= 0x02
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//#ifndef F_CPU
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//#ifndef F_CPU
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//#define ANZ_MITTELWERT   4
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//#define ANZ_MITTELWERT   4
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#define EEPROM_ADR_VALID            1
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#define EEPROM_ADR_VALID            1
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#define EEPROM_ADR_ACTIVE_SET       2
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#define EEPROM_ADR_ACTIVE_SET       2
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#define EEPROM_ADR_LAST_OFFSET      3
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#define EEPROM_ADR_PARAM_BEGIN      100
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#define EEPROM_ADR_PARAM_BEGIN      100
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#define CFG_HOEHENREGELUNG  0x01
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#define CFG_HOEHENREGELUNG  0x01
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#define CFG_HOEHEN_SCHALTER 0x02
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#define CFG_HOEHEN_SCHALTER 0x02
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#define CFG_HEADING_HOLD    0x04
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#define CFG_KOMPASS_AKTIV   0x08
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#define CFG_KOMPASS_FIX     0x10
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#define CFG_GPS_AKTIV       0x20
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#define CFG_HEADING_HOLD    0x04
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#define CFG_KOMPASS_AKTIV   0x08
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#define CFG_LOOP_OBEN       0x01
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#define CFG_KOMPASS_FIX     0x10
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#define CFG_LOOP_UNTEN      0x02
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#define CFG_GPS_AKTIV       0x20
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#define CFG_LOOP_LINKS      0x04
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#define CFG_LOOP_RECHTS     0x08
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//#define  SYSCLK  
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//#define  SYSCLK  
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//extern unsigned long SYSCLK;
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//extern unsigned long SYSCLK;
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extern volatile int i_Nick[20],i_Roll[20],DiffNick,DiffRoll;
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extern volatile int i_Nick[20],i_Roll[20],DiffNick,DiffRoll;
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extern volatile unsigned char SenderOkay;