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49 | #ifdef _16KHZ |
49 | #ifdef _16KHZ |
50 | // #define PWM_C_ON {TCCR1A = 0xA2; TCCR2 = 0x41; DDRB = 0x0A;} |
50 | // #define PWM_C_ON {TCCR1A = 0xA2; TCCR2 = 0x41; DDRB = 0x0A;} |
51 | // #define PWM_B_ON {TCCR1A = 0xA2; TCCR2 = 0x41; DDRB = 0x0C;} |
51 | // #define PWM_B_ON {TCCR1A = 0xA2; TCCR2 = 0x41; DDRB = 0x0C;} |
52 | // #define PWM_A_ON {TCCR1A = 0xA2; TCCR2 = 0x61; DDRB = 0x08;} |
52 | // #define PWM_A_ON {TCCR1A = 0xA2; TCCR2 = 0x61; DDRB = 0x08;} |
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53 | 53 | ||
54 | #define PWM_C_ON {TCCR2 = 0x41; if(PPM_Betrieb) { TCCR1A = 0xA1;DDRB = 0x0A;} else { TCCR1A = 0x81; DDRB = 0x0E;}} |
54 | // #define PWM_C_ON {TCCR2 = 0x41; if(PPM_Betrieb) { TCCR1A = 0xA1;DDRB = 0x0A;} else { TCCR1A = 0x81; DDRB = 0x0E;}} |
55 | #define PWM_B_ON {TCCR2 = 0x41; if(PPM_Betrieb) { TCCR1A = 0xA1;DDRB = 0x0C;} else { TCCR1A = 0x21; DDRB = 0x0E;}} |
55 | // #define PWM_B_ON {TCCR2 = 0x41; if(PPM_Betrieb) { TCCR1A = 0xA1;DDRB = 0x0C;} else { TCCR1A = 0x21; DDRB = 0x0E;}} |
- | 56 | // #define PWM_A_ON {TCCR2 = 0x61; if(PPM_Betrieb) { TCCR1A = 0xA1;DDRB = 0x08;} else { TCCR1A = 0x01; DDRB = 0x0E;}} |
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- | 57 | ||
- | 58 | #define PWM_C_ON {TCCR1A = 0xA1; TCCR2 = 0x61; DDRB = 0x02;} |
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- | 59 | #define PWM_B_ON {TCCR1A = 0xA1; TCCR2 = 0x61; DDRB = 0x04;} |
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- | 60 | #define PWM_A_ON {TCCR1A = 0xA1; TCCR2 = 0x61; DDRB = 0x08;} |
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56 | #define PWM_A_ON {TCCR2 = 0x61; if(PPM_Betrieb) { TCCR1A = 0xA1;DDRB = 0x08;} else { TCCR1A = 0x01; DDRB = 0x0E;}} |
61 | |
57 | 62 | ||
58 | // #define PWM_C_ON {TCCR1A = 0x82; TCCR2 = 0x41; PORTB &= ~0x04; DDRB = 0x0E;} |
63 | // #define PWM_C_ON {TCCR1A = 0x82; TCCR2 = 0x41; PORTB &= ~0x04; DDRB = 0x0E;} |