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| Rev 121 | Rev 136 | ||
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| Line 56... | Line 56... | ||
| 56 | // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
56 | // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| 57 | #include "91x_lib.h" |
57 | #include "91x_lib.h" |
| 58 | #include "timer2.h" |
58 | #include "timer2.h" |
| 59 | #include "uart1.h" |
59 | #include "uart1.h" |
| 60 | #include "spi_slave.h" |
60 | #include "spi_slave.h" |
| - | 61 | #include "config.h" |
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| Line 61... | Line 62... | ||
| 61 | 62 | ||
| 62 | #define CR1_OLVL1_MASK 0x0100 |
63 | #define CR1_OLVL1_MASK 0x0100 |
| Line 63... | Line 64... | ||
| 63 | #define CR1_OLVL2_MASK 0x0200 |
64 | #define CR1_OLVL2_MASK 0x0200 |
| Line 220... | Line 221... | ||
| 220 | TIM_Init(TIM2, &TIM_InitStructure); |
221 | TIM_Init(TIM2, &TIM_InitStructure); |
| Line 221... | Line 222... | ||
| 221 | 222 | ||
| 222 | TIM_ITConfig(TIM2, TIM_IT_OC1|TIM_IT_OC2, ENABLE); // enable interrupts for the OC 1 & 2 |
223 | TIM_ITConfig(TIM2, TIM_IT_OC1|TIM_IT_OC2, ENABLE); // enable interrupts for the OC 1 & 2 |
| Line 223... | Line 224... | ||
| 223 | TIM_CounterCmd(TIM2, TIM_START); // start the timer |
224 | TIM_CounterCmd(TIM2, TIM_START); // start the timer |
| 224 | 225 | ||
| Line 225... | Line 226... | ||
| 225 | VIC_Config(TIM2_ITLine, VIC_IRQ, 3); |
226 | VIC_Config(TIM2_ITLine, VIC_IRQ, PRIORITY_TIMER2); |
| 226 | VIC_ITCmd(TIM2_ITLine, ENABLE); |
227 | VIC_ITCmd(TIM2_ITLine, ENABLE); |
| 227 | 228 | ||