| 0,0 → 1,49 |
|---|
| /**************************************************************************** |
| * Copyright (C) 2011 by Claas Anders "CaScAdE" Rathje * |
| * admiralcascade@gmail.com * |
| * Project-URL: http://www.mylifesucks.de/oss/c-epilepsy/ * |
| * * |
| * This program is free software; you can redistribute it and/or modify * |
| * it under the terms of the GNU General Public License as published by * |
| * the Free Software Foundation; either version 2 of the License. * |
| * * |
| * This program is distributed in the hope that it will be useful, * |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
| * GNU General Public License for more details. * |
| * * |
| * You should have received a copy of the GNU General Public License * |
| * along with this program; if not, write to the * |
| * Free Software Foundation, Inc., * |
| * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * |
| ****************************************************************************/ |
| |
| #include "timer1.h" |
| |
| // 16 bit timer |
| // critical for pwm and stuff |
| // periodic uncritical stuff should go to the non-blocking timer0 |
| |
| void timer1_init() { |
| // CTC Mode |
| TCCR1B = (1 << WGM12); |
| |
| // Prescale 8 |
| TCCR1B &= ~(1 << CS10); |
| TCCR1B |= (1 << CS11); |
| TCCR1B &= ~(1 << CS12); |
| |
| // Compare every 100us at 20MHz |
| OCR1A = 250; |
| |
| // Compare Interrupt enable |
| TIMSK1 |= (1 << OCIE1A); |
| } |
| |
| // every 100us |
| |
| ISR(TIMER1_COMPA_vect, ISR_BLOCK) { |
| |
| // every 100us |
| led_timer_callback(); |
| } |