Subversion Repositories MK3Mag

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Regard whitespace Rev 22 → Rev 23

/branches/MK3Mag V0.14 Code Redesign Killagreg/twislave.c
64,18 → 64,17
#include "led.h"
 
 
uint8_t I2C_RxBufferSize = 0, I2C_TxBufferSize = 0;
uint8_t *I2C_TxBuffer = 0, *I2C_RxBuffer = 0;
uint8_t Tx_Idx = 0, Rx_Idx = 0;
volatile uint8_t I2C_RxBufferSize = 0, I2C_TxBufferSize = 0;
volatile uint8_t *I2C_TxBuffer = 0, *I2C_RxBuffer = 0;
volatile uint8_t Tx_Idx = 0, Rx_Idx = 0;
 
 
 
I2C_Heading_t I2C_Heading;
I2C_WriteAttitude_t I2C_WriteAttitude;
I2C_Mag_t I2C_Mag;
I2C_EEPROM_t I2C_ReadEEPROM, I2C_WriteEEPROM;
I2C_Version_t I2C_Version;
I2C_WriteCal_t I2C_WriteCal;
struct I2C_Heading_t I2C_Heading;
struct I2C_WriteAttitude_t I2C_WriteAttitude;
struct I2C_Mag_t I2C_Mag;
struct I2C_Version_t I2C_Version;
struct I2C_WriteCal_t I2C_WriteCal;
 
 
void I2C_Init(void)
90,9 → 89,9
 
// SCK/SCL and MISO/SDA are at put together on the same connector pin in the schematic
 
// set PB4 (SCK) and PB5 (MISO) as input tristate
// set PB4 (SCK) and PB5 (MISO) as input pull up
DDRB &= ~((1<<DDB4)|(1<<DDB5));
PORTB &= ~((1<<PORTB4)|(1<<PORTB5));
PORTB |= ((1<<PORTB4)|(1<<PORTB5));
 
// set PC4 (SDA) and PC5 (SCL) as input tristate
DDRC &= ~((1<<DDC4)|(1<<DDC5));
119,9 → 118,7
// disable TWI STOP Condition Bit (TWSTO = 0), SLAVE
// enable TWI (TWEN = 1)
// enable TWI Interrupt (TWIE = 1)
TWCR &= ~((1<<TWSTA)|(1<<TWSTO));
TWCR |= (1<<TWEA)|(1<<TWEN)|(1<<TWIE);
 
TWCR |= (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(0<<TWWC);
// update version info
I2C_Version.Major = VERSION_MAJOR;
I2C_Version.Minor = VERSION_MINOR;
138,11 → 135,12
// switched to the non adressed slave mode
#define TWCR_RESET TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWWC)
// The bit pattern for TWCR_ACK and TWCR_RESET are equal. This is no errro but used for better understanding.
#define TWCR_CLEARBUS TWCR =(1<<TWEA) | (1<<TWSTO) | (1<<TWINT) | (1<<TWEN) | (1<<TWIE)
#define TWCR_CLEARBUS TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(0<<TWWC)
 
ISR (TWI_vect)
{
uint8_t data;
 
// check event
switch (TW_STATUS)
{
149,6 → 147,7
case TW_SR_SLA_ACK: // slave addressed in receiver mode and ack has been returned
Rx_Idx = 0xFF; // reset rx buffer pointer
TWCR_ACK; // trigger receiving of first data byte and send ack afterwards
LED_GRN_TOGGLE;
return;
 
case TW_SR_DATA_ACK: // data has been received and ack has been returned
160,31 → 159,21
case I2C_CMD_VERSION:
I2C_TxBuffer = (uint8_t *)&I2C_Version;
I2C_TxBufferSize = sizeof(I2C_Version);
I2C_RxBuffer = 0;
I2C_RxBufferSize = 0;
break;
 
case I2C_CMD_WRITE_EEPROM:
I2C_TxBufferSize = 0;
I2C_RxBuffer = (uint8_t *)&I2C_WriteEEPROM;
I2C_RxBufferSize = sizeof(I2C_WriteEEPROM);
break;
 
case I2C_CMD_WRITE_CAL:
I2C_TxBuffer = 0;
I2C_TxBufferSize = 0;
I2C_RxBuffer = (uint8_t *)&I2C_WriteCal;
I2C_RxBufferSize = sizeof(I2C_WriteCal);
break;
 
case I2C_CMD_READ_EEPROM:
I2C_TxBuffer = (uint8_t *)&I2C_ReadEEPROM.Content;
I2C_TxBufferSize = 2;
I2C_RxBuffer = (uint8_t *)&I2C_ReadEEPROM;
I2C_RxBufferSize = 1;
break;
 
case I2C_CMD_READ_MAG:
I2C_TxBuffer = (uint8_t *)&I2C_Mag;
I2C_TxBufferSize = sizeof(I2C_Mag);
I2C_RxBuffer = 0;
I2C_RxBufferSize = 0;
 
I2C_Mag.MagX = MagnetX;
203,7 → 192,7
ExternData.Attitude[NICK] = I2C_WriteAttitude.Nick;
ExternData.Attitude[ROLL] = I2C_WriteAttitude.Roll;
break;
default:
default: // unknown command id
I2C_RxBuffer = 0;
I2C_RxBufferSize = 0;
I2C_TxBuffer = 0;
211,64 → 200,50
break;
}
Rx_Idx = 0; // set rx buffer index to start of the buffer
if(I2C_RxBufferSize > 1) TWCR_ACK; // prepare receiving of next byte and send ACK afterwards
else TWCR_NACK; // prepare receiving of next byte and send NACK afterwards
}
else // Rx_Idx != 0xFF
{
// fill receiver buffer with byte that has been received
// if buffer exist
if(I2C_RxBuffer != 0)
{ // and there is still some free space
if (Rx_Idx < I2C_RxBufferSize) I2C_RxBuffer[Rx_Idx++] = data;
// if there is space for more than one byte
if(Rx_Idx < (I2C_RxBufferSize - 1)) TWCR_ACK;
// with the next incomming byte the rx buffer is full
else TWCR_NACK;
// fill receiver buffer with the byte that has been received
// if buffer exist and there is still some free space
if((I2C_RxBuffer != 0) && (Rx_Idx < I2C_RxBufferSize))
{
I2C_RxBuffer[Rx_Idx++] = data;
}
// rx buffer does not exist
else TWCR_NACK; // prepare receiving of next byte and send NACK afterwards
// else ignore the data
}
TWCR_ACK;
return;
 
case TW_SR_DATA_NACK: // data has been received and NACK has been returned
// read the last byte that is expected
data = TWDR;
if((I2C_RxBuffer != 0) && (Rx_Idx != 0xFF))
{ // and there is still some free space
if (Rx_Idx < I2C_RxBufferSize) I2C_RxBuffer[Rx_Idx++] = data;
}
TWCR_RESET; // switched to the non adressed slave mode
return;
 
case TW_ST_SLA_ACK: // slave transmitter selected
// reset position in tx buffer
// reset index to start of tx buffer
Tx_Idx = 0;
case TW_ST_DATA_ACK: // data byte has been transmitted ack has been received
// put next byte from tx buffer to twi data register
if(I2C_TxBuffer != 0)
// if tx bufer exist and there is at least ine byte to transfer
if((I2C_TxBuffer != 0) && (I2C_TxBufferSize > 1))
{
if (Tx_Idx < I2C_TxBufferSize)
{
TWDR = I2C_TxBuffer[Tx_Idx++];
if(Tx_Idx + 1 < I2C_TxBufferSize) TWCR_ACK; // more than one byte to send
else TWCR_NACK; // last byte was send NACK should be received
}
else
{ //
{ // send 0x00 if no tx buffer exist or all bytes of the tx buffer have been transmitted
TWDR = 0x00;
TWCR_NACK;// NACK should be received
}
TWCR_ACK;
return;
 
case TW_ST_DATA_ACK: // data byte has been transmitted ack has been received
// put next byte from tx buffer to the data register
if((I2C_TxBuffer != 0) && (Tx_Idx < I2C_TxBufferSize))
{
TWDR = I2C_TxBuffer[Tx_Idx++];
}
else // buffer not existent
{
else
{ // send dummy byte instead
TWDR = 0x00;
TWCR_NACK;// NACK should be received
}
TWCR_ACK;
return;
 
case TW_BUS_ERROR: // Bus-Error
TWCR_CLEARBUS; // free bus reset to nonselected slave
TWCR_CLEARBUS; // free bus, reset to nonselected slave
return;
 
case TW_ST_DATA_NACK: // data transmitted, NACK received