0,0 → 1,4807 |
|
BrushLess-Ctrl_V0_41_10A.elf: file format elf32-avr |
|
Sections: |
Idx Name Size VMA LMA File off Algn |
0 .text 00001bca 00000000 00000000 00000094 2**1 |
CONTENTS, ALLOC, LOAD, READONLY, CODE |
1 .data 00000018 00800060 00001bca 00001c5e 2**0 |
CONTENTS, ALLOC, LOAD, DATA |
2 .bss 00000328 00800078 00800078 00001c76 2**0 |
ALLOC |
3 .debug_aranges 000000e0 00000000 00000000 00001c76 2**0 |
CONTENTS, READONLY, DEBUGGING |
4 .debug_pubnames 000005da 00000000 00000000 00001d56 2**0 |
CONTENTS, READONLY, DEBUGGING |
5 .debug_info 00001379 00000000 00000000 00002330 2**0 |
CONTENTS, READONLY, DEBUGGING |
6 .debug_abbrev 0000077a 00000000 00000000 000036a9 2**0 |
CONTENTS, READONLY, DEBUGGING |
7 .debug_line 00001739 00000000 00000000 00003e23 2**0 |
CONTENTS, READONLY, DEBUGGING |
8 .debug_frame 000002e0 00000000 00000000 0000555c 2**2 |
CONTENTS, READONLY, DEBUGGING |
9 .debug_str 000005bf 00000000 00000000 0000583c 2**0 |
CONTENTS, READONLY, DEBUGGING |
10 .debug_loc 0000073a 00000000 00000000 00005dfb 2**0 |
CONTENTS, READONLY, DEBUGGING |
11 .debug_ranges 00000018 00000000 00000000 00006535 2**0 |
CONTENTS, READONLY, DEBUGGING |
|
Disassembly of section .text: |
|
00000000 <__vectors>: |
0: 12 c0 rjmp .+36 ; 0x26 <__ctors_end> |
2: 50 ca rjmp .-2912 ; 0xfffff4a4 <__eeprom_end+0xff7ef4a4> |
4: 2b c0 rjmp .+86 ; 0x5c <__bad_interrupt> |
6: 2a c0 rjmp .+84 ; 0x5c <__bad_interrupt> |
8: b5 ca rjmp .-2710 ; 0xfffff574 <__eeprom_end+0xff7ef574> |
a: b5 c9 rjmp .-3222 ; 0xfffff376 <__eeprom_end+0xff7ef376> |
c: 27 c0 rjmp .+78 ; 0x5c <__bad_interrupt> |
e: 26 c0 rjmp .+76 ; 0x5c <__bad_interrupt> |
10: a1 c9 rjmp .-3262 ; 0xfffff354 <__eeprom_end+0xff7ef354> |
12: a9 c8 rjmp .-3758 ; 0xfffff166 <__eeprom_end+0xff7ef166> |
14: 23 c0 rjmp .+70 ; 0x5c <__bad_interrupt> |
16: 65 c7 rjmp .+3786 ; 0xee2 <__vector_11> |
18: 21 c0 rjmp .+66 ; 0x5c <__bad_interrupt> |
1a: 3a c6 rjmp .+3188 ; 0xc90 <__vector_13> |
1c: 1f c0 rjmp .+62 ; 0x5c <__bad_interrupt> |
1e: 1e c0 rjmp .+60 ; 0x5c <__bad_interrupt> |
20: 22 cb rjmp .-2492 ; 0xfffff666 <__eeprom_end+0xff7ef666> |
22: 57 ca rjmp .-2898 ; 0xfffff4d2 <__eeprom_end+0xff7ef4d2> |
24: 1b c0 rjmp .+54 ; 0x5c <__bad_interrupt> |
|
00000026 <__ctors_end>: |
26: 11 24 eor r1, r1 |
28: 1f be out 0x3f, r1 ; 63 |
2a: cf e5 ldi r28, 0x5F ; 95 |
2c: d4 e0 ldi r29, 0x04 ; 4 |
2e: de bf out 0x3e, r29 ; 62 |
30: cd bf out 0x3d, r28 ; 61 |
|
00000032 <__do_copy_data>: |
32: 10 e0 ldi r17, 0x00 ; 0 |
34: a0 e6 ldi r26, 0x60 ; 96 |
36: b0 e0 ldi r27, 0x00 ; 0 |
38: ea ec ldi r30, 0xCA ; 202 |
3a: fb e1 ldi r31, 0x1B ; 27 |
3c: 02 c0 rjmp .+4 ; 0x42 <.do_copy_data_start> |
|
0000003e <.do_copy_data_loop>: |
3e: 05 90 lpm r0, Z+ |
40: 0d 92 st X+, r0 |
|
00000042 <.do_copy_data_start>: |
42: a8 37 cpi r26, 0x78 ; 120 |
44: b1 07 cpc r27, r17 |
46: d9 f7 brne .-10 ; 0x3e <.do_copy_data_loop> |
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00000048 <__do_clear_bss>: |
48: 13 e0 ldi r17, 0x03 ; 3 |
4a: a8 e7 ldi r26, 0x78 ; 120 |
4c: b0 e0 ldi r27, 0x00 ; 0 |
4e: 01 c0 rjmp .+2 ; 0x52 <.do_clear_bss_start> |
|
00000050 <.do_clear_bss_loop>: |
50: 1d 92 st X+, r1 |
|
00000052 <.do_clear_bss_start>: |
52: a0 3a cpi r26, 0xA0 ; 160 |
54: b1 07 cpc r27, r17 |
56: e1 f7 brne .-8 ; 0x50 <.do_clear_bss_loop> |
58: 46 d4 rcall .+2188 ; 0x8e6 <main> |
5a: b5 cd rjmp .-1174 ; 0xfffffbc6 <__eeprom_end+0xff7efbc6> |
|
0000005c <__bad_interrupt>: |
5c: d1 cf rjmp .-94 ; 0x0 <__vectors> |
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0000005e <SetPWM>: |
// |
void SetPWM(void) |
//############################################################################ |
{ |
unsigned char tmp_pwm; |
tmp_pwm = PWM; |
5e: 40 91 78 00 lds r20, 0x0078 |
if(tmp_pwm > MaxPWM) // Strombegrenzung |
62: 80 91 64 00 lds r24, 0x0064 |
66: 84 17 cp r24, r20 |
68: 10 f4 brcc .+4 ; 0x6e <SetPWM+0x10> |
{ |
tmp_pwm = MaxPWM; |
PORTC |= ROT; |
6a: ab 9a sbi 0x15, 3 ; 21 |
6c: 48 2f mov r20, r24 |
} |
if(Strom > MAX_STROM) // Strombegrenzung |
6e: 20 91 7a 00 lds r18, 0x007A |
72: 30 91 7b 00 lds r19, 0x007B |
76: 29 3c cpi r18, 0xC9 ; 201 |
78: 31 05 cpc r19, r1 |
7a: c8 f0 brcs .+50 ; 0xae <SetPWM+0x50> |
{ |
OCR1A = 0; OCR1B = 0; OCR2 = 0; |
7c: 1b bc out 0x2b, r1 ; 43 |
7e: 1a bc out 0x2a, r1 ; 42 |
80: 19 bc out 0x29, r1 ; 41 |
82: 18 bc out 0x28, r1 ; 40 |
84: 13 bc out 0x23, r1 ; 35 |
PORTD &= ~0x38; |
86: 82 b3 in r24, 0x12 ; 18 |
88: 87 7c andi r24, 0xC7 ; 199 |
8a: 82 bb out 0x12, r24 ; 18 |
PORTC |= ROT; |
8c: ab 9a sbi 0x15, 3 ; 21 |
DebugOut.Analog[6]++; |
8e: 80 91 90 03 lds r24, 0x0390 |
92: 90 91 91 03 lds r25, 0x0391 |
96: 01 96 adiw r24, 0x01 ; 1 |
98: 90 93 91 03 sts 0x0391, r25 |
9c: 80 93 90 03 sts 0x0390, r24 |
Strom--; |
a0: 21 50 subi r18, 0x01 ; 1 |
a2: 30 40 sbci r19, 0x00 ; 0 |
a4: 30 93 7b 00 sts 0x007B, r19 |
a8: 20 93 7a 00 sts 0x007A, r18 |
ac: 08 95 ret |
OCR1A = tmp_pwm; OCR1B = tmp_pwm; OCR2 = tmp_pwm; |
#endif |
|
#ifdef _16KHZ |
//OCR1A = 2 * (int)tmp_pwm; OCR1B = 2 * (int)tmp_pwm; OCR2 = tmp_pwm; |
OCR1A = tmp_pwm; OCR1B = tmp_pwm; OCR2 = tmp_pwm; |
ae: 84 2f mov r24, r20 |
b0: 90 e0 ldi r25, 0x00 ; 0 |
b2: 9b bd out 0x2b, r25 ; 43 |
b4: 8a bd out 0x2a, r24 ; 42 |
b6: 99 bd out 0x29, r25 ; 41 |
b8: 88 bd out 0x28, r24 ; 40 |
ba: 43 bd out 0x23, r20 ; 35 |
bc: 08 95 ret |
|
000000be <DebugAusgaben>: |
} |
} |
|
void DebugAusgaben(void) |
{ |
DebugOut.Analog[0] = Strom; |
be: e4 e8 ldi r30, 0x84 ; 132 |
c0: f3 e0 ldi r31, 0x03 ; 3 |
c2: 80 91 7a 00 lds r24, 0x007A |
c6: 90 91 7b 00 lds r25, 0x007B |
ca: 90 93 85 03 sts 0x0385, r25 |
ce: 80 93 84 03 sts 0x0384, r24 |
DebugOut.Analog[1] = Mittelstrom; |
d2: 80 91 7d 00 lds r24, 0x007D |
d6: 80 93 86 03 sts 0x0386, r24 |
da: 13 82 std Z+3, r1 ; 0x03 |
DebugOut.Analog[2] = SIO_Drehzahl; |
dc: 80 91 8b 00 lds r24, 0x008B |
e0: 90 91 8c 00 lds r25, 0x008C |
e4: 90 93 89 03 sts 0x0389, r25 |
e8: 80 93 88 03 sts 0x0388, r24 |
DebugOut.Analog[3] = PPM_Signal; |
ec: 80 91 a5 00 lds r24, 0x00A5 |
f0: 90 91 a6 00 lds r25, 0x00A6 |
f4: 90 93 8b 03 sts 0x038B, r25 |
f8: 80 93 8a 03 sts 0x038A, r24 |
DebugOut.Analog[4] = OCR2; |
fc: 83 b5 in r24, 0x23 ; 35 |
fe: 80 93 8c 03 sts 0x038C, r24 |
102: 11 86 std Z+9, r1 ; 0x09 |
// DebugOut.Analog[5] = PWM; |
} |
104: 08 95 ret |
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00000106 <PWM_Init>: |
//############################################################################ |
// |
void PWM_Init(void) |
//############################################################################ |
{ |
PWM_OFF; |
106: 1b bc out 0x2b, r1 ; 43 |
108: 1a bc out 0x2a, r1 ; 42 |
10a: 19 bc out 0x29, r1 ; 41 |
10c: 18 bc out 0x28, r1 ; 40 |
10e: 13 bc out 0x23, r1 ; 35 |
110: 91 e0 ldi r25, 0x01 ; 1 |
112: 9f bd out 0x2f, r25 ; 47 |
114: 81 e4 ldi r24, 0x41 ; 65 |
116: 85 bd out 0x25, r24 ; 37 |
118: 8e e0 ldi r24, 0x0E ; 14 |
11a: 87 bb out 0x17, r24 ; 23 |
11c: 88 b3 in r24, 0x18 ; 24 |
11e: 81 7f andi r24, 0xF1 ; 241 |
120: 88 bb out 0x18, r24 ; 24 |
TCCR1B = (1 << CS10) | (0 << CS11) | (0 << CS12) | (0 << WGM12) | |
122: 9e bd out 0x2e, r25 ; 46 |
(0 << WGM13) | (0<< ICES1) | (0 << ICNC1); |
/* TCCR1B = (1 << CS10) | (0 << CS11) | (0 << CS12) | (1 << WGM12) | |
(0 << WGM13) | (0<< ICES1) | (0 << ICNC1); |
*/ |
} |
124: 08 95 ret |
|
00000126 <Wait>: |
//############################################################################ |
// |
void Wait(unsigned char dauer) |
//############################################################################ |
{ |
dauer = (unsigned char)TCNT0 + dauer; |
126: 92 b7 in r25, 0x32 ; 50 |
128: 98 0f add r25, r24 |
while((TCNT0 - dauer) & 0x80); |
12a: 82 b7 in r24, 0x32 ; 50 |
12c: 89 1b sub r24, r25 |
12e: 87 fd sbrc r24, 7 |
130: fc cf rjmp .-8 ; 0x12a <Wait+0x4> |
} |
132: 08 95 ret |
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00000134 <Delay>: |
} |
return(0); |
} |
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unsigned char Delay(unsigned int timer) |
{ |
134: 01 c0 rjmp .+2 ; 0x138 <Delay+0x4> |
while(timer--) |
{ |
// if(SENSE_H) { PORTC |= ROT; } else { PORTC &= ~ROT;} |
asm volatile(""); |
136: 01 97 sbiw r24, 0x01 ; 1 |
return(0); |
} |
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unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
138: 00 97 sbiw r24, 0x00 ; 0 |
13a: e9 f7 brne .-6 ; 0x136 <Delay+0x2> |
{ |
// if(SENSE_H) { PORTC |= ROT; } else { PORTC &= ~ROT;} |
asm volatile(""); |
} |
return(0); |
} |
13c: 80 e0 ldi r24, 0x00 ; 0 |
13e: 08 95 ret |
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00000140 <SollwertErmittlung>: |
unsigned char SollwertErmittlung(void) |
//############################################################################ |
{ |
static unsigned int sollwert = 0; |
unsigned int ppm; |
if(!I2C_Timeout) // bei Erreichen von 0 ist der Wert ungültig |
140: 80 91 80 00 lds r24, 0x0080 |
144: 90 91 81 00 lds r25, 0x0081 |
148: 89 2b or r24, r25 |
14a: 09 f0 breq .+2 ; 0x14e <SollwertErmittlung+0xe> |
14c: 59 c0 rjmp .+178 ; 0x200 <SollwertErmittlung+0xc0> |
{ |
if(SIO_Timeout) // es gibt gültige SIO-Daten |
14e: 80 91 82 00 lds r24, 0x0082 |
152: 90 91 83 00 lds r25, 0x0083 |
156: 89 2b or r24, r25 |
158: 99 f0 breq .+38 ; 0x180 <SollwertErmittlung+0x40> |
{ |
sollwert = (MAX_PWM * (unsigned int) SIO_Sollwert) / 200; // skalieren auf 0-200 = 0-255 |
15a: 90 91 90 00 lds r25, 0x0090 |
15e: 8f ef ldi r24, 0xFF ; 255 |
160: 98 9f mul r25, r24 |
162: c0 01 movw r24, r0 |
164: 11 24 eor r1, r1 |
166: 68 ec ldi r22, 0xC8 ; 200 |
168: 70 e0 ldi r23, 0x00 ; 0 |
16a: 86 db rcall .-2292 ; 0xfffff878 <__eeprom_end+0xff7ef878> |
16c: 70 93 8f 00 sts 0x008F, r23 |
170: 60 93 8e 00 sts 0x008E, r22 |
PPM_Betrieb = 0; |
174: 10 92 67 00 sts 0x0067, r1 |
ICP_INT_DISABLE; |
178: 89 b7 in r24, 0x39 ; 57 |
17a: 8f 7d andi r24, 0xDF ; 223 |
17c: 89 bf out 0x39, r24 ; 57 |
17e: 31 c0 rjmp .+98 ; 0x1e2 <SollwertErmittlung+0xa2> |
PORTC &= ~ROT; |
} |
else |
if(anz_ppm_werte > 20) // es gibt gültige PPM-Daten |
180: 80 91 a9 00 lds r24, 0x00A9 |
184: 85 31 cpi r24, 0x15 ; 21 |
186: 78 f1 brcs .+94 ; 0x1e6 <SollwertErmittlung+0xa6> |
{ |
PPM_Betrieb = 1; |
188: 81 e0 ldi r24, 0x01 ; 1 |
18a: 80 93 67 00 sts 0x0067, r24 |
ppm = PPM_Signal; |
18e: 20 91 a5 00 lds r18, 0x00A5 |
192: 30 91 a6 00 lds r19, 0x00A6 |
if(ppm > 300) ppm = 0; // ungültiges Signal |
196: 41 e0 ldi r20, 0x01 ; 1 |
198: 2d 32 cpi r18, 0x2D ; 45 |
19a: 34 07 cpc r19, r20 |
19c: 30 f4 brcc .+12 ; 0x1aa <SollwertErmittlung+0x6a> |
if(ppm > 200) ppm = 200; |
19e: 29 3c cpi r18, 0xC9 ; 201 |
1a0: 31 05 cpc r19, r1 |
1a2: 40 f4 brcc .+16 ; 0x1b4 <SollwertErmittlung+0x74> |
if(ppm <= MIN_PPM) sollwert = 0; |
1a4: 2b 30 cpi r18, 0x0B ; 11 |
1a6: 31 05 cpc r19, r1 |
1a8: 38 f4 brcc .+14 ; 0x1b8 <SollwertErmittlung+0x78> |
1aa: 10 92 8f 00 sts 0x008F, r1 |
1ae: 10 92 8e 00 sts 0x008E, r1 |
1b2: 17 c0 rjmp .+46 ; 0x1e2 <SollwertErmittlung+0xa2> |
1b4: 28 ec ldi r18, 0xC8 ; 200 |
1b6: 30 e0 ldi r19, 0x00 ; 0 |
else |
{ |
sollwert = (int) MIN_PWM + ((MAX_PWM - MIN_PWM) * (ppm - MIN_PPM)) / (190 - MIN_PPM); |
1b8: 8c ef ldi r24, 0xFC ; 252 |
1ba: 90 e0 ldi r25, 0x00 ; 0 |
1bc: ac 01 movw r20, r24 |
1be: 24 9f mul r18, r20 |
1c0: c0 01 movw r24, r0 |
1c2: 25 9f mul r18, r21 |
1c4: 90 0d add r25, r0 |
1c6: 34 9f mul r19, r20 |
1c8: 90 0d add r25, r0 |
1ca: 11 24 eor r1, r1 |
1cc: 88 5d subi r24, 0xD8 ; 216 |
1ce: 99 40 sbci r25, 0x09 ; 9 |
1d0: 64 eb ldi r22, 0xB4 ; 180 |
1d2: 70 e0 ldi r23, 0x00 ; 0 |
1d4: 51 db rcall .-2398 ; 0xfffff878 <__eeprom_end+0xff7ef878> |
1d6: 6d 5f subi r22, 0xFD ; 253 |
1d8: 7f 4f sbci r23, 0xFF ; 255 |
1da: 70 93 8f 00 sts 0x008F, r23 |
1de: 60 93 8e 00 sts 0x008E, r22 |
} |
PORTC &= ~ROT; |
1e2: ab 98 cbi 0x15, 3 ; 21 |
1e4: 19 c0 rjmp .+50 ; 0x218 <SollwertErmittlung+0xd8> |
} |
else // Kein gültiger Sollwert |
{ |
if(!TEST_SCHUB) { if(sollwert) sollwert--; } |
1e6: 80 91 8e 00 lds r24, 0x008E |
1ea: 90 91 8f 00 lds r25, 0x008F |
1ee: 00 97 sbiw r24, 0x00 ; 0 |
1f0: 29 f0 breq .+10 ; 0x1fc <SollwertErmittlung+0xbc> |
1f2: 01 97 sbiw r24, 0x01 ; 1 |
1f4: 90 93 8f 00 sts 0x008F, r25 |
1f8: 80 93 8e 00 sts 0x008E, r24 |
PORTC |= ROT; |
1fc: ab 9a sbi 0x15, 3 ; 21 |
1fe: 0c c0 rjmp .+24 ; 0x218 <SollwertErmittlung+0xd8> |
} |
} |
else // I2C-Daten sind gültig |
{ |
sollwert = I2C_RXBuffer; |
200: 80 91 95 03 lds r24, 0x0395 |
204: 80 93 8e 00 sts 0x008E, r24 |
208: 10 92 8f 00 sts 0x008F, r1 |
PPM_Betrieb = 0; |
20c: 10 92 67 00 sts 0x0067, r1 |
PORTC &= ~ROT; |
210: ab 98 cbi 0x15, 3 ; 21 |
ICP_INT_DISABLE; |
212: 89 b7 in r24, 0x39 ; 57 |
214: 8f 7d andi r24, 0xDF ; 223 |
216: 89 bf out 0x39, r24 ; 57 |
} |
if(sollwert > MAX_PWM) sollwert = MAX_PWM; |
218: 80 91 8e 00 lds r24, 0x008E |
21c: 90 91 8f 00 lds r25, 0x008F |
220: 8f 3f cpi r24, 0xFF ; 255 |
222: 91 05 cpc r25, r1 |
224: 39 f0 breq .+14 ; 0x234 <SollwertErmittlung+0xf4> |
226: 30 f0 brcs .+12 ; 0x234 <SollwertErmittlung+0xf4> |
228: 8f ef ldi r24, 0xFF ; 255 |
22a: 90 e0 ldi r25, 0x00 ; 0 |
22c: 90 93 8f 00 sts 0x008F, r25 |
230: 80 93 8e 00 sts 0x008E, r24 |
return(sollwert); |
} |
234: 80 91 8e 00 lds r24, 0x008E |
238: 08 95 ret |
|
0000023a <DelayM>: |
*/ |
|
|
#define TEST_STROMGRENZE 120 |
unsigned char DelayM(unsigned int timer) |
{ |
23a: cf 93 push r28 |
23c: df 93 push r29 |
23e: ec 01 movw r28, r24 |
240: 17 c0 rjmp .+46 ; 0x270 <DelayM+0x36> |
while(timer--) |
{ |
FastADConvert(); |
242: 5f d8 rcall .-3906 ; 0xfffff302 <__eeprom_end+0xff7ef302> |
244: 21 97 sbiw r28, 0x01 ; 1 |
if(Strom > (TEST_STROMGRENZE + RuheStrom)) |
246: 80 91 b5 02 lds r24, 0x02B5 |
24a: 90 91 b6 02 lds r25, 0x02B6 |
24e: 88 58 subi r24, 0x88 ; 136 |
250: 9f 4f sbci r25, 0xFF ; 255 |
252: 20 91 7a 00 lds r18, 0x007A |
256: 30 91 7b 00 lds r19, 0x007B |
25a: 82 17 cp r24, r18 |
25c: 93 07 cpc r25, r19 |
25e: 40 f4 brcc .+16 ; 0x270 <DelayM+0x36> |
{ |
FETS_OFF; |
260: 82 b3 in r24, 0x12 ; 18 |
262: 87 7c andi r24, 0xC7 ; 199 |
264: 82 bb out 0x12, r24 ; 18 |
266: 88 b3 in r24, 0x18 ; 24 |
268: 81 7f andi r24, 0xF1 ; 241 |
26a: 88 bb out 0x18, r24 ; 24 |
26c: 81 e0 ldi r24, 0x01 ; 1 |
26e: 03 c0 rjmp .+6 ; 0x276 <DelayM+0x3c> |
|
|
#define TEST_STROMGRENZE 120 |
unsigned char DelayM(unsigned int timer) |
{ |
while(timer--) |
270: 20 97 sbiw r28, 0x00 ; 0 |
272: 39 f7 brne .-50 ; 0x242 <DelayM+0x8> |
274: 80 e0 ldi r24, 0x00 ; 0 |
FETS_OFF; |
return(1); |
} |
} |
return(0); |
} |
276: df 91 pop r29 |
278: cf 91 pop r28 |
27a: 08 95 ret |
|
0000027c <RotBlink>: |
dauer = (unsigned char)TCNT0 + dauer; |
while((TCNT0 - dauer) & 0x80); |
} |
|
void RotBlink(unsigned char anz) |
{ |
27c: 1f 93 push r17 |
27e: 18 2f mov r17, r24 |
sei(); // Interrupts ein |
280: 78 94 sei |
282: 09 c0 rjmp .+18 ; 0x296 <RotBlink+0x1a> |
while(anz--) |
{ |
PORTC |= ROT; |
284: ab 9a sbi 0x15, 3 ; 21 |
Delay_ms(300); |
286: 8c e2 ldi r24, 0x2C ; 44 |
288: 91 e0 ldi r25, 0x01 ; 1 |
28a: d2 d7 rcall .+4004 ; 0x1230 <Delay_ms> |
PORTC &= ~ROT; |
28c: ab 98 cbi 0x15, 3 ; 21 |
Delay_ms(300); |
28e: 8c e2 ldi r24, 0x2C ; 44 |
290: 91 e0 ldi r25, 0x01 ; 1 |
292: ce d7 rcall .+3996 ; 0x1230 <Delay_ms> |
294: 11 50 subi r17, 0x01 ; 1 |
} |
|
void RotBlink(unsigned char anz) |
{ |
sei(); // Interrupts ein |
while(anz--) |
296: 11 23 and r17, r17 |
298: a9 f7 brne .-22 ; 0x284 <RotBlink+0x8> |
PORTC |= ROT; |
Delay_ms(300); |
PORTC &= ~ROT; |
Delay_ms(300); |
} |
Delay_ms(1000); |
29a: 88 ee ldi r24, 0xE8 ; 232 |
29c: 93 e0 ldi r25, 0x03 ; 3 |
29e: c8 d7 rcall .+3984 ; 0x1230 <Delay_ms> |
} |
2a0: 1f 91 pop r17 |
2a2: 08 95 ret |
|
000002a4 <MotorTon>: |
#define LOW_B_EIN PORTD |= 0x10 |
#define LOW_C_EIN PORTD |= 0x20 |
|
void MotorTon(void) |
//############################################################################ |
{ |
2a4: af 92 push r10 |
2a6: bf 92 push r11 |
2a8: df 92 push r13 |
2aa: ef 92 push r14 |
2ac: ff 92 push r15 |
2ae: 0f 93 push r16 |
2b0: 1f 93 push r17 |
2b2: df 93 push r29 |
2b4: cf 93 push r28 |
2b6: cd b7 in r28, 0x3d ; 61 |
2b8: de b7 in r29, 0x3e ; 62 |
2ba: 27 97 sbiw r28, 0x07 ; 7 |
2bc: 0f b6 in r0, 0x3f ; 63 |
2be: f8 94 cli |
2c0: de bf out 0x3e, r29 ; 62 |
2c2: 0f be out 0x3f, r0 ; 63 |
2c4: cd bf out 0x3d, r28 ; 61 |
unsigned char ADR_TAB[7] = {0,0,0,1,1,2,2}; |
2c6: de 01 movw r26, r28 |
2c8: 11 96 adiw r26, 0x01 ; 1 |
2ca: e8 e6 ldi r30, 0x68 ; 104 |
2cc: f0 e0 ldi r31, 0x00 ; 0 |
2ce: 87 e0 ldi r24, 0x07 ; 7 |
2d0: 01 90 ld r0, Z+ |
2d2: 0d 92 st X+, r0 |
2d4: 81 50 subi r24, 0x01 ; 1 |
2d6: e1 f7 brne .-8 ; 0x2d0 <MotorTon+0x2c> |
unsigned int timer = 300,i; |
unsigned int t = 0; |
unsigned char anz = 0,MosfetOkay = 0, grenze = 50; |
|
PORTC &= ~ROT; |
2d8: ab 98 cbi 0x15, 3 ; 21 |
Delay_ms(300 * ADR_TAB[MotorAdresse]); |
2da: 80 91 66 00 lds r24, 0x0066 |
2de: fe 01 movw r30, r28 |
2e0: e8 0f add r30, r24 |
2e2: f1 1d adc r31, r1 |
2e4: 81 81 ldd r24, Z+1 ; 0x01 |
2e6: 90 e0 ldi r25, 0x00 ; 0 |
2e8: 2c e2 ldi r18, 0x2C ; 44 |
2ea: 31 e0 ldi r19, 0x01 ; 1 |
2ec: ac 01 movw r20, r24 |
2ee: 42 9f mul r20, r18 |
2f0: c0 01 movw r24, r0 |
2f2: 43 9f mul r20, r19 |
2f4: 90 0d add r25, r0 |
2f6: 52 9f mul r21, r18 |
2f8: 90 0d add r25, r0 |
2fa: 11 24 eor r1, r1 |
2fc: 99 d7 rcall .+3890 ; 0x1230 <Delay_ms> |
DISABLE_SENSE_INT; |
2fe: 10 92 b1 00 sts 0x00B1, r1 |
302: 43 98 cbi 0x08, 3 ; 8 |
cli();//Globale Interrupts Ausschalten |
304: f8 94 cli |
uart_putchar('\n'); |
306: 8a e0 ldi r24, 0x0A ; 10 |
308: df d5 rcall .+3006 ; 0xec8 <uart_putchar> |
STEUER_OFF; |
30a: 82 b3 in r24, 0x12 ; 18 |
30c: 87 7c andi r24, 0xC7 ; 199 |
30e: 82 bb out 0x12, r24 ; 18 |
310: 1b bc out 0x2b, r1 ; 43 |
312: 1a bc out 0x2a, r1 ; 42 |
314: 19 bc out 0x29, r1 ; 41 |
316: 18 bc out 0x28, r1 ; 40 |
318: 13 bc out 0x23, r1 ; 35 |
31a: 81 e0 ldi r24, 0x01 ; 1 |
31c: 8f bd out 0x2f, r24 ; 47 |
31e: 81 e4 ldi r24, 0x41 ; 65 |
320: 85 bd out 0x25, r24 ; 37 |
322: 8e e0 ldi r24, 0x0E ; 14 |
324: 87 bb out 0x17, r24 ; 23 |
326: 88 b3 in r24, 0x18 ; 24 |
328: 81 7f andi r24, 0xF1 ; 241 |
32a: 88 bb out 0x18, r24 ; 24 |
Strom_max = 0; |
32c: 10 92 7c 00 sts 0x007C, r1 |
DelayM(50); |
330: 82 e3 ldi r24, 0x32 ; 50 |
332: 90 e0 ldi r25, 0x00 ; 0 |
334: 82 df rcall .-252 ; 0x23a <DelayM> |
RuheStrom = Strom_max; |
336: 80 91 7c 00 lds r24, 0x007C |
33a: 80 93 b5 02 sts 0x02B5, r24 |
33e: 10 92 b6 02 sts 0x02B6, r1 |
// uart_putchar(RuheStrom + 'A'); |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//+ High-Mosfets auf Kurzschluss testen |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
Strom = 0; |
342: 10 92 7b 00 sts 0x007B, r1 |
346: 10 92 7a 00 sts 0x007A, r1 |
if(anz) while(1) RotBlink(anz); // bei Kurzschluss nicht starten |
*/ |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//+ LOW-Mosfets auf Schalten und Kurzschluss testen |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
if(UDR == ' ') {t = 65535; grenze = 40; uart_putchar('_');} else t = 1000; // Ausführlicher Test |
34a: 8c b1 in r24, 0x0c ; 12 |
34c: 80 32 cpi r24, 0x20 ; 32 |
34e: 31 f0 breq .+12 ; 0x35c <MotorTon+0xb8> |
350: 38 ee ldi r19, 0xE8 ; 232 |
352: e3 2e mov r14, r19 |
354: 33 e0 ldi r19, 0x03 ; 3 |
356: f3 2e mov r15, r19 |
358: 82 e3 ldi r24, 0x32 ; 50 |
35a: 06 c0 rjmp .+12 ; 0x368 <MotorTon+0xc4> |
35c: 8f e5 ldi r24, 0x5F ; 95 |
35e: b4 d5 rcall .+2920 ; 0xec8 <uart_putchar> |
360: ee 24 eor r14, r14 |
362: ea 94 dec r14 |
364: fe 2c mov r15, r14 |
366: 88 e2 ldi r24, 0x28 ; 40 |
Strom = 0; |
368: 10 92 7b 00 sts 0x007B, r1 |
36c: 10 92 7a 00 sts 0x007A, r1 |
370: 00 e0 ldi r16, 0x00 ; 0 |
372: 10 e0 ldi r17, 0x00 ; 0 |
FETS_OFF; |
Delay(5); |
HIGH_A_EIN; |
DelayM(1); |
FETS_OFF; |
if(Strom > grenze + RuheStrom) {anz = 4; uart_putchar('4'); FETS_OFF; break;} |
374: a8 2e mov r10, r24 |
376: bb 24 eor r11, r11 |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
if(UDR == ' ') {t = 65535; grenze = 40; uart_putchar('_');} else t = 1000; // Ausführlicher Test |
Strom = 0; |
for(i=0;i<t;i++) |
{ |
LOW_A_EIN; |
378: 93 9a sbi 0x12, 3 ; 18 |
DelayM(1); |
37a: 81 e0 ldi r24, 0x01 ; 1 |
37c: 90 e0 ldi r25, 0x00 ; 0 |
37e: 5d df rcall .-326 ; 0x23a <DelayM> |
FETS_OFF; |
380: 82 b3 in r24, 0x12 ; 18 |
382: 87 7c andi r24, 0xC7 ; 199 |
384: 82 bb out 0x12, r24 ; 18 |
386: 88 b3 in r24, 0x18 ; 24 |
388: 81 7f andi r24, 0xF1 ; 241 |
38a: 88 bb out 0x18, r24 ; 24 |
Delay(5); |
HIGH_A_EIN; |
38c: c3 9a sbi 0x18, 3 ; 24 |
DelayM(1); |
38e: 81 e0 ldi r24, 0x01 ; 1 |
390: 90 e0 ldi r25, 0x00 ; 0 |
392: 53 df rcall .-346 ; 0x23a <DelayM> |
FETS_OFF; |
394: 82 b3 in r24, 0x12 ; 18 |
396: 87 7c andi r24, 0xC7 ; 199 |
398: 82 bb out 0x12, r24 ; 18 |
39a: 88 b3 in r24, 0x18 ; 24 |
39c: 81 7f andi r24, 0xF1 ; 241 |
39e: 88 bb out 0x18, r24 ; 24 |
if(Strom > grenze + RuheStrom) {anz = 4; uart_putchar('4'); FETS_OFF; break;} |
3a0: 80 91 b5 02 lds r24, 0x02B5 |
3a4: 90 91 b6 02 lds r25, 0x02B6 |
3a8: 8a 0d add r24, r10 |
3aa: 9b 1d adc r25, r11 |
3ac: 20 91 7a 00 lds r18, 0x007A |
3b0: 30 91 7b 00 lds r19, 0x007B |
3b4: 82 17 cp r24, r18 |
3b6: 93 07 cpc r25, r19 |
3b8: 38 f0 brcs .+14 ; 0x3c8 <MotorTon+0x124> |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//+ LOW-Mosfets auf Schalten und Kurzschluss testen |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
if(UDR == ' ') {t = 65535; grenze = 40; uart_putchar('_');} else t = 1000; // Ausführlicher Test |
Strom = 0; |
for(i=0;i<t;i++) |
3ba: 0f 5f subi r16, 0xFF ; 255 |
3bc: 1f 4f sbci r17, 0xFF ; 255 |
3be: 0e 15 cp r16, r14 |
3c0: 1f 05 cpc r17, r15 |
3c2: d0 f2 brcs .-76 ; 0x378 <MotorTon+0xd4> |
3c4: dd 24 eor r13, r13 |
3c6: 0a c0 rjmp .+20 ; 0x3dc <MotorTon+0x138> |
FETS_OFF; |
Delay(5); |
HIGH_A_EIN; |
DelayM(1); |
FETS_OFF; |
if(Strom > grenze + RuheStrom) {anz = 4; uart_putchar('4'); FETS_OFF; break;} |
3c8: 84 e3 ldi r24, 0x34 ; 52 |
3ca: 7e d5 rcall .+2812 ; 0xec8 <uart_putchar> |
3cc: 82 b3 in r24, 0x12 ; 18 |
3ce: 87 7c andi r24, 0xC7 ; 199 |
3d0: 82 bb out 0x12, r24 ; 18 |
3d2: 88 b3 in r24, 0x18 ; 24 |
3d4: 81 7f andi r24, 0xF1 ; 241 |
3d6: 88 bb out 0x18, r24 ; 24 |
3d8: 24 e0 ldi r18, 0x04 ; 4 |
3da: d2 2e mov r13, r18 |
3dc: 80 e1 ldi r24, 0x10 ; 16 |
3de: 97 e2 ldi r25, 0x27 ; 39 |
3e0: 00 c0 rjmp .+0 ; 0x3e2 <MotorTon+0x13e> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
3e2: 01 97 sbiw r24, 0x01 ; 1 |
3e4: 5f ef ldi r21, 0xFF ; 255 |
3e6: 8f 3f cpi r24, 0xFF ; 255 |
3e8: 95 07 cpc r25, r21 |
3ea: d9 f7 brne .-10 ; 0x3e2 <MotorTon+0x13e> |
if(Strom > grenze + RuheStrom) {anz = 4; uart_putchar('4'); FETS_OFF; break;} |
Delay(5); |
} |
Delay(10000); |
|
Strom = 0; |
3ec: 10 92 7b 00 sts 0x007B, r1 |
3f0: 10 92 7a 00 sts 0x007A, r1 |
3f4: 00 e0 ldi r16, 0x00 ; 0 |
3f6: 10 e0 ldi r17, 0x00 ; 0 |
for(i=0;i<t;i++) |
{ |
LOW_B_EIN; |
3f8: 94 9a sbi 0x12, 4 ; 18 |
DelayM(1); |
3fa: 81 e0 ldi r24, 0x01 ; 1 |
3fc: 90 e0 ldi r25, 0x00 ; 0 |
3fe: 1d df rcall .-454 ; 0x23a <DelayM> |
FETS_OFF; |
400: 82 b3 in r24, 0x12 ; 18 |
402: 87 7c andi r24, 0xC7 ; 199 |
404: 82 bb out 0x12, r24 ; 18 |
406: 88 b3 in r24, 0x18 ; 24 |
408: 81 7f andi r24, 0xF1 ; 241 |
40a: 88 bb out 0x18, r24 ; 24 |
Delay(5); |
HIGH_B_EIN; |
40c: c2 9a sbi 0x18, 2 ; 24 |
DelayM(1); |
40e: 81 e0 ldi r24, 0x01 ; 1 |
410: 90 e0 ldi r25, 0x00 ; 0 |
412: 13 df rcall .-474 ; 0x23a <DelayM> |
FETS_OFF; |
414: 82 b3 in r24, 0x12 ; 18 |
416: 87 7c andi r24, 0xC7 ; 199 |
418: 82 bb out 0x12, r24 ; 18 |
41a: 88 b3 in r24, 0x18 ; 24 |
41c: 81 7f andi r24, 0xF1 ; 241 |
41e: 88 bb out 0x18, r24 ; 24 |
if(Strom > grenze + RuheStrom) {anz = 5; uart_putchar('5'); FETS_OFF;break;} |
420: 80 91 b5 02 lds r24, 0x02B5 |
424: 90 91 b6 02 lds r25, 0x02B6 |
428: 8a 0d add r24, r10 |
42a: 9b 1d adc r25, r11 |
42c: 20 91 7a 00 lds r18, 0x007A |
430: 30 91 7b 00 lds r19, 0x007B |
434: 82 17 cp r24, r18 |
436: 93 07 cpc r25, r19 |
438: 30 f0 brcs .+12 ; 0x446 <MotorTon+0x1a2> |
Delay(5); |
} |
Delay(10000); |
|
Strom = 0; |
for(i=0;i<t;i++) |
43a: 0f 5f subi r16, 0xFF ; 255 |
43c: 1f 4f sbci r17, 0xFF ; 255 |
43e: 0e 15 cp r16, r14 |
440: 1f 05 cpc r17, r15 |
442: d0 f2 brcs .-76 ; 0x3f8 <MotorTon+0x154> |
444: 0a c0 rjmp .+20 ; 0x45a <MotorTon+0x1b6> |
FETS_OFF; |
Delay(5); |
HIGH_B_EIN; |
DelayM(1); |
FETS_OFF; |
if(Strom > grenze + RuheStrom) {anz = 5; uart_putchar('5'); FETS_OFF;break;} |
446: 85 e3 ldi r24, 0x35 ; 53 |
448: 3f d5 rcall .+2686 ; 0xec8 <uart_putchar> |
44a: 82 b3 in r24, 0x12 ; 18 |
44c: 87 7c andi r24, 0xC7 ; 199 |
44e: 82 bb out 0x12, r24 ; 18 |
450: 88 b3 in r24, 0x18 ; 24 |
452: 81 7f andi r24, 0xF1 ; 241 |
454: 88 bb out 0x18, r24 ; 24 |
456: 95 e0 ldi r25, 0x05 ; 5 |
458: d9 2e mov r13, r25 |
Delay(5); |
} |
|
Strom = 0; |
45a: 10 92 7b 00 sts 0x007B, r1 |
45e: 10 92 7a 00 sts 0x007A, r1 |
462: 80 e1 ldi r24, 0x10 ; 16 |
464: 97 e2 ldi r25, 0x27 ; 39 |
466: 00 c0 rjmp .+0 ; 0x468 <__stack+0x9> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
468: 01 97 sbiw r24, 0x01 ; 1 |
46a: 2f ef ldi r18, 0xFF ; 255 |
46c: 8f 3f cpi r24, 0xFF ; 255 |
46e: 92 07 cpc r25, r18 |
470: d9 f7 brne .-10 ; 0x468 <__stack+0x9> |
472: 00 e0 ldi r16, 0x00 ; 0 |
474: 10 e0 ldi r17, 0x00 ; 0 |
Strom = 0; |
Delay(10000); |
|
for(i=0;i<t;i++) |
{ |
LOW_C_EIN; |
476: 95 9a sbi 0x12, 5 ; 18 |
DelayM(1); |
478: 81 e0 ldi r24, 0x01 ; 1 |
47a: 90 e0 ldi r25, 0x00 ; 0 |
47c: de de rcall .-580 ; 0x23a <DelayM> |
FETS_OFF; |
47e: 82 b3 in r24, 0x12 ; 18 |
480: 87 7c andi r24, 0xC7 ; 199 |
482: 82 bb out 0x12, r24 ; 18 |
484: 88 b3 in r24, 0x18 ; 24 |
486: 81 7f andi r24, 0xF1 ; 241 |
488: 88 bb out 0x18, r24 ; 24 |
Delay(5); |
HIGH_C_EIN; |
48a: c1 9a sbi 0x18, 1 ; 24 |
DelayM(1); |
48c: 81 e0 ldi r24, 0x01 ; 1 |
48e: 90 e0 ldi r25, 0x00 ; 0 |
490: d4 de rcall .-600 ; 0x23a <DelayM> |
FETS_OFF; |
492: 82 b3 in r24, 0x12 ; 18 |
494: 87 7c andi r24, 0xC7 ; 199 |
496: 82 bb out 0x12, r24 ; 18 |
498: 88 b3 in r24, 0x18 ; 24 |
49a: 81 7f andi r24, 0xF1 ; 241 |
49c: 88 bb out 0x18, r24 ; 24 |
if(Strom > grenze + RuheStrom) {anz = 6; uart_putchar('6'); FETS_OFF; break;} |
49e: 80 91 b5 02 lds r24, 0x02B5 |
4a2: 90 91 b6 02 lds r25, 0x02B6 |
4a6: 8a 0d add r24, r10 |
4a8: 9b 1d adc r25, r11 |
4aa: 20 91 7a 00 lds r18, 0x007A |
4ae: 30 91 7b 00 lds r19, 0x007B |
4b2: 82 17 cp r24, r18 |
4b4: 93 07 cpc r25, r19 |
4b6: 30 f0 brcs .+12 ; 0x4c4 <__stack+0x65> |
} |
|
Strom = 0; |
Delay(10000); |
|
for(i=0;i<t;i++) |
4b8: 0f 5f subi r16, 0xFF ; 255 |
4ba: 1f 4f sbci r17, 0xFF ; 255 |
4bc: 0e 15 cp r16, r14 |
4be: 1f 05 cpc r17, r15 |
4c0: d0 f2 brcs .-76 ; 0x476 <__stack+0x17> |
4c2: 0b c0 rjmp .+22 ; 0x4da <__stack+0x7b> |
FETS_OFF; |
Delay(5); |
HIGH_C_EIN; |
DelayM(1); |
FETS_OFF; |
if(Strom > grenze + RuheStrom) {anz = 6; uart_putchar('6'); FETS_OFF; break;} |
4c4: 86 e3 ldi r24, 0x36 ; 54 |
4c6: 00 d5 rcall .+2560 ; 0xec8 <uart_putchar> |
4c8: 82 b3 in r24, 0x12 ; 18 |
4ca: 87 7c andi r24, 0xC7 ; 199 |
4cc: 82 bb out 0x12, r24 ; 18 |
4ce: 88 b3 in r24, 0x18 ; 24 |
4d0: 81 7f andi r24, 0xF1 ; 241 |
4d2: 88 bb out 0x18, r24 ; 24 |
4d4: 86 e0 ldi r24, 0x06 ; 6 |
4d6: d8 2e mov r13, r24 |
4d8: 02 c0 rjmp .+4 ; 0x4de <__stack+0x7f> |
Delay(5); |
} |
|
if(anz) while(1) RotBlink(anz); // bei Kurzschluss nicht starten |
4da: dd 20 and r13, r13 |
4dc: 19 f0 breq .+6 ; 0x4e4 <__stack+0x85> |
4de: 8d 2d mov r24, r13 |
4e0: cd de rcall .-614 ; 0x27c <RotBlink> |
4e2: fd cf rjmp .-6 ; 0x4de <__stack+0x7f> |
|
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//+ High-Mosfets auf Schalten testen |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
SENSE_A; |
4e4: 80 91 8d 00 lds r24, 0x008D |
4e8: 87 b9 out 0x07, r24 ; 7 |
FETS_OFF; |
4ea: 82 b3 in r24, 0x12 ; 18 |
4ec: 87 7c andi r24, 0xC7 ; 199 |
4ee: 82 bb out 0x12, r24 ; 18 |
4f0: 88 b3 in r24, 0x18 ; 24 |
4f2: 81 7f andi r24, 0xF1 ; 241 |
4f4: 88 bb out 0x18, r24 ; 24 |
LOW_B_EIN; // Low B ein |
4f6: 94 9a sbi 0x12, 4 ; 18 |
LOW_C_EIN; // Low C ein |
4f8: 95 9a sbi 0x12, 5 ; 18 |
Strom = 0; |
4fa: 10 92 7b 00 sts 0x007B, r1 |
4fe: 10 92 7a 00 sts 0x007A, r1 |
502: 00 e0 ldi r16, 0x00 ; 0 |
504: 10 e0 ldi r17, 0x00 ; 0 |
506: ff 24 eor r15, r15 |
#define SOUND2_A 330 |
#define SOUND3_A 360 |
|
for(i=0; i< (TONDAUER / SOUND2_A) ; i++) |
{ |
HIGH_A_EIN; // Test A |
508: c3 9a sbi 0x18, 3 ; 24 |
Delay(SOUND_E); |
if(MessAD(0) > 50) { MosfetOkay |= 0x01; } else { MosfetOkay &= ~0x01;}; |
50a: 80 e0 ldi r24, 0x00 ; 0 |
50c: e5 d6 rcall .+3530 ; 0x12d8 <MessAD> |
50e: c3 97 sbiw r24, 0x33 ; 51 |
510: 18 f0 brcs .+6 ; 0x518 <__stack+0xb9> |
512: 41 e0 ldi r20, 0x01 ; 1 |
514: f4 2a or r15, r20 |
516: 02 c0 rjmp .+4 ; 0x51c <__stack+0xbd> |
518: 5e ef ldi r21, 0xFE ; 254 |
51a: f5 22 and r15, r21 |
PORTB = 0; |
51c: 18 ba out 0x18, r1 ; 24 |
51e: 8c e2 ldi r24, 0x2C ; 44 |
520: 91 e0 ldi r25, 0x01 ; 1 |
522: 00 c0 rjmp .+0 ; 0x524 <__stack+0xc5> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
524: 01 97 sbiw r24, 0x01 ; 1 |
526: 2f ef ldi r18, 0xFF ; 255 |
528: 8f 3f cpi r24, 0xFF ; 255 |
52a: 92 07 cpc r25, r18 |
52c: d9 f7 brne .-10 ; 0x524 <__stack+0xc5> |
#define SOUND_E 1 // 1 |
#define SOUND1_A 300 |
#define SOUND2_A 330 |
#define SOUND3_A 360 |
|
for(i=0; i< (TONDAUER / SOUND2_A) ; i++) |
52e: 0f 5f subi r16, 0xFF ; 255 |
530: 1f 4f sbci r17, 0xFF ; 255 |
532: 09 37 cpi r16, 0x79 ; 121 |
534: 11 05 cpc r17, r1 |
536: 41 f7 brne .-48 ; 0x508 <__stack+0xa9> |
Delay(SOUND_E); |
if(MessAD(0) > 50) { MosfetOkay |= 0x01; } else { MosfetOkay &= ~0x01;}; |
PORTB = 0; |
Delay(SOUND1_A); |
} |
FETS_OFF; |
538: 82 b3 in r24, 0x12 ; 18 |
53a: 87 7c andi r24, 0xC7 ; 199 |
53c: 82 bb out 0x12, r24 ; 18 |
53e: 88 b3 in r24, 0x18 ; 24 |
540: 81 7f andi r24, 0xF1 ; 241 |
542: 88 bb out 0x18, r24 ; 24 |
|
LOW_A_EIN; // Low A ein |
544: 93 9a sbi 0x12, 3 ; 18 |
LOW_C_EIN; // Low C ein |
546: 95 9a sbi 0x12, 5 ; 18 |
548: 00 e0 ldi r16, 0x00 ; 0 |
54a: 10 e0 ldi r17, 0x00 ; 0 |
for(i=0; i<(TONDAUER / SOUND1_A); i++) |
{ |
HIGH_B_EIN; // Test B |
54c: c2 9a sbi 0x18, 2 ; 24 |
Delay(SOUND_E); |
if(MessAD(1) > 50) { MosfetOkay |= 0x02; } else { MosfetOkay &= ~0x02;}; |
54e: 81 e0 ldi r24, 0x01 ; 1 |
550: c3 d6 rcall .+3462 ; 0x12d8 <MessAD> |
552: c3 97 sbiw r24, 0x33 ; 51 |
554: 18 f0 brcs .+6 ; 0x55c <__stack+0xfd> |
556: 42 e0 ldi r20, 0x02 ; 2 |
558: f4 2a or r15, r20 |
55a: 02 c0 rjmp .+4 ; 0x560 <__stack+0x101> |
55c: 5d ef ldi r21, 0xFD ; 253 |
55e: f5 22 and r15, r21 |
PORTB = 0; |
560: 18 ba out 0x18, r1 ; 24 |
562: 8c e2 ldi r24, 0x2C ; 44 |
564: 91 e0 ldi r25, 0x01 ; 1 |
566: 00 c0 rjmp .+0 ; 0x568 <__stack+0x109> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
568: 01 97 sbiw r24, 0x01 ; 1 |
56a: 2f ef ldi r18, 0xFF ; 255 |
56c: 8f 3f cpi r24, 0xFF ; 255 |
56e: 92 07 cpc r25, r18 |
570: d9 f7 brne .-10 ; 0x568 <__stack+0x109> |
} |
FETS_OFF; |
|
LOW_A_EIN; // Low A ein |
LOW_C_EIN; // Low C ein |
for(i=0; i<(TONDAUER / SOUND1_A); i++) |
572: 0f 5f subi r16, 0xFF ; 255 |
574: 1f 4f sbci r17, 0xFF ; 255 |
576: 05 38 cpi r16, 0x85 ; 133 |
578: 11 05 cpc r17, r1 |
57a: 41 f7 brne .-48 ; 0x54c <__stack+0xed> |
if(MessAD(1) > 50) { MosfetOkay |= 0x02; } else { MosfetOkay &= ~0x02;}; |
PORTB = 0; |
Delay(SOUND1_A); |
} |
|
FETS_OFF; |
57c: 82 b3 in r24, 0x12 ; 18 |
57e: 87 7c andi r24, 0xC7 ; 199 |
580: 82 bb out 0x12, r24 ; 18 |
582: 88 b3 in r24, 0x18 ; 24 |
584: 81 7f andi r24, 0xF1 ; 241 |
586: 88 bb out 0x18, r24 ; 24 |
LOW_A_EIN; // Low A ein |
588: 93 9a sbi 0x12, 3 ; 18 |
LOW_B_EIN; // Low B ein |
58a: 94 9a sbi 0x12, 4 ; 18 |
58c: 00 e0 ldi r16, 0x00 ; 0 |
58e: 10 e0 ldi r17, 0x00 ; 0 |
for(i=0; i<(TONDAUER / SOUND3_A); i++) |
{ |
HIGH_C_EIN; // Test C |
590: c1 9a sbi 0x18, 1 ; 24 |
Delay(SOUND_E); |
if(MessAD(2) > 50) { MosfetOkay |= 0x04; } else { MosfetOkay &= ~0x04;}; |
592: 82 e0 ldi r24, 0x02 ; 2 |
594: a1 d6 rcall .+3394 ; 0x12d8 <MessAD> |
596: c3 97 sbiw r24, 0x33 ; 51 |
598: 18 f0 brcs .+6 ; 0x5a0 <__stack+0x141> |
59a: 44 e0 ldi r20, 0x04 ; 4 |
59c: f4 2a or r15, r20 |
59e: 02 c0 rjmp .+4 ; 0x5a4 <__stack+0x145> |
5a0: 5b ef ldi r21, 0xFB ; 251 |
5a2: f5 22 and r15, r21 |
PORTB = 0; |
5a4: 18 ba out 0x18, r1 ; 24 |
5a6: 8a e4 ldi r24, 0x4A ; 74 |
5a8: 91 e0 ldi r25, 0x01 ; 1 |
5aa: 00 c0 rjmp .+0 ; 0x5ac <__stack+0x14d> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
5ac: 01 97 sbiw r24, 0x01 ; 1 |
5ae: 2f ef ldi r18, 0xFF ; 255 |
5b0: 8f 3f cpi r24, 0xFF ; 255 |
5b2: 92 07 cpc r25, r18 |
5b4: d9 f7 brne .-10 ; 0x5ac <__stack+0x14d> |
} |
|
FETS_OFF; |
LOW_A_EIN; // Low A ein |
LOW_B_EIN; // Low B ein |
for(i=0; i<(TONDAUER / SOUND3_A); i++) |
5b6: 0f 5f subi r16, 0xFF ; 255 |
5b8: 1f 4f sbci r17, 0xFF ; 255 |
5ba: 0f 36 cpi r16, 0x6F ; 111 |
5bc: 11 05 cpc r17, r1 |
5be: 41 f7 brne .-48 ; 0x590 <__stack+0x131> |
Delay(SOUND_E); |
if(MessAD(2) > 50) { MosfetOkay |= 0x04; } else { MosfetOkay &= ~0x04;}; |
PORTB = 0; |
Delay(SOUND2_A); |
} |
FETS_OFF; |
5c0: 82 b3 in r24, 0x12 ; 18 |
5c2: 87 7c andi r24, 0xC7 ; 199 |
5c4: 82 bb out 0x12, r24 ; 18 |
5c6: 88 b3 in r24, 0x18 ; 24 |
5c8: 81 7f andi r24, 0xF1 ; 241 |
5ca: 88 bb out 0x18, r24 ; 24 |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//+ Low-Mosfets auf Schalten testen |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
// SENSE_B; |
LOW_A_EIN; // Low A ein |
5cc: 93 9a sbi 0x12, 3 ; 18 |
5ce: 00 e0 ldi r16, 0x00 ; 0 |
5d0: 10 e0 ldi r17, 0x00 ; 0 |
for(i=0; i< (TONDAUER / SOUND2_A) ; i++) |
{ |
HIGH_B_EIN; // Test B |
5d2: c2 9a sbi 0x18, 2 ; 24 |
Delay(SOUND_E); |
if(MessAD(0) > 128) { MosfetOkay &= ~0x08;} else { MosfetOkay |= 0x08;}; |
5d4: 80 e0 ldi r24, 0x00 ; 0 |
5d6: 80 d6 rcall .+3328 ; 0x12d8 <MessAD> |
5d8: 81 38 cpi r24, 0x81 ; 129 |
5da: 91 05 cpc r25, r1 |
5dc: 18 f0 brcs .+6 ; 0x5e4 <__stack+0x185> |
5de: 47 ef ldi r20, 0xF7 ; 247 |
5e0: f4 22 and r15, r20 |
5e2: 02 c0 rjmp .+4 ; 0x5e8 <__stack+0x189> |
5e4: 58 e0 ldi r21, 0x08 ; 8 |
5e6: f5 2a or r15, r21 |
PORTB = 0; |
5e8: 18 ba out 0x18, r1 ; 24 |
5ea: 8a e4 ldi r24, 0x4A ; 74 |
5ec: 91 e0 ldi r25, 0x01 ; 1 |
5ee: 00 c0 rjmp .+0 ; 0x5f0 <__stack+0x191> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
5f0: 01 97 sbiw r24, 0x01 ; 1 |
5f2: 2f ef ldi r18, 0xFF ; 255 |
5f4: 8f 3f cpi r24, 0xFF ; 255 |
5f6: 92 07 cpc r25, r18 |
5f8: d9 f7 brne .-10 ; 0x5f0 <__stack+0x191> |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//+ Low-Mosfets auf Schalten testen |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
// SENSE_B; |
LOW_A_EIN; // Low A ein |
for(i=0; i< (TONDAUER / SOUND2_A) ; i++) |
5fa: 0f 5f subi r16, 0xFF ; 255 |
5fc: 1f 4f sbci r17, 0xFF ; 255 |
5fe: 09 37 cpi r16, 0x79 ; 121 |
600: 11 05 cpc r17, r1 |
602: 39 f7 brne .-50 ; 0x5d2 <__stack+0x173> |
PORTB = 0; |
Delay(SOUND2_A); |
} |
|
//++++++++++++++++++++++++++++++++++++ |
LOW_C_EIN; // Low C ein |
604: 95 9a sbi 0x12, 5 ; 18 |
606: 00 e0 ldi r16, 0x00 ; 0 |
608: 10 e0 ldi r17, 0x00 ; 0 |
for(i=0; i<(TONDAUER / SOUND1_A); i++) |
{ |
HIGH_B_EIN; // Test B |
60a: c2 9a sbi 0x18, 2 ; 24 |
Delay(SOUND_E); |
if(MessAD(2) > 128) { MosfetOkay &= ~0x20;} else { MosfetOkay |= 0x20;}; |
60c: 82 e0 ldi r24, 0x02 ; 2 |
60e: 64 d6 rcall .+3272 ; 0x12d8 <MessAD> |
610: 81 38 cpi r24, 0x81 ; 129 |
612: 91 05 cpc r25, r1 |
614: 18 f0 brcs .+6 ; 0x61c <__stack+0x1bd> |
616: 4f ed ldi r20, 0xDF ; 223 |
618: f4 22 and r15, r20 |
61a: 02 c0 rjmp .+4 ; 0x620 <__stack+0x1c1> |
61c: 50 e2 ldi r21, 0x20 ; 32 |
61e: f5 2a or r15, r21 |
PORTB = 0; |
620: 18 ba out 0x18, r1 ; 24 |
622: 88 e6 ldi r24, 0x68 ; 104 |
624: 91 e0 ldi r25, 0x01 ; 1 |
626: 00 c0 rjmp .+0 ; 0x628 <__stack+0x1c9> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
628: 01 97 sbiw r24, 0x01 ; 1 |
62a: 2f ef ldi r18, 0xFF ; 255 |
62c: 8f 3f cpi r24, 0xFF ; 255 |
62e: 92 07 cpc r25, r18 |
630: d9 f7 brne .-10 ; 0x628 <__stack+0x1c9> |
Delay(SOUND2_A); |
} |
|
//++++++++++++++++++++++++++++++++++++ |
LOW_C_EIN; // Low C ein |
for(i=0; i<(TONDAUER / SOUND1_A); i++) |
632: 0f 5f subi r16, 0xFF ; 255 |
634: 1f 4f sbci r17, 0xFF ; 255 |
636: 05 38 cpi r16, 0x85 ; 133 |
638: 11 05 cpc r17, r1 |
63a: 39 f7 brne .-50 ; 0x60a <__stack+0x1ab> |
Delay(SOUND_E); |
if(MessAD(2) > 128) { MosfetOkay &= ~0x20;} else { MosfetOkay |= 0x20;}; |
PORTB = 0; |
Delay(SOUND3_A); |
} |
FETS_OFF; |
63c: 82 b3 in r24, 0x12 ; 18 |
63e: 87 7c andi r24, 0xC7 ; 199 |
640: 82 bb out 0x12, r24 ; 18 |
642: 88 b3 in r24, 0x18 ; 24 |
644: 81 7f andi r24, 0xF1 ; 241 |
646: 88 bb out 0x18, r24 ; 24 |
//++++++++++++++++++++++++++++++++++++ |
FETS_OFF; |
648: 82 b3 in r24, 0x12 ; 18 |
64a: 87 7c andi r24, 0xC7 ; 199 |
64c: 82 bb out 0x12, r24 ; 18 |
64e: 88 b3 in r24, 0x18 ; 24 |
650: 81 7f andi r24, 0xF1 ; 241 |
652: 88 bb out 0x18, r24 ; 24 |
LOW_B_EIN; // Low B ein |
654: 94 9a sbi 0x12, 4 ; 18 |
656: 00 e0 ldi r16, 0x00 ; 0 |
658: 10 e0 ldi r17, 0x00 ; 0 |
for(i=0; i<(TONDAUER / SOUND3_A); i++) |
{ |
HIGH_C_EIN; // Test C |
65a: c1 9a sbi 0x18, 1 ; 24 |
Delay(SOUND_E); |
if(MessAD(1) > 128) { MosfetOkay &= ~0x10;} else { MosfetOkay |= 0x10;}; |
65c: 81 e0 ldi r24, 0x01 ; 1 |
65e: 3c d6 rcall .+3192 ; 0x12d8 <MessAD> |
660: 81 38 cpi r24, 0x81 ; 129 |
662: 91 05 cpc r25, r1 |
664: 18 f0 brcs .+6 ; 0x66c <__stack+0x20d> |
666: 4f ee ldi r20, 0xEF ; 239 |
668: f4 22 and r15, r20 |
66a: 02 c0 rjmp .+4 ; 0x670 <__stack+0x211> |
66c: 50 e1 ldi r21, 0x10 ; 16 |
66e: f5 2a or r15, r21 |
PORTB = 0; |
670: 18 ba out 0x18, r1 ; 24 |
672: 88 e6 ldi r24, 0x68 ; 104 |
674: 91 e0 ldi r25, 0x01 ; 1 |
676: 00 c0 rjmp .+0 ; 0x678 <__stack+0x219> |
return(0); |
} |
|
unsigned char Delay(unsigned int timer) |
{ |
while(timer--) |
678: 01 97 sbiw r24, 0x01 ; 1 |
67a: 2f ef ldi r18, 0xFF ; 255 |
67c: 8f 3f cpi r24, 0xFF ; 255 |
67e: 92 07 cpc r25, r18 |
680: d9 f7 brne .-10 ; 0x678 <__stack+0x219> |
} |
FETS_OFF; |
//++++++++++++++++++++++++++++++++++++ |
FETS_OFF; |
LOW_B_EIN; // Low B ein |
for(i=0; i<(TONDAUER / SOUND3_A); i++) |
682: 0f 5f subi r16, 0xFF ; 255 |
684: 1f 4f sbci r17, 0xFF ; 255 |
686: 0f 36 cpi r16, 0x6F ; 111 |
688: 11 05 cpc r17, r1 |
68a: 39 f7 brne .-50 ; 0x65a <__stack+0x1fb> |
Delay(SOUND_E); |
if(MessAD(1) > 128) { MosfetOkay &= ~0x10;} else { MosfetOkay |= 0x10;}; |
PORTB = 0; |
Delay(SOUND3_A); |
} |
FETS_OFF; |
68c: 82 b3 in r24, 0x12 ; 18 |
68e: 87 7c andi r24, 0xC7 ; 199 |
690: 82 bb out 0x12, r24 ; 18 |
692: 88 b3 in r24, 0x18 ; 24 |
694: 81 7f andi r24, 0xF1 ; 241 |
696: 88 bb out 0x18, r24 ; 24 |
//++++++++++++++++++++++++++++++++++++ |
|
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
sei();//Globale Interrupts Einschalten |
698: 78 94 sei |
Delay(SOUND_E); |
PORTB = 0; |
Delay(SOUND8_A); |
} |
*/ |
Delay_ms(300 * (3-ADR_TAB[MotorAdresse])); |
69a: 80 91 66 00 lds r24, 0x0066 |
69e: fe 01 movw r30, r28 |
6a0: e8 0f add r30, r24 |
6a2: f1 1d adc r31, r1 |
6a4: 21 81 ldd r18, Z+1 ; 0x01 |
6a6: 83 e0 ldi r24, 0x03 ; 3 |
6a8: 90 e0 ldi r25, 0x00 ; 0 |
6aa: 82 1b sub r24, r18 |
6ac: 91 09 sbc r25, r1 |
6ae: 2c e2 ldi r18, 0x2C ; 44 |
6b0: 31 e0 ldi r19, 0x01 ; 1 |
6b2: ac 01 movw r20, r24 |
6b4: 42 9f mul r20, r18 |
6b6: c0 01 movw r24, r0 |
6b8: 43 9f mul r20, r19 |
6ba: 90 0d add r25, r0 |
6bc: 52 9f mul r21, r18 |
6be: 90 0d add r25, r0 |
6c0: 11 24 eor r1, r1 |
6c2: b6 d5 rcall .+2924 ; 0x1230 <Delay_ms> |
if(!(MosfetOkay & 0x01)) { anz = 1; UDR='A'; } else |
6c4: f0 fc sbrc r15, 0 |
6c6: 04 c0 rjmp .+8 ; 0x6d0 <__stack+0x271> |
6c8: 81 e4 ldi r24, 0x41 ; 65 |
6ca: 8c b9 out 0x0c, r24 ; 12 |
6cc: 11 e0 ldi r17, 0x01 ; 1 |
6ce: 1d c0 rjmp .+58 ; 0x70a <__stack+0x2ab> |
if(!(MosfetOkay & 0x02)) { anz = 2; UDR='B'; } else |
6d0: f1 fc sbrc r15, 1 |
6d2: 04 c0 rjmp .+8 ; 0x6dc <__stack+0x27d> |
6d4: 82 e4 ldi r24, 0x42 ; 66 |
6d6: 8c b9 out 0x0c, r24 ; 12 |
6d8: 12 e0 ldi r17, 0x02 ; 2 |
6da: 17 c0 rjmp .+46 ; 0x70a <__stack+0x2ab> |
if(!(MosfetOkay & 0x04)) { anz = 3; UDR='C'; } else |
6dc: f2 fc sbrc r15, 2 |
6de: 04 c0 rjmp .+8 ; 0x6e8 <__stack+0x289> |
6e0: 83 e4 ldi r24, 0x43 ; 67 |
6e2: 8c b9 out 0x0c, r24 ; 12 |
6e4: 13 e0 ldi r17, 0x03 ; 3 |
6e6: 11 c0 rjmp .+34 ; 0x70a <__stack+0x2ab> |
if(!(MosfetOkay & 0x08)) { anz = 4; UDR='a'; } else |
6e8: f3 fc sbrc r15, 3 |
6ea: 04 c0 rjmp .+8 ; 0x6f4 <__stack+0x295> |
6ec: 81 e6 ldi r24, 0x61 ; 97 |
6ee: 8c b9 out 0x0c, r24 ; 12 |
6f0: 14 e0 ldi r17, 0x04 ; 4 |
6f2: 0b c0 rjmp .+22 ; 0x70a <__stack+0x2ab> |
if(!(MosfetOkay & 0x10)) { anz = 5; UDR='b'; } else |
6f4: f4 fc sbrc r15, 4 |
6f6: 04 c0 rjmp .+8 ; 0x700 <__stack+0x2a1> |
6f8: 82 e6 ldi r24, 0x62 ; 98 |
6fa: 8c b9 out 0x0c, r24 ; 12 |
6fc: 15 e0 ldi r17, 0x05 ; 5 |
6fe: 05 c0 rjmp .+10 ; 0x70a <__stack+0x2ab> |
if(!(MosfetOkay & 0x20)) { anz = 6; UDR='c'; } |
700: f5 fc sbrc r15, 5 |
702: 06 c0 rjmp .+12 ; 0x710 <__stack+0x2b1> |
704: 83 e6 ldi r24, 0x63 ; 99 |
706: 8c b9 out 0x0c, r24 ; 12 |
708: 16 e0 ldi r17, 0x06 ; 6 |
|
// if(anz) Delay_ms(1000); |
if(anz) while(1) RotBlink(anz); // bei Kurzschluss nicht starten |
70a: 81 2f mov r24, r17 |
70c: b7 dd rcall .-1170 ; 0x27c <RotBlink> |
70e: fd cf rjmp .-6 ; 0x70a <__stack+0x2ab> |
RotBlink(anz); |
710: 80 e0 ldi r24, 0x00 ; 0 |
712: b4 dd rcall .-1176 ; 0x27c <RotBlink> |
uart_putchar('.'); |
714: 8e e2 ldi r24, 0x2E ; 46 |
716: d8 d3 rcall .+1968 ; 0xec8 <uart_putchar> |
} |
718: 27 96 adiw r28, 0x07 ; 7 |
71a: 0f b6 in r0, 0x3f ; 63 |
71c: f8 94 cli |
71e: de bf out 0x3e, r29 ; 62 |
720: 0f be out 0x3f, r0 ; 63 |
722: cd bf out 0x3d, r28 ; 61 |
724: cf 91 pop r28 |
726: df 91 pop r29 |
728: 1f 91 pop r17 |
72a: 0f 91 pop r16 |
72c: ff 90 pop r15 |
72e: ef 90 pop r14 |
730: df 90 pop r13 |
732: bf 90 pop r11 |
734: af 90 pop r10 |
736: 08 95 ret |
|
00000738 <Anwerfen>: |
|
//############################################################################ |
// |
char Anwerfen(unsigned char pwm) |
//############################################################################ |
{ |
738: 6f 92 push r6 |
73a: 7f 92 push r7 |
73c: 9f 92 push r9 |
73e: af 92 push r10 |
740: bf 92 push r11 |
742: cf 92 push r12 |
744: df 92 push r13 |
746: ef 92 push r14 |
748: ff 92 push r15 |
74a: 0f 93 push r16 |
74c: 1f 93 push r17 |
74e: cf 93 push r28 |
750: df 93 push r29 |
752: 98 2e mov r9, r24 |
unsigned long timer = 300,i; |
DISABLE_SENSE_INT; |
754: 10 92 b1 00 sts 0x00B1, r1 |
758: 43 98 cbi 0x08, 3 ; 8 |
PWM = 5; |
75a: 85 e0 ldi r24, 0x05 ; 5 |
75c: 90 e0 ldi r25, 0x00 ; 0 |
75e: 90 93 79 00 sts 0x0079, r25 |
762: 80 93 78 00 sts 0x0078, r24 |
SetPWM(); |
766: 7b dc rcall .-1802 ; 0x5e <SetPWM> |
Manuell(); |
768: 0f d7 rcall .+3614 ; 0x1588 <Manuell> |
// Delay_ms(200); |
MinUpmPulse = SetDelay(300); |
76a: 8c e2 ldi r24, 0x2C ; 44 |
76c: 91 e0 ldi r25, 0x01 ; 1 |
76e: 4c d5 rcall .+2712 ; 0x1208 <SetDelay> |
770: 90 93 b4 02 sts 0x02B4, r25 |
774: 80 93 b3 02 sts 0x02B3, r24 |
778: 09 c0 rjmp .+18 ; 0x78c <Anwerfen+0x54> |
while(!CheckDelay(MinUpmPulse)) |
{ |
FastADConvert(); |
77a: c3 d5 rcall .+2950 ; 0x1302 <FastADConvert> |
if(Strom > 120) |
77c: 80 91 7a 00 lds r24, 0x007A |
780: 90 91 7b 00 lds r25, 0x007B |
784: 89 37 cpi r24, 0x79 ; 121 |
786: 91 05 cpc r25, r1 |
788: 08 f0 brcs .+2 ; 0x78c <Anwerfen+0x54> |
78a: 5c c0 rjmp .+184 ; 0x844 <Anwerfen+0x10c> |
PWM = 5; |
SetPWM(); |
Manuell(); |
// Delay_ms(200); |
MinUpmPulse = SetDelay(300); |
while(!CheckDelay(MinUpmPulse)) |
78c: 80 91 b3 02 lds r24, 0x02B3 |
790: 90 91 b4 02 lds r25, 0x02B4 |
794: 43 d5 rcall .+2694 ; 0x121c <CheckDelay> |
796: 88 23 and r24, r24 |
798: 81 f3 breq .-32 ; 0x77a <Anwerfen+0x42> |
STEUER_OFF; // Abschalten wegen Kurzschluss |
RotBlink(10); |
return(0); |
} |
} |
PWM = pwm; |
79a: 90 92 78 00 sts 0x0078, r9 |
79e: 10 92 79 00 sts 0x0079, r1 |
7a2: 5c e2 ldi r21, 0x2C ; 44 |
7a4: a5 2e mov r10, r21 |
7a6: 51 e0 ldi r21, 0x01 ; 1 |
7a8: b5 2e mov r11, r21 |
7aa: c1 2c mov r12, r1 |
7ac: d1 2c mov r13, r1 |
} |
|
void DebugAusgaben(void) |
{ |
DebugOut.Analog[0] = Strom; |
DebugOut.Analog[1] = Mittelstrom; |
7ae: c6 e8 ldi r28, 0x86 ; 134 |
7b0: d3 e0 ldi r29, 0x03 ; 3 |
DebugOut.Analog[2] = SIO_Drehzahl; |
DebugOut.Analog[3] = PPM_Signal; |
DebugOut.Analog[4] = OCR2; |
7b2: 46 e0 ldi r20, 0x06 ; 6 |
7b4: 64 2e mov r6, r20 |
7b6: 71 2c mov r7, r1 |
7b8: 6c 0e add r6, r28 |
7ba: 7d 1e adc r7, r29 |
STEUER_OFF; // Abschalten wegen Kurzschluss |
RotBlink(10); |
return(0); |
} |
} |
PWM = pwm; |
7bc: ee 24 eor r14, r14 |
7be: ff 24 eor r15, r15 |
7c0: 87 01 movw r16, r14 |
while(1) |
{ |
for(i=0;i<timer; i++) |
{ |
if(!UebertragungAbgeschlossen) SendUart(); |
7c2: 80 91 6f 00 lds r24, 0x006F |
7c6: 88 23 and r24, r24 |
7c8: 11 f4 brne .+4 ; 0x7ce <Anwerfen+0x96> |
7ca: 6c d2 rcall .+1240 ; 0xca4 <SendUart> |
7cc: 01 c0 rjmp .+2 ; 0x7d0 <Anwerfen+0x98> |
else DatenUebertragung(); |
7ce: 6e d4 rcall .+2268 ; 0x10ac <DatenUebertragung> |
//############################################################################ |
// |
void Wait(unsigned char dauer) |
//############################################################################ |
{ |
dauer = (unsigned char)TCNT0 + dauer; |
7d0: 82 b7 in r24, 0x32 ; 50 |
7d2: 8c 59 subi r24, 0x9C ; 156 |
while((TCNT0 - dauer) & 0x80); |
7d4: 98 2f mov r25, r24 |
7d6: 82 b7 in r24, 0x32 ; 50 |
7d8: 89 1b sub r24, r25 |
7da: 87 fd sbrc r24, 7 |
7dc: fc cf rjmp .-8 ; 0x7d6 <Anwerfen+0x9e> |
} |
} |
PWM = pwm; |
while(1) |
{ |
for(i=0;i<timer; i++) |
7de: 08 94 sec |
7e0: e1 1c adc r14, r1 |
7e2: f1 1c adc r15, r1 |
7e4: 01 1d adc r16, r1 |
7e6: 11 1d adc r17, r1 |
7e8: ea 14 cp r14, r10 |
7ea: fb 04 cpc r15, r11 |
7ec: 0c 05 cpc r16, r12 |
7ee: 1d 05 cpc r17, r13 |
7f0: 40 f3 brcs .-48 ; 0x7c2 <Anwerfen+0x8a> |
} |
} |
|
void DebugAusgaben(void) |
{ |
DebugOut.Analog[0] = Strom; |
7f2: 80 91 7a 00 lds r24, 0x007A |
7f6: 90 91 7b 00 lds r25, 0x007B |
7fa: 90 93 85 03 sts 0x0385, r25 |
7fe: 80 93 84 03 sts 0x0384, r24 |
DebugOut.Analog[1] = Mittelstrom; |
802: 80 91 7d 00 lds r24, 0x007D |
806: 80 93 86 03 sts 0x0386, r24 |
80a: 19 82 std Y+1, r1 ; 0x01 |
DebugOut.Analog[2] = SIO_Drehzahl; |
80c: 80 91 8b 00 lds r24, 0x008B |
810: 90 91 8c 00 lds r25, 0x008C |
814: 90 93 89 03 sts 0x0389, r25 |
818: 80 93 88 03 sts 0x0388, r24 |
DebugOut.Analog[3] = PPM_Signal; |
81c: 80 91 a5 00 lds r24, 0x00A5 |
820: 90 91 a6 00 lds r25, 0x00A6 |
824: 90 93 8b 03 sts 0x038B, r25 |
828: 80 93 8a 03 sts 0x038A, r24 |
DebugOut.Analog[4] = OCR2; |
82c: 83 b5 in r24, 0x23 ; 35 |
82e: 80 93 8c 03 sts 0x038C, r24 |
832: f3 01 movw r30, r6 |
834: 11 82 std Z+1, r1 ; 0x01 |
if(!UebertragungAbgeschlossen) SendUart(); |
else DatenUebertragung(); |
Wait(100); // warten |
} |
DebugAusgaben(); |
FastADConvert(); |
836: 65 d5 rcall .+2762 ; 0x1302 <FastADConvert> |
if(Strom > 60) |
838: 80 91 7a 00 lds r24, 0x007A |
83c: 90 91 7b 00 lds r25, 0x007B |
840: cd 97 sbiw r24, 0x3d ; 61 |
842: a8 f0 brcs .+42 ; 0x86e <Anwerfen+0x136> |
{ |
STEUER_OFF; // Abschalten wegen Kurzschluss |
844: 82 b3 in r24, 0x12 ; 18 |
846: 87 7c andi r24, 0xC7 ; 199 |
848: 82 bb out 0x12, r24 ; 18 |
84a: 1b bc out 0x2b, r1 ; 43 |
84c: 1a bc out 0x2a, r1 ; 42 |
84e: 19 bc out 0x29, r1 ; 41 |
850: 18 bc out 0x28, r1 ; 40 |
852: 13 bc out 0x23, r1 ; 35 |
854: 81 e0 ldi r24, 0x01 ; 1 |
856: 8f bd out 0x2f, r24 ; 47 |
858: 81 e4 ldi r24, 0x41 ; 65 |
85a: 85 bd out 0x25, r24 ; 37 |
85c: 8e e0 ldi r24, 0x0E ; 14 |
85e: 87 bb out 0x17, r24 ; 23 |
860: 88 b3 in r24, 0x18 ; 24 |
862: 81 7f andi r24, 0xF1 ; 241 |
864: 88 bb out 0x18, r24 ; 24 |
RotBlink(10); |
866: 8a e0 ldi r24, 0x0A ; 10 |
868: 09 dd rcall .-1518 ; 0x27c <RotBlink> |
86a: 80 e0 ldi r24, 0x00 ; 0 |
86c: 2e c0 rjmp .+92 ; 0x8ca <Anwerfen+0x192> |
return(0); |
} |
|
timer-= timer/15+1; |
86e: c6 01 movw r24, r12 |
870: b5 01 movw r22, r10 |
872: 2f e0 ldi r18, 0x0F ; 15 |
874: 30 e0 ldi r19, 0x00 ; 0 |
876: 40 e0 ldi r20, 0x00 ; 0 |
878: 50 e0 ldi r21, 0x00 ; 0 |
87a: 12 d8 rcall .-4060 ; 0xfffff8a0 <__eeprom_end+0xff7ef8a0> |
87c: 20 95 com r18 |
87e: 30 95 com r19 |
880: 40 95 com r20 |
882: 50 95 com r21 |
884: a2 0e add r10, r18 |
886: b3 1e adc r11, r19 |
888: c4 1e adc r12, r20 |
88a: d5 1e adc r13, r21 |
if(timer < 25) { if(TEST_MANUELL) timer = 25; else return(1); } |
88c: f9 e1 ldi r31, 0x19 ; 25 |
88e: af 16 cp r10, r31 |
890: b1 04 cpc r11, r1 |
892: c1 04 cpc r12, r1 |
894: d1 04 cpc r13, r1 |
896: c0 f0 brcs .+48 ; 0x8c8 <Anwerfen+0x190> |
Manuell(); |
898: 77 d6 rcall .+3310 ; 0x1588 <Manuell> |
Phase++; |
89a: 80 91 af 00 lds r24, 0x00AF |
89e: 8f 5f subi r24, 0xFF ; 255 |
8a0: 80 93 af 00 sts 0x00AF, r24 |
Phase %= 6; |
8a4: 80 91 af 00 lds r24, 0x00AF |
8a8: 66 e0 ldi r22, 0x06 ; 6 |
8aa: da d7 rcall .+4020 ; 0x1860 <__udivmodqi4> |
8ac: 90 93 af 00 sts 0x00AF, r25 |
AdConvert(); |
8b0: dc d4 rcall .+2488 ; 0x126a <AdConvert> |
PWM = pwm; |
8b2: 90 92 78 00 sts 0x0078, r9 |
8b6: 10 92 79 00 sts 0x0079, r1 |
SetPWM(); |
8ba: d1 db rcall .-2142 ; 0x5e <SetPWM> |
if(SENSE) |
8bc: 44 9b sbis 0x08, 4 ; 8 |
8be: 7e cf rjmp .-260 ; 0x7bc <Anwerfen+0x84> |
{ |
PORTD ^= GRUEN; |
8c0: 82 b3 in r24, 0x12 ; 18 |
8c2: 80 58 subi r24, 0x80 ; 128 |
8c4: 82 bb out 0x12, r24 ; 18 |
8c6: 7a cf rjmp .-268 ; 0x7bc <Anwerfen+0x84> |
8c8: 81 e0 ldi r24, 0x01 ; 1 |
} |
} |
} |
8ca: df 91 pop r29 |
8cc: cf 91 pop r28 |
8ce: 1f 91 pop r17 |
8d0: 0f 91 pop r16 |
8d2: ff 90 pop r15 |
8d4: ef 90 pop r14 |
8d6: df 90 pop r13 |
8d8: cf 90 pop r12 |
8da: bf 90 pop r11 |
8dc: af 90 pop r10 |
8de: 9f 90 pop r9 |
8e0: 7f 90 pop r7 |
8e2: 6f 90 pop r6 |
8e4: 08 95 ret |
|
000008e6 <main>: |
|
//############################################################################ |
//Hauptprogramm |
int main (void) |
//############################################################################ |
{ |
8e6: 5f 92 push r5 |
8e8: 6f 92 push r6 |
8ea: 7f 92 push r7 |
8ec: 8f 92 push r8 |
8ee: 9f 92 push r9 |
8f0: af 92 push r10 |
8f2: bf 92 push r11 |
8f4: cf 92 push r12 |
8f6: df 92 push r13 |
8f8: ef 92 push r14 |
8fa: ff 92 push r15 |
8fc: 0f 93 push r16 |
8fe: 1f 93 push r17 |
900: cf 93 push r28 |
902: df 93 push r29 |
char altPhase = 0; |
int test = 0; |
unsigned int Blink,TestschubTimer; |
unsigned int Blink2,MittelstromTimer,DrehzahlMessTimer,MotorGestopptTimer; |
|
DDRC = 0x08; |
904: 88 e0 ldi r24, 0x08 ; 8 |
906: 84 bb out 0x14, r24 ; 20 |
PORTC = 0x08; |
908: 85 bb out 0x15, r24 ; 21 |
DDRD = 0x3A; |
90a: 8a e3 ldi r24, 0x3A ; 58 |
90c: 81 bb out 0x11, r24 ; 17 |
PORTD = 0x00; |
90e: 12 ba out 0x12, r1 ; 18 |
DDRB = 0x0E; |
910: 8e e0 ldi r24, 0x0E ; 14 |
912: 87 bb out 0x17, r24 ; 23 |
PORTB = 0x31; |
914: 81 e3 ldi r24, 0x31 ; 49 |
916: 88 bb out 0x18, r24 ; 24 |
|
#if (MOTORADRESSE == 0) |
PORTB |= (ADR1 + ADR2); // Pullups für Adresswahl |
918: 88 b3 in r24, 0x18 ; 24 |
91a: 80 6c ori r24, 0xC0 ; 192 |
91c: 88 bb out 0x18, r24 ; 24 |
for(test=0;test<500;test++); |
if(PINB & ADR1) |
91e: b6 9b sbis 0x16, 6 ; 22 |
920: 06 c0 rjmp .+12 ; 0x92e <main+0x48> |
{ |
if (PINB & ADR2) MotorAdresse = 1; |
922: b7 9b sbis 0x16, 7 ; 22 |
924: 02 c0 rjmp .+4 ; 0x92a <main+0x44> |
926: 81 e0 ldi r24, 0x01 ; 1 |
928: 07 c0 rjmp .+14 ; 0x938 <main+0x52> |
else MotorAdresse = 2; |
92a: 82 e0 ldi r24, 0x02 ; 2 |
92c: 05 c0 rjmp .+10 ; 0x938 <main+0x52> |
} |
else |
{ |
if (PINB & ADR2) MotorAdresse = 3; |
92e: b7 9b sbis 0x16, 7 ; 22 |
930: 02 c0 rjmp .+4 ; 0x936 <main+0x50> |
932: 83 e0 ldi r24, 0x03 ; 3 |
934: 01 c0 rjmp .+2 ; 0x938 <main+0x52> |
else MotorAdresse = 4; |
936: 84 e0 ldi r24, 0x04 ; 4 |
938: 80 93 66 00 sts 0x0066, r24 |
} |
HwVersion = 11; |
93c: 8b e0 ldi r24, 0x0B ; 11 |
93e: 80 93 b2 00 sts 0x00B2, r24 |
#else |
MotorAdresse = MOTORADRESSE; |
HwVersion = 10; |
#endif |
if(PIND & 0x80) {HwVersion = 12; IntRef = 0xc0;} |
942: 87 9b sbis 0x10, 7 ; 16 |
944: 06 c0 rjmp .+12 ; 0x952 <main+0x6c> |
946: 8c e0 ldi r24, 0x0C ; 12 |
948: 80 93 b2 00 sts 0x00B2, r24 |
94c: 80 ec ldi r24, 0xC0 ; 192 |
94e: 80 93 8d 00 sts 0x008D, r24 |
DDRD = 0xBA; |
952: 8a eb ldi r24, 0xBA ; 186 |
954: 81 bb out 0x11, r24 ; 17 |
UART_Init(); |
956: c4 d3 rcall .+1928 ; 0x10e0 <UART_Init> |
Timer0_Init(); |
958: 4e d4 rcall .+2204 ; 0x11f6 <Timer0_Init> |
sei();//Globale Interrupts Einschalten |
95a: 78 94 sei |
} |
|
Delay_ms(500); |
*/ |
// UART_Init(); // war doppelt |
PWM_Init(); |
95c: d4 db rcall .-2136 ; 0x106 <PWM_Init> |
|
InitIC2_Slave(0x50); |
95e: 80 e5 ldi r24, 0x50 ; 80 |
960: b0 d5 rcall .+2912 ; 0x14c2 <InitIC2_Slave> |
InitPPM(); |
962: eb d4 rcall .+2518 ; 0x133a <InitPPM> |
|
Blink = SetDelay(101); |
964: 85 e6 ldi r24, 0x65 ; 101 |
966: 90 e0 ldi r25, 0x00 ; 0 |
968: 4f d4 rcall .+2206 ; 0x1208 <SetDelay> |
Blink2 = SetDelay(102); |
96a: 86 e6 ldi r24, 0x66 ; 102 |
96c: 90 e0 ldi r25, 0x00 ; 0 |
96e: 4c d4 rcall .+2200 ; 0x1208 <SetDelay> |
MinUpmPulse = SetDelay(103); |
970: 87 e6 ldi r24, 0x67 ; 103 |
972: 90 e0 ldi r25, 0x00 ; 0 |
974: 49 d4 rcall .+2194 ; 0x1208 <SetDelay> |
976: 90 93 b4 02 sts 0x02B4, r25 |
97a: 80 93 b3 02 sts 0x02B3, r24 |
MittelstromTimer = SetDelay(254); |
97e: 8e ef ldi r24, 0xFE ; 254 |
980: 90 e0 ldi r25, 0x00 ; 0 |
982: 42 d4 rcall .+2180 ; 0x1208 <SetDelay> |
984: 6c 01 movw r12, r24 |
DrehzahlMessTimer = SetDelay(1005); |
986: 8d ee ldi r24, 0xED ; 237 |
988: 93 e0 ldi r25, 0x03 ; 3 |
98a: 3e d4 rcall .+2172 ; 0x1208 <SetDelay> |
98c: ec 01 movw r28, r24 |
TestschubTimer = SetDelay(1006); |
98e: 8e ee ldi r24, 0xEE ; 238 |
990: 93 e0 ldi r25, 0x03 ; 3 |
992: 3a d4 rcall .+2164 ; 0x1208 <SetDelay> |
994: 03 c0 rjmp .+6 ; 0x99c <main+0xb6> |
while(!CheckDelay(MinUpmPulse)) |
{ |
if(SollwertErmittlung()) break; |
996: d4 db rcall .-2136 ; 0x140 <SollwertErmittlung> |
998: 88 23 and r24, r24 |
99a: 39 f4 brne .+14 ; 0x9aa <main+0xc4> |
Blink2 = SetDelay(102); |
MinUpmPulse = SetDelay(103); |
MittelstromTimer = SetDelay(254); |
DrehzahlMessTimer = SetDelay(1005); |
TestschubTimer = SetDelay(1006); |
while(!CheckDelay(MinUpmPulse)) |
99c: 80 91 b3 02 lds r24, 0x02B3 |
9a0: 90 91 b4 02 lds r25, 0x02B4 |
9a4: 3b d4 rcall .+2166 ; 0x121c <CheckDelay> |
9a6: 88 23 and r24, r24 |
9a8: b1 f3 breq .-20 ; 0x996 <main+0xb0> |
{ |
if(SollwertErmittlung()) break; |
} |
|
GRN_ON; |
9aa: 80 91 b2 00 lds r24, 0x00B2 |
9ae: 8c 30 cpi r24, 0x0C ; 12 |
9b0: 10 f4 brcc .+4 ; 0x9b6 <main+0xd0> |
9b2: 97 9a sbi 0x12, 7 ; 18 |
9b4: 01 c0 rjmp .+2 ; 0x9b8 <main+0xd2> |
9b6: 97 98 cbi 0x12, 7 ; 18 |
PWM = 0; |
9b8: 10 92 79 00 sts 0x0079, r1 |
9bc: 10 92 78 00 sts 0x0078, r1 |
|
SetPWM(); |
9c0: 4e db rcall .-2404 ; 0x5e <SetPWM> |
|
SFIOR = 0x08; // Analog Comperator ein |
9c2: 88 e0 ldi r24, 0x08 ; 8 |
9c4: 80 bf out 0x30, r24 ; 48 |
ADMUX = 1; |
9c6: 81 e0 ldi r24, 0x01 ; 1 |
9c8: 87 b9 out 0x07, r24 ; 7 |
|
MinUpmPulse = SetDelay(10); |
9ca: 8a e0 ldi r24, 0x0A ; 10 |
9cc: 90 e0 ldi r25, 0x00 ; 0 |
9ce: 1c d4 rcall .+2104 ; 0x1208 <SetDelay> |
9d0: 90 93 b4 02 sts 0x02B4, r25 |
9d4: 80 93 b3 02 sts 0x02B3, r24 |
DebugOut.Analog[1] = 1; |
9d8: 81 e0 ldi r24, 0x01 ; 1 |
9da: 90 e0 ldi r25, 0x00 ; 0 |
9dc: 90 93 87 03 sts 0x0387, r25 |
9e0: 80 93 86 03 sts 0x0386, r24 |
PPM_Signal = 0; |
9e4: 10 92 a6 00 sts 0x00A6, r1 |
9e8: 10 92 a5 00 sts 0x00A5, r1 |
|
if(!SollwertErmittlung()) MotorTon(); |
9ec: a9 db rcall .-2222 ; 0x140 <SollwertErmittlung> |
9ee: 88 23 and r24, r24 |
9f0: 09 f4 brne .+2 ; 0x9f4 <main+0x10e> |
9f2: 58 dc rcall .-1872 ; 0x2a4 <MotorTon> |
//MotorTon(); |
PORTB = 0x31; // Pullups wieder einschalten |
9f4: 81 e3 ldi r24, 0x31 ; 49 |
9f6: 88 bb out 0x18, r24 ; 24 |
9f8: 10 e0 ldi r17, 0x00 ; 0 |
STEUER_OFF; |
} |
} |
else |
{ |
if(MotorGestoppt) MotorAnwerfen = 1; // Startversuch |
9fa: ff 24 eor r15, r15 |
9fc: f3 94 inc r15 |
// nach 1,5 Sekunden den Motor als gestoppt betrachten |
if(CheckDelay(MotorGestopptTimer)) |
{ |
DISABLE_SENSE_INT; |
MotorGestoppt = 1; |
STEUER_OFF; |
9fe: f1 e4 ldi r31, 0x41 ; 65 |
a00: ef 2e mov r14, r31 |
a02: ee e0 ldi r30, 0x0E ; 14 |
a04: 5e 2e mov r5, r30 |
if(Anwerfen(10)) |
{ |
GRN_ON; |
MotorGestoppt = 0; |
Phase--; |
PWM = 1; |
a06: 71 e0 ldi r23, 0x01 ; 1 |
a08: 67 2e mov r6, r23 |
a0a: 71 2c mov r7, r1 |
SetPWM(); |
SENSE_TOGGLE_INT; |
ENABLE_SENSE_INT; |
MinUpmPulse = SetDelay(20); |
while(!CheckDelay(MinUpmPulse)); // kurz Synchronisieren |
PWM = 15; |
a0c: 6f e0 ldi r22, 0x0F ; 15 |
a0e: 86 2e mov r8, r22 |
a10: 91 2c mov r9, r1 |
a12: 01 c0 rjmp .+2 ; 0xa16 <main+0x130> |
DebugOut.Analog[1] = 1; |
PPM_Signal = 0; |
|
if(!SollwertErmittlung()) MotorTon(); |
//MotorTon(); |
PORTB = 0x31; // Pullups wieder einschalten |
a14: 10 2f mov r17, r16 |
|
while (1) |
{ |
//ShowSense(); |
|
if(!TEST_SCHUB) PWM = SollwertErmittlung(); |
a16: 94 db rcall .-2264 ; 0x140 <SollwertErmittlung> |
a18: 80 93 78 00 sts 0x0078, r24 |
a1c: 10 92 79 00 sts 0x0079, r1 |
//I2C_TXBuffer = PWM; // Antwort über I2C-Bus |
if(MANUELL_PWM) PWM = MANUELL_PWM; |
|
// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
if(Phase != altPhase) // es gab eine Kommutierung im Interrupt |
a20: 00 91 af 00 lds r16, 0x00AF |
a24: 01 17 cp r16, r17 |
a26: 69 f0 breq .+26 ; 0xa42 <main+0x15c> |
{ |
MotorGestoppt = 0; |
a28: 10 92 63 00 sts 0x0063, r1 |
ZeitFuerBerechnungen = 0; // direkt nach einer Kommutierung ist Zeit |
a2c: 10 92 62 00 sts 0x0062, r1 |
MinUpmPulse = SetDelay(250); // Timeout, falls ein Motor stehen bleibt |
a30: 8a ef ldi r24, 0xFA ; 250 |
a32: 90 e0 ldi r25, 0x00 ; 0 |
a34: e9 d3 rcall .+2002 ; 0x1208 <SetDelay> |
a36: 90 93 b4 02 sts 0x02B4, r25 |
a3a: 80 93 b3 02 sts 0x02B3, r24 |
altPhase = Phase; |
a3e: 00 91 af 00 lds r16, 0x00AF |
} |
// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
if(!PWM) // Sollwert == 0 |
a42: 80 91 78 00 lds r24, 0x0078 |
a46: 90 91 79 00 lds r25, 0x0079 |
a4a: 89 2b or r24, r25 |
a4c: e1 f4 brne .+56 ; 0xa86 <main+0x1a0> |
{ |
MotorAnwerfen = 0; // kein Startversuch |
a4e: 10 92 88 00 sts 0x0088, r1 |
ZeitFuerBerechnungen = 0; |
a52: 10 92 62 00 sts 0x0062, r1 |
// nach 1,5 Sekunden den Motor als gestoppt betrachten |
if(CheckDelay(MotorGestopptTimer)) |
a56: c5 01 movw r24, r10 |
a58: e1 d3 rcall .+1986 ; 0x121c <CheckDelay> |
a5a: 88 23 and r24, r24 |
a5c: f1 f0 breq .+60 ; 0xa9a <main+0x1b4> |
{ |
DISABLE_SENSE_INT; |
a5e: 10 92 b1 00 sts 0x00B1, r1 |
a62: 43 98 cbi 0x08, 3 ; 8 |
MotorGestoppt = 1; |
a64: f0 92 63 00 sts 0x0063, r15 |
STEUER_OFF; |
a68: 82 b3 in r24, 0x12 ; 18 |
a6a: 87 7c andi r24, 0xC7 ; 199 |
a6c: 82 bb out 0x12, r24 ; 18 |
a6e: 1b bc out 0x2b, r1 ; 43 |
a70: 1a bc out 0x2a, r1 ; 42 |
a72: 19 bc out 0x29, r1 ; 41 |
a74: 18 bc out 0x28, r1 ; 40 |
a76: 13 bc out 0x23, r1 ; 35 |
a78: ff bc out 0x2f, r15 ; 47 |
a7a: e5 bc out 0x25, r14 ; 37 |
a7c: 57 ba out 0x17, r5 ; 23 |
a7e: 88 b3 in r24, 0x18 ; 24 |
a80: 81 7f andi r24, 0xF1 ; 241 |
a82: 88 bb out 0x18, r24 ; 24 |
a84: 0a c0 rjmp .+20 ; 0xa9a <main+0x1b4> |
} |
} |
else |
{ |
if(MotorGestoppt) MotorAnwerfen = 1; // Startversuch |
a86: 80 91 63 00 lds r24, 0x0063 |
a8a: 88 23 and r24, r24 |
a8c: 11 f0 breq .+4 ; 0xa92 <main+0x1ac> |
a8e: f0 92 88 00 sts 0x0088, r15 |
MotorGestopptTimer = SetDelay(1500); |
a92: 8c ed ldi r24, 0xDC ; 220 |
a94: 95 e0 ldi r25, 0x05 ; 5 |
a96: b8 d3 rcall .+1904 ; 0x1208 <SetDelay> |
a98: 5c 01 movw r10, r24 |
} |
|
if(MotorGestoppt && !TEST_SCHUB) PWM = 0; |
a9a: 80 91 63 00 lds r24, 0x0063 |
a9e: 88 23 and r24, r24 |
aa0: 21 f0 breq .+8 ; 0xaaa <main+0x1c4> |
aa2: 10 92 79 00 sts 0x0079, r1 |
aa6: 10 92 78 00 sts 0x0078, r1 |
SetPWM(); |
aaa: d9 da rcall .-2638 ; 0x5e <SetPWM> |
// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
if(!ZeitFuerBerechnungen++) |
aac: 80 91 62 00 lds r24, 0x0062 |
ab0: 8f 5f subi r24, 0xFF ; 255 |
ab2: 80 93 62 00 sts 0x0062, r24 |
ab6: 81 50 subi r24, 0x01 ; 1 |
ab8: 09 f0 breq .+2 ; 0xabc <main+0x1d6> |
aba: ac cf rjmp .-168 ; 0xa14 <main+0x12e> |
{ |
if(MotorGestoppt) |
abc: 80 91 63 00 lds r24, 0x0063 |
ac0: 88 23 and r24, r24 |
ac2: 41 f0 breq .+16 ; 0xad4 <main+0x1ee> |
{ |
GRN_ON; |
ac4: 80 91 b2 00 lds r24, 0x00B2 |
ac8: 8c 30 cpi r24, 0x0C ; 12 |
aca: 10 f4 brcc .+4 ; 0xad0 <main+0x1ea> |
acc: 97 9a sbi 0x12, 7 ; 18 |
ace: 01 c0 rjmp .+2 ; 0xad2 <main+0x1ec> |
ad0: 97 98 cbi 0x12, 7 ; 18 |
FastADConvert(); |
ad2: 17 d4 rcall .+2094 ; 0x1302 <FastADConvert> |
DebugAusgaben(); // welche Werte sollen angezeigt werden? |
if(!UebertragungAbgeschlossen) SendUart(); |
else DatenUebertragung(); |
} |
// Berechnen des Mittleren Stroms zur (langsamen) Strombegrenzung |
if(CheckDelay(MittelstromTimer)) |
ad4: c6 01 movw r24, r12 |
ad6: a2 d3 rcall .+1860 ; 0x121c <CheckDelay> |
ad8: 88 23 and r24, r24 |
ada: a9 f1 breq .+106 ; 0xb46 <main+0x260> |
{ |
MittelstromTimer = SetDelay(50); // alle 50ms |
adc: 82 e3 ldi r24, 0x32 ; 50 |
ade: 90 e0 ldi r25, 0x00 ; 0 |
ae0: 93 d3 rcall .+1830 ; 0x1208 <SetDelay> |
ae2: 6c 01 movw r12, r24 |
if(Mittelstrom < Strom) Mittelstrom++;// Mittelwert des Stroms bilden |
ae4: 80 91 7d 00 lds r24, 0x007D |
ae8: 48 2f mov r20, r24 |
aea: 50 e0 ldi r21, 0x00 ; 0 |
aec: 20 91 7a 00 lds r18, 0x007A |
af0: 30 91 7b 00 lds r19, 0x007B |
af4: 42 17 cp r20, r18 |
af6: 53 07 cpc r21, r19 |
af8: 10 f4 brcc .+4 ; 0xafe <main+0x218> |
afa: 8f 5f subi r24, 0xFF ; 255 |
afc: 04 c0 rjmp .+8 ; 0xb06 <main+0x220> |
else if(Mittelstrom > Strom) Mittelstrom--; |
afe: 24 17 cp r18, r20 |
b00: 35 07 cpc r19, r21 |
b02: 18 f4 brcc .+6 ; 0xb0a <main+0x224> |
b04: 81 50 subi r24, 0x01 ; 1 |
b06: 80 93 7d 00 sts 0x007D, r24 |
if(Strom > MAX_STROM) MaxPWM -= MaxPWM / 32; |
b0a: 29 3c cpi r18, 0xC9 ; 201 |
b0c: 31 05 cpc r19, r1 |
b0e: 48 f0 brcs .+18 ; 0xb22 <main+0x23c> |
b10: 80 91 64 00 lds r24, 0x0064 |
b14: 98 2f mov r25, r24 |
b16: 92 95 swap r25 |
b18: 96 95 lsr r25 |
b1a: 97 70 andi r25, 0x07 ; 7 |
b1c: 89 1b sub r24, r25 |
b1e: 80 93 64 00 sts 0x0064, r24 |
if((Mittelstrom > LIMIT_STROM))// Strom am Limit? |
b22: 80 91 7d 00 lds r24, 0x007D |
b26: 90 91 64 00 lds r25, 0x0064 |
b2a: 89 37 cpi r24, 0x79 ; 121 |
b2c: 38 f0 brcs .+14 ; 0xb3c <main+0x256> |
{ |
if(MaxPWM) MaxPWM--;// dann die Maximale PWM herunterfahren |
b2e: 99 23 and r25, r25 |
b30: 19 f0 breq .+6 ; 0xb38 <main+0x252> |
b32: 91 50 subi r25, 0x01 ; 1 |
b34: 90 93 64 00 sts 0x0064, r25 |
PORTC |= ROT; |
b38: ab 9a sbi 0x15, 3 ; 21 |
b3a: 05 c0 rjmp .+10 ; 0xb46 <main+0x260> |
} |
else |
{ |
if(MaxPWM < MAX_PWM) MaxPWM++; |
b3c: 9f 3f cpi r25, 0xFF ; 255 |
b3e: 19 f0 breq .+6 ; 0xb46 <main+0x260> |
b40: 9f 5f subi r25, 0xFF ; 255 |
b42: 90 93 64 00 sts 0x0064, r25 |
} |
} |
|
if(CheckDelay(DrehzahlMessTimer)) // Ist-Drehzahl bestimmen |
b46: ce 01 movw r24, r28 |
b48: 69 d3 rcall .+1746 ; 0x121c <CheckDelay> |
b4a: 88 23 and r24, r24 |
b4c: 91 f0 breq .+36 ; 0xb72 <main+0x28c> |
{ |
DrehzahlMessTimer = SetDelay(10); |
b4e: 8a e0 ldi r24, 0x0A ; 10 |
b50: 90 e0 ldi r25, 0x00 ; 0 |
b52: 5a d3 rcall .+1716 ; 0x1208 <SetDelay> |
b54: ec 01 movw r28, r24 |
SIO_Drehzahl = CntKommutierungen;//(6 * CntKommutierungen) / (POLANZAHL / 2); |
b56: 80 91 89 00 lds r24, 0x0089 |
b5a: 90 91 8a 00 lds r25, 0x008A |
b5e: 90 93 8c 00 sts 0x008C, r25 |
b62: 80 93 8b 00 sts 0x008B, r24 |
CntKommutierungen = 0; |
b66: 10 92 8a 00 sts 0x008A, r1 |
b6a: 10 92 89 00 sts 0x0089, r1 |
// if(PPM_Timeout == 0) // keine PPM-Signale |
ZeitZumAdWandeln = 1; |
b6e: f0 92 65 00 sts 0x0065, r15 |
} |
} |
} |
#endif |
// Motor Stehen geblieben |
if((CheckDelay(MinUpmPulse) && SIO_Drehzahl == 0) || MotorAnwerfen) |
b72: 80 91 b3 02 lds r24, 0x02B3 |
b76: 90 91 b4 02 lds r25, 0x02B4 |
b7a: 50 d3 rcall .+1696 ; 0x121c <CheckDelay> |
b7c: 88 23 and r24, r24 |
b7e: 31 f0 breq .+12 ; 0xb8c <main+0x2a6> |
b80: 80 91 8b 00 lds r24, 0x008B |
b84: 90 91 8c 00 lds r25, 0x008C |
b88: 89 2b or r24, r25 |
b8a: 29 f0 breq .+10 ; 0xb96 <main+0x2b0> |
b8c: 80 91 88 00 lds r24, 0x0088 |
b90: 88 23 and r24, r24 |
b92: 09 f4 brne .+2 ; 0xb96 <main+0x2b0> |
b94: 3f cf rjmp .-386 ; 0xa14 <main+0x12e> |
{ |
MotorGestoppt = 1; |
b96: f0 92 63 00 sts 0x0063, r15 |
DISABLE_SENSE_INT; |
b9a: 10 92 b1 00 sts 0x00B1, r1 |
b9e: 43 98 cbi 0x08, 3 ; 8 |
MinUpmPulse = SetDelay(100); |
ba0: 84 e6 ldi r24, 0x64 ; 100 |
ba2: 90 e0 ldi r25, 0x00 ; 0 |
ba4: 31 d3 rcall .+1634 ; 0x1208 <SetDelay> |
ba6: 90 93 b4 02 sts 0x02B4, r25 |
baa: 80 93 b3 02 sts 0x02B3, r24 |
if(MotorAnwerfen) |
bae: 80 91 88 00 lds r24, 0x0088 |
bb2: 88 23 and r24, r24 |
bb4: 09 f4 brne .+2 ; 0xbb8 <main+0x2d2> |
bb6: 2e cf rjmp .-420 ; 0xa14 <main+0x12e> |
{ |
PORTC &= ~ROT; |
bb8: ab 98 cbi 0x15, 3 ; 21 |
Strom_max = 0; |
bba: 10 92 7c 00 sts 0x007C, r1 |
MotorAnwerfen = 0; |
bbe: 10 92 88 00 sts 0x0088, r1 |
if(Anwerfen(10)) |
bc2: 8a e0 ldi r24, 0x0A ; 10 |
bc4: b9 dd rcall .-1166 ; 0x738 <Anwerfen> |
bc6: 88 23 and r24, r24 |
bc8: 09 f4 brne .+2 ; 0xbcc <main+0x2e6> |
bca: 5b c0 rjmp .+182 ; 0xc82 <main+0x39c> |
{ |
GRN_ON; |
bcc: 80 91 b2 00 lds r24, 0x00B2 |
bd0: 8c 30 cpi r24, 0x0C ; 12 |
bd2: 10 f4 brcc .+4 ; 0xbd8 <main+0x2f2> |
bd4: 97 9a sbi 0x12, 7 ; 18 |
bd6: 01 c0 rjmp .+2 ; 0xbda <main+0x2f4> |
bd8: 97 98 cbi 0x12, 7 ; 18 |
MotorGestoppt = 0; |
bda: 10 92 63 00 sts 0x0063, r1 |
Phase--; |
bde: 80 91 af 00 lds r24, 0x00AF |
be2: 81 50 subi r24, 0x01 ; 1 |
be4: 80 93 af 00 sts 0x00AF, r24 |
PWM = 1; |
be8: 70 92 79 00 sts 0x0079, r7 |
bec: 60 92 78 00 sts 0x0078, r6 |
SetPWM(); |
bf0: 36 da rcall .-2964 ; 0x5e <SetPWM> |
SENSE_TOGGLE_INT; |
bf2: 88 b1 in r24, 0x08 ; 8 |
bf4: 8c 7f andi r24, 0xFC ; 252 |
bf6: 88 b9 out 0x08, r24 ; 8 |
ENABLE_SENSE_INT; |
bf8: f0 92 b1 00 sts 0x00B1, r15 |
bfc: 88 b1 in r24, 0x08 ; 8 |
bfe: 8a 60 ori r24, 0x0A ; 10 |
c00: 88 b9 out 0x08, r24 ; 8 |
MinUpmPulse = SetDelay(20); |
c02: 84 e1 ldi r24, 0x14 ; 20 |
c04: 90 e0 ldi r25, 0x00 ; 0 |
c06: 00 d3 rcall .+1536 ; 0x1208 <SetDelay> |
c08: 90 93 b4 02 sts 0x02B4, r25 |
c0c: 80 93 b3 02 sts 0x02B3, r24 |
while(!CheckDelay(MinUpmPulse)); // kurz Synchronisieren |
c10: 80 91 b3 02 lds r24, 0x02B3 |
c14: 90 91 b4 02 lds r25, 0x02B4 |
c18: 01 d3 rcall .+1538 ; 0x121c <CheckDelay> |
c1a: 88 23 and r24, r24 |
c1c: c9 f3 breq .-14 ; 0xc10 <main+0x32a> |
PWM = 15; |
c1e: 90 92 79 00 sts 0x0079, r9 |
c22: 80 92 78 00 sts 0x0078, r8 |
SetPWM(); |
c26: 1b da rcall .-3018 ; 0x5e <SetPWM> |
MinUpmPulse = SetDelay(300); |
c28: 8c e2 ldi r24, 0x2C ; 44 |
c2a: 91 e0 ldi r25, 0x01 ; 1 |
c2c: ed d2 rcall .+1498 ; 0x1208 <SetDelay> |
c2e: 90 93 b4 02 sts 0x02B4, r25 |
c32: 80 93 b3 02 sts 0x02B3, r24 |
c36: 18 c0 rjmp .+48 ; 0xc68 <main+0x382> |
while(!CheckDelay(MinUpmPulse)) // kurz Durchstarten |
{ |
if(Strom > LIMIT_STROM/2) |
c38: 80 91 7a 00 lds r24, 0x007A |
c3c: 90 91 7b 00 lds r25, 0x007B |
c40: cd 97 sbiw r24, 0x3d ; 61 |
c42: 90 f0 brcs .+36 ; 0xc68 <main+0x382> |
{ |
STEUER_OFF; // Abschalten wegen Kurzschluss |
c44: 82 b3 in r24, 0x12 ; 18 |
c46: 87 7c andi r24, 0xC7 ; 199 |
c48: 82 bb out 0x12, r24 ; 18 |
c4a: 1b bc out 0x2b, r1 ; 43 |
c4c: 1a bc out 0x2a, r1 ; 42 |
c4e: 19 bc out 0x29, r1 ; 41 |
c50: 18 bc out 0x28, r1 ; 40 |
c52: 13 bc out 0x23, r1 ; 35 |
c54: ff bc out 0x2f, r15 ; 47 |
c56: e5 bc out 0x25, r14 ; 37 |
c58: 57 ba out 0x17, r5 ; 23 |
c5a: 88 b3 in r24, 0x18 ; 24 |
c5c: 81 7f andi r24, 0xF1 ; 241 |
c5e: 88 bb out 0x18, r24 ; 24 |
RotBlink(10); |
c60: 8a e0 ldi r24, 0x0A ; 10 |
c62: 0c db rcall .-2536 ; 0x27c <RotBlink> |
MotorAnwerfen = 1; |
c64: f0 92 88 00 sts 0x0088, r15 |
MinUpmPulse = SetDelay(20); |
while(!CheckDelay(MinUpmPulse)); // kurz Synchronisieren |
PWM = 15; |
SetPWM(); |
MinUpmPulse = SetDelay(300); |
while(!CheckDelay(MinUpmPulse)) // kurz Durchstarten |
c68: 80 91 b3 02 lds r24, 0x02B3 |
c6c: 90 91 b4 02 lds r25, 0x02B4 |
c70: d5 d2 rcall .+1450 ; 0x121c <CheckDelay> |
c72: 88 23 and r24, r24 |
c74: 09 f3 breq .-62 ; 0xc38 <main+0x352> |
RotBlink(10); |
MotorAnwerfen = 1; |
} |
} |
// Drehzahlmessung wieder aufsetzen |
DrehzahlMessTimer = SetDelay(50); |
c76: 82 e3 ldi r24, 0x32 ; 50 |
c78: 90 e0 ldi r25, 0x00 ; 0 |
c7a: c6 d2 rcall .+1420 ; 0x1208 <SetDelay> |
c7c: ec 01 movw r28, r24 |
c7e: 07 e0 ldi r16, 0x07 ; 7 |
c80: c9 ce rjmp .-622 ; 0xa14 <main+0x12e> |
altPhase = 7; |
} |
else if(SollwertErmittlung()) MotorAnwerfen = 1; |
c82: 5e da rcall .-2884 ; 0x140 <SollwertErmittlung> |
c84: 88 23 and r24, r24 |
c86: 09 f4 brne .+2 ; 0xc8a <main+0x3a4> |
c88: c5 ce rjmp .-630 ; 0xa14 <main+0x12e> |
c8a: f0 92 88 00 sts 0x0088, r15 |
c8e: c2 ce rjmp .-636 ; 0xa14 <main+0x12e> |
|
00000c90 <__vector_13>: |
|
int Debug_Timer; |
|
|
SIGNAL(INT_VEC_TX) |
{ |
c90: 1f 92 push r1 |
c92: 0f 92 push r0 |
c94: 0f b6 in r0, 0x3f ; 63 |
c96: 0f 92 push r0 |
c98: 11 24 eor r1, r1 |
} |
c9a: 0f 90 pop r0 |
c9c: 0f be out 0x3f, r0 ; 63 |
c9e: 0f 90 pop r0 |
ca0: 1f 90 pop r1 |
ca2: 18 95 reti |
|
00000ca4 <SendUart>: |
|
void SendUart(void) |
{ |
static unsigned int ptr = 0; |
unsigned char tmp_tx; |
if(!(UCSRA & 0x40)) return; |
ca4: 5e 9b sbis 0x0b, 6 ; 11 |
ca6: 24 c0 rjmp .+72 ; 0xcf0 <SendUart+0x4c> |
if(!UebertragungAbgeschlossen) |
ca8: 80 91 6f 00 lds r24, 0x006F |
cac: 88 23 and r24, r24 |
cae: e1 f4 brne .+56 ; 0xce8 <SendUart+0x44> |
{ |
ptr++; // die [0] wurde schon gesendet |
cb0: 80 91 a0 00 lds r24, 0x00A0 |
cb4: 90 91 a1 00 lds r25, 0x00A1 |
cb8: 01 96 adiw r24, 0x01 ; 1 |
cba: 90 93 a1 00 sts 0x00A1, r25 |
cbe: 80 93 a0 00 sts 0x00A0, r24 |
tmp_tx = SendeBuffer[ptr]; |
cc2: fc 01 movw r30, r24 |
cc4: e8 54 subi r30, 0x48 ; 72 |
cc6: fd 4f sbci r31, 0xFD ; 253 |
cc8: e0 81 ld r30, Z |
if((tmp_tx == '\r') || (ptr == MAX_SENDE_BUFF)) |
cca: ed 30 cpi r30, 0x0D ; 13 |
ccc: 19 f0 breq .+6 ; 0xcd4 <SendUart+0x30> |
cce: 84 36 cpi r24, 0x64 ; 100 |
cd0: 91 05 cpc r25, r1 |
cd2: 39 f4 brne .+14 ; 0xce2 <SendUart+0x3e> |
{ |
ptr = 0; |
cd4: 10 92 a1 00 sts 0x00A1, r1 |
cd8: 10 92 a0 00 sts 0x00A0, r1 |
UebertragungAbgeschlossen = 1; |
cdc: 81 e0 ldi r24, 0x01 ; 1 |
cde: 80 93 6f 00 sts 0x006F, r24 |
} |
USR |= (1<TXC); |
ce2: 58 9a sbi 0x0b, 0 ; 11 |
UDR = tmp_tx; |
ce4: ec b9 out 0x0c, r30 ; 12 |
ce6: 08 95 ret |
} |
else ptr = 0; |
ce8: 10 92 a1 00 sts 0x00A1, r1 |
cec: 10 92 a0 00 sts 0x00A0, r1 |
cf0: 08 95 ret |
|
00000cf2 <Decode64>: |
} |
|
// -------------------------------------------------------------------------- |
void Decode64(unsigned char *ptrOut, unsigned char len, unsigned char ptrIn,unsigned char max) // Wohin mit den Daten; Wie lang; Wo im RxdBuffer |
{ |
cf2: 1f 93 push r17 |
cf4: cf 93 push r28 |
cf6: df 93 push r29 |
cf8: ec 01 movw r28, r24 |
cfa: 70 e0 ldi r23, 0x00 ; 0 |
{ |
a = RxdBuffer[ptrIn++] - '='; |
b = RxdBuffer[ptrIn++] - '='; |
c = RxdBuffer[ptrIn++] - '='; |
d = RxdBuffer[ptrIn++] - '='; |
if(ptrIn > max - 2) break; // nicht mehr Daten verarbeiten, als empfangen wurden |
cfc: a2 2f mov r26, r18 |
cfe: b0 e0 ldi r27, 0x00 ; 0 |
d00: 11 97 sbiw r26, 0x01 ; 1 |
d02: 48 c0 rjmp .+144 ; 0xd94 <Decode64+0xa2> |
unsigned char a,b,c,d; |
unsigned char ptr = 0; |
unsigned char x,y,z; |
while(len) |
{ |
a = RxdBuffer[ptrIn++] - '='; |
d04: e4 2f mov r30, r20 |
d06: f0 e0 ldi r31, 0x00 ; 0 |
d08: e2 5e subi r30, 0xE2 ; 226 |
d0a: fc 4f sbci r31, 0xFC ; 252 |
d0c: 30 81 ld r19, Z |
b = RxdBuffer[ptrIn++] - '='; |
d0e: 4f 5f subi r20, 0xFF ; 255 |
d10: e4 2f mov r30, r20 |
d12: f0 e0 ldi r31, 0x00 ; 0 |
d14: e2 5e subi r30, 0xE2 ; 226 |
d16: fc 4f sbci r31, 0xFC ; 252 |
d18: 50 81 ld r21, Z |
c = RxdBuffer[ptrIn++] - '='; |
d1a: 4f 5f subi r20, 0xFF ; 255 |
d1c: e4 2f mov r30, r20 |
d1e: f0 e0 ldi r31, 0x00 ; 0 |
d20: e2 5e subi r30, 0xE2 ; 226 |
d22: fc 4f sbci r31, 0xFC ; 252 |
d24: 10 81 ld r17, Z |
d = RxdBuffer[ptrIn++] - '='; |
d26: 4f 5f subi r20, 0xFF ; 255 |
d28: e4 2f mov r30, r20 |
d2a: f0 e0 ldi r31, 0x00 ; 0 |
d2c: e2 5e subi r30, 0xE2 ; 226 |
d2e: fc 4f sbci r31, 0xFC ; 252 |
d30: 20 81 ld r18, Z |
d32: 4f 5f subi r20, 0xFF ; 255 |
if(ptrIn > max - 2) break; // nicht mehr Daten verarbeiten, als empfangen wurden |
d34: 84 2f mov r24, r20 |
d36: 90 e0 ldi r25, 0x00 ; 0 |
d38: 8a 17 cp r24, r26 |
d3a: 9b 07 cpc r25, r27 |
d3c: 74 f5 brge .+92 ; 0xd9a <Decode64+0xa8> |
unsigned char ptr = 0; |
unsigned char x,y,z; |
while(len) |
{ |
a = RxdBuffer[ptrIn++] - '='; |
b = RxdBuffer[ptrIn++] - '='; |
d3e: 5d 53 subi r21, 0x3D ; 61 |
|
x = (a << 2) | (b >> 4); |
y = ((b & 0x0f) << 4) | (c >> 2); |
z = ((c & 0x03) << 6) | d; |
|
if(len--) ptrOut[ptr++] = x; else break; |
d40: fe 01 movw r30, r28 |
d42: e7 0f add r30, r23 |
d44: f1 1d adc r31, r1 |
d46: 85 2f mov r24, r21 |
d48: 82 95 swap r24 |
d4a: 8f 70 andi r24, 0x0F ; 15 |
d4c: 3d 53 subi r19, 0x3D ; 61 |
d4e: 33 0f add r19, r19 |
d50: 33 0f add r19, r19 |
d52: 38 2b or r19, r24 |
d54: 30 83 st Z, r19 |
if(len--) ptrOut[ptr++] = y; else break; |
d56: 61 30 cpi r22, 0x01 ; 1 |
d58: 01 f1 breq .+64 ; 0xd9a <Decode64+0xa8> |
unsigned char x,y,z; |
while(len) |
{ |
a = RxdBuffer[ptrIn++] - '='; |
b = RxdBuffer[ptrIn++] - '='; |
c = RxdBuffer[ptrIn++] - '='; |
d5a: 91 2f mov r25, r17 |
d5c: 9d 53 subi r25, 0x3D ; 61 |
x = (a << 2) | (b >> 4); |
y = ((b & 0x0f) << 4) | (c >> 2); |
z = ((c & 0x03) << 6) | d; |
|
if(len--) ptrOut[ptr++] = x; else break; |
if(len--) ptrOut[ptr++] = y; else break; |
d5e: 7f 5f subi r23, 0xFF ; 255 |
d60: fe 01 movw r30, r28 |
d62: e7 0f add r30, r23 |
d64: f1 1d adc r31, r1 |
d66: 71 50 subi r23, 0x01 ; 1 |
d68: 52 95 swap r21 |
d6a: 50 7f andi r21, 0xF0 ; 240 |
d6c: 89 2f mov r24, r25 |
d6e: 86 95 lsr r24 |
d70: 86 95 lsr r24 |
d72: 58 2b or r21, r24 |
d74: 50 83 st Z, r21 |
if(len--) ptrOut[ptr++] = z; else break; |
d76: 62 30 cpi r22, 0x02 ; 2 |
d78: 81 f0 breq .+32 ; 0xd9a <Decode64+0xa8> |
d7a: 63 50 subi r22, 0x03 ; 3 |
d7c: 7e 5f subi r23, 0xFE ; 254 |
d7e: fe 01 movw r30, r28 |
d80: e7 0f add r30, r23 |
d82: f1 1d adc r31, r1 |
d84: 92 95 swap r25 |
d86: 99 0f add r25, r25 |
d88: 99 0f add r25, r25 |
d8a: 90 7c andi r25, 0xC0 ; 192 |
d8c: 2d 53 subi r18, 0x3D ; 61 |
d8e: 92 2b or r25, r18 |
d90: 90 83 st Z, r25 |
d92: 7f 5f subi r23, 0xFF ; 255 |
void Decode64(unsigned char *ptrOut, unsigned char len, unsigned char ptrIn,unsigned char max) // Wohin mit den Daten; Wie lang; Wo im RxdBuffer |
{ |
unsigned char a,b,c,d; |
unsigned char ptr = 0; |
unsigned char x,y,z; |
while(len) |
d94: 66 23 and r22, r22 |
d96: 09 f0 breq .+2 ; 0xd9a <Decode64+0xa8> |
d98: b5 cf rjmp .-150 ; 0xd04 <Decode64+0x12> |
if(len--) ptrOut[ptr++] = x; else break; |
if(len--) ptrOut[ptr++] = y; else break; |
if(len--) ptrOut[ptr++] = z; else break; |
} |
|
} |
d9a: df 91 pop r29 |
d9c: cf 91 pop r28 |
d9e: 1f 91 pop r17 |
da0: 08 95 ret |
|
00000da2 <AddCRC>: |
}; |
|
|
// -------------------------------------------------------------------------- |
void AddCRC(unsigned int wieviele) |
{ |
da2: dc 01 movw r26, r24 |
da4: 20 e0 ldi r18, 0x00 ; 0 |
da6: 30 e0 ldi r19, 0x00 ; 0 |
da8: 40 e0 ldi r20, 0x00 ; 0 |
daa: 50 e0 ldi r21, 0x00 ; 0 |
dac: 08 c0 rjmp .+16 ; 0xdbe <AddCRC+0x1c> |
unsigned int tmpCRC = 0,i; |
for(i = 0; i < wieviele;i++) |
{ |
tmpCRC += SendeBuffer[i]; |
dae: fa 01 movw r30, r20 |
db0: e8 54 subi r30, 0x48 ; 72 |
db2: fd 4f sbci r31, 0xFD ; 253 |
db4: 80 81 ld r24, Z |
db6: 28 0f add r18, r24 |
db8: 31 1d adc r19, r1 |
|
// -------------------------------------------------------------------------- |
void AddCRC(unsigned int wieviele) |
{ |
unsigned int tmpCRC = 0,i; |
for(i = 0; i < wieviele;i++) |
dba: 4f 5f subi r20, 0xFF ; 255 |
dbc: 5f 4f sbci r21, 0xFF ; 255 |
dbe: 4a 17 cp r20, r26 |
dc0: 5b 07 cpc r21, r27 |
dc2: a8 f3 brcs .-22 ; 0xdae <AddCRC+0xc> |
{ |
tmpCRC += SendeBuffer[i]; |
} |
tmpCRC %= 4096; |
dc4: 3f 70 andi r19, 0x0F ; 15 |
SendeBuffer[i++] = '=' + tmpCRC / 64; |
dc6: c9 01 movw r24, r18 |
dc8: 36 e0 ldi r19, 0x06 ; 6 |
dca: 96 95 lsr r25 |
dcc: 87 95 ror r24 |
dce: 3a 95 dec r19 |
dd0: e1 f7 brne .-8 ; 0xdca <AddCRC+0x28> |
dd2: 83 5c subi r24, 0xC3 ; 195 |
dd4: fd 01 movw r30, r26 |
dd6: e8 54 subi r30, 0x48 ; 72 |
dd8: fd 4f sbci r31, 0xFD ; 253 |
dda: 80 83 st Z, r24 |
ddc: 11 96 adiw r26, 0x01 ; 1 |
SendeBuffer[i++] = '=' + tmpCRC % 64; |
dde: 2f 73 andi r18, 0x3F ; 63 |
de0: 23 5c subi r18, 0xC3 ; 195 |
de2: fd 01 movw r30, r26 |
de4: e8 54 subi r30, 0x48 ; 72 |
de6: fd 4f sbci r31, 0xFD ; 253 |
de8: 20 83 st Z, r18 |
SendeBuffer[i++] = '\r'; |
dea: a7 54 subi r26, 0x47 ; 71 |
dec: bd 4f sbci r27, 0xFD ; 253 |
dee: 8d e0 ldi r24, 0x0D ; 13 |
df0: 8c 93 st X, r24 |
UebertragungAbgeschlossen = 0; |
df2: 10 92 6f 00 sts 0x006F, r1 |
UDR = SendeBuffer[0]; |
df6: 80 91 b8 02 lds r24, 0x02B8 |
dfa: 8c b9 out 0x0c, r24 ; 12 |
} |
dfc: 08 95 ret |
|
00000dfe <SendOutData>: |
|
|
// -------------------------------------------------------------------------- |
void SendOutData(unsigned char cmd,unsigned char modul, unsigned char *snd, unsigned char len) |
{ |
dfe: cf 93 push r28 |
e00: df 93 push r29 |
e02: ea 01 movw r28, r20 |
e04: b2 2f mov r27, r18 |
unsigned int pt = 0; |
unsigned char a,b,c; |
unsigned char ptr = 0; |
|
|
SendeBuffer[pt++] = '#'; // Startzeichen |
e06: 93 e2 ldi r25, 0x23 ; 35 |
e08: 90 93 b8 02 sts 0x02B8, r25 |
SendeBuffer[pt++] = modul; // Adresse (a=0; b=1,...) |
e0c: 60 93 b9 02 sts 0x02B9, r22 |
SendeBuffer[pt++] = cmd; // Commando |
e10: 80 93 ba 02 sts 0x02BA, r24 |
e14: 63 e0 ldi r22, 0x03 ; 3 |
e16: 70 e0 ldi r23, 0x00 ; 0 |
e18: a0 e0 ldi r26, 0x00 ; 0 |
e1a: 4e c0 rjmp .+156 ; 0xeb8 <SendOutData+0xba> |
|
while(len) |
{ |
if(len) { a = snd[ptr++]; len--;} else a = 0; |
e1c: fe 01 movw r30, r28 |
e1e: ea 0f add r30, r26 |
e20: f1 1d adc r31, r1 |
e22: 90 81 ld r25, Z |
e24: af 5f subi r26, 0xFF ; 255 |
e26: b1 50 subi r27, 0x01 ; 1 |
if(len) { b = snd[ptr++]; len--;} else b = 0; |
e28: 19 f4 brne .+6 ; 0xe30 <SendOutData+0x32> |
e2a: 30 e0 ldi r19, 0x00 ; 0 |
e2c: 40 e0 ldi r20, 0x00 ; 0 |
e2e: 0f c0 rjmp .+30 ; 0xe4e <SendOutData+0x50> |
e30: fe 01 movw r30, r28 |
e32: ea 0f add r30, r26 |
e34: f1 1d adc r31, r1 |
e36: 40 81 ld r20, Z |
e38: af 5f subi r26, 0xFF ; 255 |
e3a: b1 50 subi r27, 0x01 ; 1 |
if(len) { c = snd[ptr++]; len--;} else c = 0; |
e3c: 11 f4 brne .+4 ; 0xe42 <SendOutData+0x44> |
e3e: 30 e0 ldi r19, 0x00 ; 0 |
e40: 06 c0 rjmp .+12 ; 0xe4e <SendOutData+0x50> |
e42: fe 01 movw r30, r28 |
e44: ea 0f add r30, r26 |
e46: f1 1d adc r31, r1 |
e48: 30 81 ld r19, Z |
e4a: af 5f subi r26, 0xFF ; 255 |
e4c: b1 50 subi r27, 0x01 ; 1 |
SendeBuffer[pt++] = '=' + (a >> 2); |
e4e: 89 2f mov r24, r25 |
e50: 86 95 lsr r24 |
e52: 86 95 lsr r24 |
e54: 83 5c subi r24, 0xC3 ; 195 |
e56: fb 01 movw r30, r22 |
e58: e8 54 subi r30, 0x48 ; 72 |
e5a: fd 4f sbci r31, 0xFD ; 253 |
e5c: 80 83 st Z, r24 |
SendeBuffer[pt++] = '=' + (((a & 0x03) << 4) | ((b & 0xf0) >> 4)); |
e5e: 24 2f mov r18, r20 |
e60: 22 95 swap r18 |
e62: 2f 70 andi r18, 0x0F ; 15 |
e64: 89 2f mov r24, r25 |
e66: 90 e0 ldi r25, 0x00 ; 0 |
e68: 83 70 andi r24, 0x03 ; 3 |
e6a: 90 70 andi r25, 0x00 ; 0 |
e6c: 54 e0 ldi r21, 0x04 ; 4 |
e6e: 88 0f add r24, r24 |
e70: 99 1f adc r25, r25 |
e72: 5a 95 dec r21 |
e74: e1 f7 brne .-8 ; 0xe6e <SendOutData+0x70> |
e76: 28 2b or r18, r24 |
e78: 23 5c subi r18, 0xC3 ; 195 |
e7a: fb 01 movw r30, r22 |
e7c: e7 54 subi r30, 0x47 ; 71 |
e7e: fd 4f sbci r31, 0xFD ; 253 |
e80: 20 83 st Z, r18 |
SendeBuffer[pt++] = '=' + (((b & 0x0f) << 2) | ((c & 0xc0) >> 6)); |
e82: 84 2f mov r24, r20 |
e84: 90 e0 ldi r25, 0x00 ; 0 |
e86: 8f 70 andi r24, 0x0F ; 15 |
e88: 90 70 andi r25, 0x00 ; 0 |
e8a: 88 0f add r24, r24 |
e8c: 99 1f adc r25, r25 |
e8e: 88 0f add r24, r24 |
e90: 99 1f adc r25, r25 |
e92: 23 2f mov r18, r19 |
e94: 22 95 swap r18 |
e96: 26 95 lsr r18 |
e98: 26 95 lsr r18 |
e9a: 23 70 andi r18, 0x03 ; 3 |
e9c: 28 2b or r18, r24 |
e9e: 23 5c subi r18, 0xC3 ; 195 |
ea0: fb 01 movw r30, r22 |
ea2: e6 54 subi r30, 0x46 ; 70 |
ea4: fd 4f sbci r31, 0xFD ; 253 |
ea6: 20 83 st Z, r18 |
SendeBuffer[pt++] = '=' + ( c & 0x3f); |
ea8: 3f 73 andi r19, 0x3F ; 63 |
eaa: 33 5c subi r19, 0xC3 ; 195 |
eac: fb 01 movw r30, r22 |
eae: e5 54 subi r30, 0x45 ; 69 |
eb0: fd 4f sbci r31, 0xFD ; 253 |
eb2: 30 83 st Z, r19 |
eb4: 6c 5f subi r22, 0xFC ; 252 |
eb6: 7f 4f sbci r23, 0xFF ; 255 |
|
SendeBuffer[pt++] = '#'; // Startzeichen |
SendeBuffer[pt++] = modul; // Adresse (a=0; b=1,...) |
SendeBuffer[pt++] = cmd; // Commando |
|
while(len) |
eb8: bb 23 and r27, r27 |
eba: 09 f0 breq .+2 ; 0xebe <SendOutData+0xc0> |
ebc: af cf rjmp .-162 ; 0xe1c <SendOutData+0x1e> |
SendeBuffer[pt++] = '=' + (a >> 2); |
SendeBuffer[pt++] = '=' + (((a & 0x03) << 4) | ((b & 0xf0) >> 4)); |
SendeBuffer[pt++] = '=' + (((b & 0x0f) << 2) | ((c & 0xc0) >> 6)); |
SendeBuffer[pt++] = '=' + ( c & 0x3f); |
} |
AddCRC(pt); |
ebe: cb 01 movw r24, r22 |
ec0: 70 df rcall .-288 ; 0xda2 <AddCRC> |
} |
ec2: df 91 pop r29 |
ec4: cf 91 pop r28 |
ec6: 08 95 ret |
|
00000ec8 <uart_putchar>: |
|
//############################################################################ |
//Routine für die Serielle Ausgabe |
int uart_putchar (char c) |
//############################################################################ |
{ |
ec8: 1f 93 push r17 |
eca: 18 2f mov r17, r24 |
if (c == '\n') |
ecc: 8a 30 cpi r24, 0x0A ; 10 |
ece: 11 f4 brne .+4 ; 0xed4 <uart_putchar+0xc> |
uart_putchar('\r'); |
ed0: 8d e0 ldi r24, 0x0D ; 13 |
ed2: fa df rcall .-12 ; 0xec8 <uart_putchar> |
//Warten solange bis Zeichen gesendet wurde |
loop_until_bit_is_set(USR, UDRE); |
ed4: 5d 9b sbis 0x0b, 5 ; 11 |
ed6: fe cf rjmp .-4 ; 0xed4 <uart_putchar+0xc> |
//Ausgabe des Zeichens |
UDR = c; |
ed8: 1c b9 out 0x0c, r17 ; 12 |
|
return (0); |
} |
eda: 80 e0 ldi r24, 0x00 ; 0 |
edc: 90 e0 ldi r25, 0x00 ; 0 |
ede: 1f 91 pop r17 |
ee0: 08 95 ret |
|
00000ee2 <__vector_11>: |
|
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
//++ Empfangs-Part der Datenübertragung |
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
SIGNAL(INT_VEC_RX) |
{ |
ee2: 1f 92 push r1 |
ee4: 0f 92 push r0 |
ee6: 0f b6 in r0, 0x3f ; 63 |
ee8: 0f 92 push r0 |
eea: 11 24 eor r1, r1 |
eec: 2f 93 push r18 |
eee: 3f 93 push r19 |
ef0: 4f 93 push r20 |
ef2: 5f 93 push r21 |
ef4: 6f 93 push r22 |
ef6: 7f 93 push r23 |
ef8: 8f 93 push r24 |
efa: 9f 93 push r25 |
efc: af 93 push r26 |
efe: bf 93 push r27 |
f00: cf 93 push r28 |
f02: df 93 push r29 |
f04: ef 93 push r30 |
f06: ff 93 push r31 |
static unsigned int crc; |
static unsigned char crc1,crc2,buf_ptr; |
static unsigned char UartState = 0; |
unsigned char CrcOkay = 0; |
|
SioTmp = UDR; |
f08: 8c b1 in r24, 0x0c ; 12 |
f0a: 80 93 91 00 sts 0x0091, r24 |
if(buf_ptr >= MAX_EMPFANGS_BUFF) UartState = 0; |
f0e: 40 91 9b 00 lds r20, 0x009B |
f12: 44 36 cpi r20, 0x64 ; 100 |
f14: 10 f0 brcs .+4 ; 0xf1a <__vector_11+0x38> |
f16: 10 92 9a 00 sts 0x009A, r1 |
if(SioTmp == '\r' && UartState == 2) |
f1a: 50 91 91 00 lds r21, 0x0091 |
f1e: 5d 30 cpi r21, 0x0D ; 13 |
f20: 09 f0 breq .+2 ; 0xf24 <__vector_11+0x42> |
f22: 64 c0 rjmp .+200 ; 0xfec <__vector_11+0x10a> |
f24: 80 91 9a 00 lds r24, 0x009A |
f28: 82 30 cpi r24, 0x02 ; 2 |
f2a: 09 f0 breq .+2 ; 0xf2e <__vector_11+0x4c> |
f2c: 5f c0 rjmp .+190 ; 0xfec <__vector_11+0x10a> |
{ |
UartState = 0; |
f2e: 10 92 9a 00 sts 0x009A, r1 |
crc -= RxdBuffer[buf_ptr-2]; |
f32: a4 2f mov r26, r20 |
f34: b0 e0 ldi r27, 0x00 ; 0 |
f36: fd 01 movw r30, r26 |
f38: e4 5e subi r30, 0xE4 ; 228 |
f3a: fc 4f sbci r31, 0xFC ; 252 |
f3c: 30 81 ld r19, Z |
crc -= RxdBuffer[buf_ptr-1]; |
f3e: ed 01 movw r28, r26 |
f40: c3 5e subi r28, 0xE3 ; 227 |
f42: dc 4f sbci r29, 0xFC ; 252 |
f44: 28 81 ld r18, Y |
crc %= 4096; |
f46: 80 91 9e 00 lds r24, 0x009E |
f4a: 90 91 9f 00 lds r25, 0x009F |
f4e: 83 1b sub r24, r19 |
f50: 91 09 sbc r25, r1 |
f52: 82 1b sub r24, r18 |
f54: 91 09 sbc r25, r1 |
f56: 9f 70 andi r25, 0x0F ; 15 |
f58: 90 93 9f 00 sts 0x009F, r25 |
f5c: 80 93 9e 00 sts 0x009E, r24 |
crc1 = '=' + crc / 64; |
f60: 9c 01 movw r18, r24 |
f62: 66 e0 ldi r22, 0x06 ; 6 |
f64: 36 95 lsr r19 |
f66: 27 95 ror r18 |
f68: 6a 95 dec r22 |
f6a: e1 f7 brne .-8 ; 0xf64 <__vector_11+0x82> |
f6c: 23 5c subi r18, 0xC3 ; 195 |
f6e: 20 93 9d 00 sts 0x009D, r18 |
crc2 = '=' + crc % 64; |
f72: 98 2f mov r25, r24 |
f74: 9f 73 andi r25, 0x3F ; 63 |
f76: 93 5c subi r25, 0xC3 ; 195 |
f78: 90 93 9c 00 sts 0x009C, r25 |
CrcOkay = 0; |
if((crc1 == RxdBuffer[buf_ptr-2]) && (crc2 == RxdBuffer[buf_ptr-1])) CrcOkay = 1; else { CrcOkay = 0; }; |
f7c: 80 81 ld r24, Z |
f7e: 28 17 cp r18, r24 |
f80: 09 f0 breq .+2 ; 0xf84 <__vector_11+0xa2> |
f82: 80 c0 rjmp .+256 ; 0x1084 <__vector_11+0x1a2> |
f84: 88 81 ld r24, Y |
f86: 98 17 cp r25, r24 |
f88: 09 f0 breq .+2 ; 0xf8c <__vector_11+0xaa> |
f8a: 7c c0 rjmp .+248 ; 0x1084 <__vector_11+0x1a2> |
if(CrcOkay) // Datensatz schon verarbeitet |
{ |
//NeuerDatensatzEmpfangen = 1; |
AnzahlEmpfangsBytes = buf_ptr; |
f8c: 40 93 99 00 sts 0x0099, r20 |
|
RxdBuffer[buf_ptr] = '\r'; |
f90: a2 5e subi r26, 0xE2 ; 226 |
f92: bc 4f sbci r27, 0xFC ; 252 |
f94: 5c 93 st X, r21 |
if(/*(RxdBuffer[1] == MeineSlaveAdresse || (RxdBuffer[1] == 'a')) && */(RxdBuffer[2] == 'R')) wdt_enable(WDTO_250MS); // Reset-Commando |
f96: 80 91 20 03 lds r24, 0x0320 |
f9a: 82 35 cpi r24, 0x52 ; 82 |
f9c: 49 f4 brne .+18 ; 0xfb0 <__vector_11+0xce> |
f9e: 2c e0 ldi r18, 0x0C ; 12 |
fa0: 88 e1 ldi r24, 0x18 ; 24 |
fa2: 90 e0 ldi r25, 0x00 ; 0 |
fa4: 0f b6 in r0, 0x3f ; 63 |
fa6: f8 94 cli |
fa8: a8 95 wdr |
faa: 81 bd out 0x21, r24 ; 33 |
fac: 0f be out 0x3f, r0 ; 63 |
fae: 21 bd out 0x21, r18 ; 33 |
uart_putchar(RxdBuffer[2]); |
fb0: 80 91 20 03 lds r24, 0x0320 |
fb4: 89 df rcall .-238 ; 0xec8 <uart_putchar> |
if (RxdBuffer[2] == 't') // Motortest |
fb6: 80 91 20 03 lds r24, 0x0320 |
fba: 84 37 cpi r24, 0x74 ; 116 |
fbc: 09 f0 breq .+2 ; 0xfc0 <__vector_11+0xde> |
fbe: 62 c0 rjmp .+196 ; 0x1084 <__vector_11+0x1a2> |
{ Decode64((unsigned char *) &MotorTest[0],sizeof(MotorTest),3,AnzahlEmpfangsBytes); |
fc0: 20 91 99 00 lds r18, 0x0099 |
fc4: 83 e9 ldi r24, 0x93 ; 147 |
fc6: 90 e0 ldi r25, 0x00 ; 0 |
fc8: 66 e0 ldi r22, 0x06 ; 6 |
fca: 43 e0 ldi r20, 0x03 ; 3 |
fcc: 92 de rcall .-732 ; 0xcf2 <Decode64> |
SIO_Sollwert = MotorTest[MotorAdresse - 1]; |
fce: e0 91 66 00 lds r30, 0x0066 |
fd2: f0 e0 ldi r31, 0x00 ; 0 |
fd4: ee 56 subi r30, 0x6E ; 110 |
fd6: ff 4f sbci r31, 0xFF ; 255 |
fd8: 80 81 ld r24, Z |
fda: 80 93 90 00 sts 0x0090, r24 |
SIO_Timeout = 500; // werte für 500ms gültig |
fde: 84 ef ldi r24, 0xF4 ; 244 |
fe0: 91 e0 ldi r25, 0x01 ; 1 |
fe2: 90 93 83 00 sts 0x0083, r25 |
fe6: 80 93 82 00 sts 0x0082, r24 |
fea: 4c c0 rjmp .+152 ; 0x1084 <__vector_11+0x1a2> |
|
} |
} |
} |
else |
switch(UartState) |
fec: 80 91 9a 00 lds r24, 0x009A |
ff0: 81 30 cpi r24, 0x01 ; 1 |
ff2: f9 f0 breq .+62 ; 0x1032 <__vector_11+0x150> |
ff4: 81 30 cpi r24, 0x01 ; 1 |
ff6: 20 f0 brcs .+8 ; 0x1000 <__vector_11+0x11e> |
ff8: 82 30 cpi r24, 0x02 ; 2 |
ffa: 09 f0 breq .+2 ; 0xffe <__vector_11+0x11c> |
ffc: 41 c0 rjmp .+130 ; 0x1080 <__vector_11+0x19e> |
ffe: 24 c0 rjmp .+72 ; 0x1048 <__vector_11+0x166> |
{ |
case 0: |
if(SioTmp == '#' && !NeuerDatensatzEmpfangen) UartState = 1; // Startzeichen und Daten schon verarbeitet |
1000: 80 91 91 00 lds r24, 0x0091 |
1004: 83 32 cpi r24, 0x23 ; 35 |
1006: 39 f4 brne .+14 ; 0x1016 <__vector_11+0x134> |
1008: 80 91 92 00 lds r24, 0x0092 |
100c: 88 23 and r24, r24 |
100e: 19 f4 brne .+6 ; 0x1016 <__vector_11+0x134> |
1010: 81 e0 ldi r24, 0x01 ; 1 |
1012: 80 93 9a 00 sts 0x009A, r24 |
buf_ptr = 0; |
RxdBuffer[buf_ptr++] = SioTmp; |
1016: 80 91 91 00 lds r24, 0x0091 |
101a: 80 93 1e 03 sts 0x031E, r24 |
101e: 81 e0 ldi r24, 0x01 ; 1 |
1020: 80 93 9b 00 sts 0x009B, r24 |
crc = SioTmp; |
1024: 80 91 91 00 lds r24, 0x0091 |
1028: 80 93 9e 00 sts 0x009E, r24 |
102c: 10 92 9f 00 sts 0x009F, r1 |
1030: 29 c0 rjmp .+82 ; 0x1084 <__vector_11+0x1a2> |
break; |
case 1: // Adresse auswerten |
UartState++; |
1032: 82 e0 ldi r24, 0x02 ; 2 |
1034: 80 93 9a 00 sts 0x009A, r24 |
RxdBuffer[buf_ptr++] = SioTmp; |
1038: e4 2f mov r30, r20 |
103a: f0 e0 ldi r31, 0x00 ; 0 |
103c: 80 91 91 00 lds r24, 0x0091 |
1040: e2 5e subi r30, 0xE2 ; 226 |
1042: fc 4f sbci r31, 0xFC ; 252 |
1044: 80 83 st Z, r24 |
1046: 09 c0 rjmp .+18 ; 0x105a <__vector_11+0x178> |
crc += SioTmp; |
break; |
case 2: // Eingangsdaten sammeln |
RxdBuffer[buf_ptr] = SioTmp; |
1048: e4 2f mov r30, r20 |
104a: f0 e0 ldi r31, 0x00 ; 0 |
104c: 80 91 91 00 lds r24, 0x0091 |
1050: e2 5e subi r30, 0xE2 ; 226 |
1052: fc 4f sbci r31, 0xFC ; 252 |
1054: 80 83 st Z, r24 |
if(buf_ptr < MAX_EMPFANGS_BUFF) buf_ptr++; |
1056: 44 36 cpi r20, 0x64 ; 100 |
1058: 20 f4 brcc .+8 ; 0x1062 <__vector_11+0x180> |
105a: 4f 5f subi r20, 0xFF ; 255 |
105c: 40 93 9b 00 sts 0x009B, r20 |
1060: 02 c0 rjmp .+4 ; 0x1066 <__vector_11+0x184> |
else UartState = 0; |
1062: 10 92 9a 00 sts 0x009A, r1 |
crc += SioTmp; |
1066: 20 91 91 00 lds r18, 0x0091 |
106a: 80 91 9e 00 lds r24, 0x009E |
106e: 90 91 9f 00 lds r25, 0x009F |
1072: 82 0f add r24, r18 |
1074: 91 1d adc r25, r1 |
1076: 90 93 9f 00 sts 0x009F, r25 |
107a: 80 93 9e 00 sts 0x009E, r24 |
107e: 02 c0 rjmp .+4 ; 0x1084 <__vector_11+0x1a2> |
break; |
default: |
UartState = 0; |
1080: 10 92 9a 00 sts 0x009A, r1 |
break; |
} |
|
|
#endif |
}; |
1084: ff 91 pop r31 |
1086: ef 91 pop r30 |
1088: df 91 pop r29 |
108a: cf 91 pop r28 |
108c: bf 91 pop r27 |
108e: af 91 pop r26 |
1090: 9f 91 pop r25 |
1092: 8f 91 pop r24 |
1094: 7f 91 pop r23 |
1096: 6f 91 pop r22 |
1098: 5f 91 pop r21 |
109a: 4f 91 pop r20 |
109c: 3f 91 pop r19 |
109e: 2f 91 pop r18 |
10a0: 0f 90 pop r0 |
10a2: 0f be out 0x3f, r0 ; 63 |
10a4: 0f 90 pop r0 |
10a6: 1f 90 pop r1 |
10a8: 18 95 reti |
|
000010aa <WriteProgramData>: |
} |
|
// -------------------------------------------------------------------------- |
void WriteProgramData(unsigned int pos, unsigned char wert) |
{ |
} |
10aa: 08 95 ret |
|
000010ac <DatenUebertragung>: |
|
|
//--------------------------------------------------------------------------------------------- |
void DatenUebertragung(void) |
{ |
if((CheckDelay(Debug_Timer) && UebertragungAbgeschlossen)) // im Singlestep-Betrieb in jedem Schtitt senden |
10ac: 80 91 1c 03 lds r24, 0x031C |
10b0: 90 91 1d 03 lds r25, 0x031D |
10b4: b3 d0 rcall .+358 ; 0x121c <CheckDelay> |
10b6: 88 23 and r24, r24 |
10b8: 91 f0 breq .+36 ; 0x10de <DatenUebertragung+0x32> |
10ba: 80 91 6f 00 lds r24, 0x006F |
10be: 88 23 and r24, r24 |
10c0: 71 f0 breq .+28 ; 0x10de <DatenUebertragung+0x32> |
{ |
SendOutData('D',MeineSlaveAdresse,(unsigned char *) &DebugOut,sizeof(DebugOut)); |
10c2: 84 e4 ldi r24, 0x44 ; 68 |
10c4: 60 91 b7 02 lds r22, 0x02B7 |
10c8: 42 e8 ldi r20, 0x82 ; 130 |
10ca: 53 e0 ldi r21, 0x03 ; 3 |
10cc: 22 e1 ldi r18, 0x12 ; 18 |
10ce: 97 de rcall .-722 ; 0xdfe <SendOutData> |
Debug_Timer = SetDelay(50); // Sendeintervall |
10d0: 82 e3 ldi r24, 0x32 ; 50 |
10d2: 90 e0 ldi r25, 0x00 ; 0 |
10d4: 99 d0 rcall .+306 ; 0x1208 <SetDelay> |
10d6: 90 93 1d 03 sts 0x031D, r25 |
10da: 80 93 1c 03 sts 0x031C, r24 |
10de: 08 95 ret |
|
000010e0 <UART_Init>: |
void UART_Init (void) |
//############################################################################ |
{ |
//Enable TXEN im Register UCR TX-Data Enable & RX Enable |
|
UCR=(1 << TXEN) | (1 << RXEN); |
10e0: 88 e1 ldi r24, 0x18 ; 24 |
10e2: 8a b9 out 0x0a, r24 ; 10 |
// UART Double Speed (U2X) |
USR |= (1<<U2X); |
10e4: 59 9a sbi 0x0b, 1 ; 11 |
// RX-Interrupt Freigabe |
|
UCSRB |= (1<<RXCIE); // serieller Empfangsinterrupt |
10e6: 57 9a sbi 0x0a, 7 ; 10 |
|
// TX-Interrupt Freigabe |
// UCSRB |= (1<<TXCIE); |
|
//Teiler wird gesetzt |
UBRR= (SYSCLK / (BAUD_RATE * 8L) -1 ); |
10e8: 80 e1 ldi r24, 0x10 ; 16 |
10ea: 89 b9 out 0x09, r24 ; 9 |
//öffnet einen Kanal für printf (STDOUT) |
fdevopen (uart_putchar, NULL); |
10ec: 84 e6 ldi r24, 0x64 ; 100 |
10ee: 97 e0 ldi r25, 0x07 ; 7 |
10f0: 60 e0 ldi r22, 0x00 ; 0 |
10f2: 70 e0 ldi r23, 0x00 ; 0 |
10f4: f7 d3 rcall .+2030 ; 0x18e4 <fdevopen> |
Debug_Timer = SetDelay(200); |
10f6: 88 ec ldi r24, 0xC8 ; 200 |
10f8: 90 e0 ldi r25, 0x00 ; 0 |
10fa: 86 d0 rcall .+268 ; 0x1208 <SetDelay> |
10fc: 90 93 1d 03 sts 0x031D, r25 |
1100: 80 93 1c 03 sts 0x031C, r24 |
// Version beim Start ausgeben (nicht schön, aber geht... ) |
uart_putchar ('\n');uart_putchar ('B');uart_putchar ('L');uart_putchar (':'); |
1104: 8a e0 ldi r24, 0x0A ; 10 |
1106: e0 de rcall .-576 ; 0xec8 <uart_putchar> |
1108: 82 e4 ldi r24, 0x42 ; 66 |
110a: de de rcall .-580 ; 0xec8 <uart_putchar> |
110c: 8c e4 ldi r24, 0x4C ; 76 |
110e: dc de rcall .-584 ; 0xec8 <uart_putchar> |
1110: 8a e3 ldi r24, 0x3A ; 58 |
1112: da de rcall .-588 ; 0xec8 <uart_putchar> |
uart_putchar ('V');uart_putchar (0x30 + VERSION_HAUPTVERSION);uart_putchar ('.');uart_putchar (0x30 + VERSION_NEBENVERSION/10); uart_putchar (0x30 + VERSION_NEBENVERSION%10); |
1114: 86 e5 ldi r24, 0x56 ; 86 |
1116: d8 de rcall .-592 ; 0xec8 <uart_putchar> |
1118: 80 e3 ldi r24, 0x30 ; 48 |
111a: d6 de rcall .-596 ; 0xec8 <uart_putchar> |
111c: 8e e2 ldi r24, 0x2E ; 46 |
111e: d4 de rcall .-600 ; 0xec8 <uart_putchar> |
1120: 84 e3 ldi r24, 0x34 ; 52 |
1122: d2 de rcall .-604 ; 0xec8 <uart_putchar> |
1124: 81 e3 ldi r24, 0x31 ; 49 |
1126: d0 de rcall .-608 ; 0xec8 <uart_putchar> |
uart_putchar ('\n');uart_putchar('H');uart_putchar('W');uart_putchar (':');uart_putchar('1');uart_putchar('.');uart_putchar ((0x30-10) + HwVersion); |
1128: 8a e0 ldi r24, 0x0A ; 10 |
112a: ce de rcall .-612 ; 0xec8 <uart_putchar> |
112c: 88 e4 ldi r24, 0x48 ; 72 |
112e: cc de rcall .-616 ; 0xec8 <uart_putchar> |
1130: 87 e5 ldi r24, 0x57 ; 87 |
1132: ca de rcall .-620 ; 0xec8 <uart_putchar> |
1134: 8a e3 ldi r24, 0x3A ; 58 |
1136: c8 de rcall .-624 ; 0xec8 <uart_putchar> |
1138: 81 e3 ldi r24, 0x31 ; 49 |
113a: c6 de rcall .-628 ; 0xec8 <uart_putchar> |
113c: 8e e2 ldi r24, 0x2E ; 46 |
113e: c4 de rcall .-632 ; 0xec8 <uart_putchar> |
1140: 80 91 b2 00 lds r24, 0x00B2 |
1144: 8a 5d subi r24, 0xDA ; 218 |
1146: c0 de rcall .-640 ; 0xec8 <uart_putchar> |
uart_putchar ('\n');uart_putchar ('A');uart_putchar ('D');uart_putchar ('R'); uart_putchar (':'); uart_putchar (0x30 + MotorAdresse); |
1148: 8a e0 ldi r24, 0x0A ; 10 |
114a: be de rcall .-644 ; 0xec8 <uart_putchar> |
114c: 81 e4 ldi r24, 0x41 ; 65 |
114e: bc de rcall .-648 ; 0xec8 <uart_putchar> |
1150: 84 e4 ldi r24, 0x44 ; 68 |
1152: ba de rcall .-652 ; 0xec8 <uart_putchar> |
1154: 82 e5 ldi r24, 0x52 ; 82 |
1156: b8 de rcall .-656 ; 0xec8 <uart_putchar> |
1158: 8a e3 ldi r24, 0x3A ; 58 |
115a: b6 de rcall .-660 ; 0xec8 <uart_putchar> |
115c: 80 91 66 00 lds r24, 0x0066 |
1160: 80 5d subi r24, 0xD0 ; 208 |
1162: b2 de rcall .-668 ; 0xec8 <uart_putchar> |
|
} |
1164: 08 95 ret |
|
00001166 <__vector_9>: |
T0_RISING_EDGE = 7 |
}; |
|
|
SIGNAL(SIG_OVERFLOW0) |
{ |
1166: 1f 92 push r1 |
1168: 0f 92 push r0 |
116a: 0f b6 in r0, 0x3f ; 63 |
116c: 0f 92 push r0 |
116e: 11 24 eor r1, r1 |
1170: 8f 93 push r24 |
1172: 9f 93 push r25 |
static unsigned char cnt; |
Timer0Overflow++; |
1174: 80 91 94 03 lds r24, 0x0394 |
1178: 8f 5f subi r24, 0xFF ; 255 |
117a: 80 93 94 03 sts 0x0394, r24 |
if(!cnt--) |
117e: 80 91 a4 00 lds r24, 0x00A4 |
1182: 81 50 subi r24, 0x01 ; 1 |
1184: 80 93 a4 00 sts 0x00A4, r24 |
1188: 8f 5f subi r24, 0xFF ; 255 |
118a: 71 f5 brne .+92 ; 0x11e8 <__vector_9+0x82> |
{ |
cnt = 3; |
118c: 83 e0 ldi r24, 0x03 ; 3 |
118e: 80 93 a4 00 sts 0x00A4, r24 |
CountMilliseconds += 1; |
1192: 80 91 a2 00 lds r24, 0x00A2 |
1196: 90 91 a3 00 lds r25, 0x00A3 |
119a: 01 96 adiw r24, 0x01 ; 1 |
119c: 90 93 a3 00 sts 0x00A3, r25 |
11a0: 80 93 a2 00 sts 0x00A2, r24 |
if(I2C_Timeout) I2C_Timeout--; |
11a4: 80 91 80 00 lds r24, 0x0080 |
11a8: 90 91 81 00 lds r25, 0x0081 |
11ac: 00 97 sbiw r24, 0x00 ; 0 |
11ae: 29 f0 breq .+10 ; 0x11ba <__vector_9+0x54> |
11b0: 01 97 sbiw r24, 0x01 ; 1 |
11b2: 90 93 81 00 sts 0x0081, r25 |
11b6: 80 93 80 00 sts 0x0080, r24 |
if(PPM_Timeout) PPM_Timeout--; else anz_ppm_werte = 0; |
11ba: 80 91 a8 00 lds r24, 0x00A8 |
11be: 88 23 and r24, r24 |
11c0: 31 f0 breq .+12 ; 0x11ce <__vector_9+0x68> |
11c2: 80 91 a8 00 lds r24, 0x00A8 |
11c6: 81 50 subi r24, 0x01 ; 1 |
11c8: 80 93 a8 00 sts 0x00A8, r24 |
11cc: 02 c0 rjmp .+4 ; 0x11d2 <__vector_9+0x6c> |
11ce: 10 92 a9 00 sts 0x00A9, r1 |
if(SIO_Timeout) SIO_Timeout--; |
11d2: 80 91 82 00 lds r24, 0x0082 |
11d6: 90 91 83 00 lds r25, 0x0083 |
11da: 00 97 sbiw r24, 0x00 ; 0 |
11dc: 29 f0 breq .+10 ; 0x11e8 <__vector_9+0x82> |
11de: 01 97 sbiw r24, 0x01 ; 1 |
11e0: 90 93 83 00 sts 0x0083, r25 |
11e4: 80 93 82 00 sts 0x0082, r24 |
} |
} |
11e8: 9f 91 pop r25 |
11ea: 8f 91 pop r24 |
11ec: 0f 90 pop r0 |
11ee: 0f be out 0x3f, r0 ; 63 |
11f0: 0f 90 pop r0 |
11f2: 1f 90 pop r1 |
11f4: 18 95 reti |
|
000011f6 <Timer0_Init>: |
|
|
void Timer0_Init(void) |
{ |
TCCR0 = TIMER_TEILER; |
11f6: 82 e0 ldi r24, 0x02 ; 2 |
11f8: 83 bf out 0x33, r24 ; 51 |
// TCNT0 = -TIMER_RELOAD_VALUE; // reload |
TIM0_START; |
11fa: 89 b7 in r24, 0x39 ; 57 |
11fc: 81 60 ori r24, 0x01 ; 1 |
11fe: 89 bf out 0x39, r24 ; 57 |
TIMER2_INT_ENABLE; |
1200: 89 b7 in r24, 0x39 ; 57 |
1202: 80 64 ori r24, 0x40 ; 64 |
1204: 89 bf out 0x39, r24 ; 57 |
} |
1206: 08 95 ret |
|
00001208 <SetDelay>: |
|
|
unsigned int SetDelay(unsigned int t) |
{ |
return(CountMilliseconds + t - 1); |
1208: 20 91 a2 00 lds r18, 0x00A2 |
120c: 30 91 a3 00 lds r19, 0x00A3 |
1210: 21 50 subi r18, 0x01 ; 1 |
1212: 30 40 sbci r19, 0x00 ; 0 |
1214: 28 0f add r18, r24 |
1216: 39 1f adc r19, r25 |
} |
1218: c9 01 movw r24, r18 |
121a: 08 95 ret |
|
0000121c <CheckDelay>: |
|
char CheckDelay (unsigned int t) |
{ |
return(((t - CountMilliseconds) & 0x8000) >> 8); |
121c: 20 91 a2 00 lds r18, 0x00A2 |
1220: 30 91 a3 00 lds r19, 0x00A3 |
1224: 82 1b sub r24, r18 |
1226: 93 0b sbc r25, r19 |
1228: 80 70 andi r24, 0x00 ; 0 |
122a: 90 78 andi r25, 0x80 ; 128 |
} |
122c: 89 2f mov r24, r25 |
122e: 08 95 ret |
|
00001230 <Delay_ms>: |
} |
|
|
unsigned int SetDelay(unsigned int t) |
{ |
return(CountMilliseconds + t - 1); |
1230: 20 91 a2 00 lds r18, 0x00A2 |
1234: 30 91 a3 00 lds r19, 0x00A3 |
1238: 21 50 subi r18, 0x01 ; 1 |
123a: 30 40 sbci r19, 0x00 ; 0 |
123c: 28 0f add r18, r24 |
123e: 39 1f adc r19, r25 |
} |
|
char CheckDelay (unsigned int t) |
{ |
return(((t - CountMilliseconds) & 0x8000) >> 8); |
1240: 80 91 a2 00 lds r24, 0x00A2 |
1244: 90 91 a3 00 lds r25, 0x00A3 |
|
void Delay_ms(unsigned int w) |
{ |
unsigned int akt; |
akt = SetDelay(w); |
while (!CheckDelay(akt)); |
1248: a9 01 movw r20, r18 |
124a: 48 1b sub r20, r24 |
124c: 59 0b sbc r21, r25 |
124e: ca 01 movw r24, r20 |
1250: 80 70 andi r24, 0x00 ; 0 |
1252: 90 78 andi r25, 0x80 ; 128 |
1254: 99 23 and r25, r25 |
1256: a1 f3 breq .-24 ; 0x1240 <Delay_ms+0x10> |
} |
1258: 08 95 ret |
|
0000125a <ADC_Init>: |
//############################################################################ |
//Init ADC |
void ADC_Init(void) |
//############################################################################ |
{ |
ADCSRA = 0xA6; // Free Run & 1MHZ |
125a: 86 ea ldi r24, 0xA6 ; 166 |
125c: 86 b9 out 0x06, r24 ; 6 |
ADMUX = 7 | IntRef; // Kanal 7 |
125e: 80 91 8d 00 lds r24, 0x008D |
1262: 87 60 ori r24, 0x07 ; 7 |
1264: 87 b9 out 0x07, r24 ; 7 |
ADCSRA |= 0x40; // Start |
1266: 36 9a sbi 0x06, 6 ; 6 |
} |
1268: 08 95 ret |
|
0000126a <AdConvert>: |
void AdConvert(void) |
//############################################################################ |
{ |
unsigned int i=0; |
unsigned char sense; |
sense = ADMUX; // Sense-Kanal merken |
126a: 27 b1 in r18, 0x07 ; 7 |
ADMUX = 0x06 | IntRef; // Kanal 6 |
126c: 90 91 8d 00 lds r25, 0x008D |
1270: 96 60 ori r25, 0x06 ; 6 |
1272: 97 b9 out 0x07, r25 ; 7 |
SFIOR = 0x00; // Analog Comperator aus |
1274: 10 be out 0x30, r1 ; 48 |
ADCSRA = 0xD3; // Converter ein, single |
1276: 83 ed ldi r24, 0xD3 ; 211 |
1278: 86 b9 out 0x06, r24 ; 6 |
ADCSRA |= 0x10; // Ready löschen |
127a: 34 9a sbi 0x06, 4 ; 6 |
ADMUX = 0x06 | IntRef; // Kanal 6 |
127c: 97 b9 out 0x07, r25 ; 7 |
ADCSRA |= 0x40; // Start |
127e: 36 9a sbi 0x06, 6 ; 6 |
while (((ADCSRA & 0x10) == 0)); |
1280: 34 9b sbis 0x06, 4 ; 6 |
1282: fe cf rjmp .-4 ; 0x1280 <AdConvert+0x16> |
ADMUX = sense; // zurück auf den Sense-Kanal |
1284: 27 b9 out 0x07, r18 ; 7 |
i = ADCW * 4; |
1286: 84 b1 in r24, 0x04 ; 4 |
1288: 95 b1 in r25, 0x05 ; 5 |
// if(i > 300) i = 300; |
Strom = (i + Strom * 7) / 8; |
128a: 20 91 7a 00 lds r18, 0x007A |
128e: 30 91 7b 00 lds r19, 0x007B |
1292: a9 01 movw r20, r18 |
1294: 63 e0 ldi r22, 0x03 ; 3 |
1296: 44 0f add r20, r20 |
1298: 55 1f adc r21, r21 |
129a: 6a 95 dec r22 |
129c: e1 f7 brne .-8 ; 0x1296 <AdConvert+0x2c> |
129e: 42 1b sub r20, r18 |
12a0: 53 0b sbc r21, r19 |
12a2: 88 0f add r24, r24 |
12a4: 99 1f adc r25, r25 |
12a6: 88 0f add r24, r24 |
12a8: 99 1f adc r25, r25 |
12aa: 48 0f add r20, r24 |
12ac: 59 1f adc r21, r25 |
12ae: 83 e0 ldi r24, 0x03 ; 3 |
12b0: 56 95 lsr r21 |
12b2: 47 95 ror r20 |
12b4: 8a 95 dec r24 |
12b6: e1 f7 brne .-8 ; 0x12b0 <AdConvert+0x46> |
12b8: 50 93 7b 00 sts 0x007B, r21 |
12bc: 40 93 7a 00 sts 0x007A, r20 |
if (Strom_max < Strom) Strom_max = Strom; |
12c0: 80 91 7c 00 lds r24, 0x007C |
12c4: 90 e0 ldi r25, 0x00 ; 0 |
12c6: 84 17 cp r24, r20 |
12c8: 95 07 cpc r25, r21 |
12ca: 10 f4 brcc .+4 ; 0x12d0 <AdConvert+0x66> |
12cc: 40 93 7c 00 sts 0x007C, r20 |
ADCSRA = 0x00; |
12d0: 16 b8 out 0x06, r1 ; 6 |
SFIOR = 0x08; // Analog Comperator ein |
12d2: 88 e0 ldi r24, 0x08 ; 8 |
12d4: 80 bf out 0x30, r24 ; 48 |
} |
12d6: 08 95 ret |
|
000012d8 <MessAD>: |
//Strom Analogwerte lesen |
unsigned int MessAD(unsigned char channel) |
//############################################################################ |
{ |
unsigned char sense; |
sense = ADMUX; // Sense-Kanal merken |
12d8: 27 b1 in r18, 0x07 ; 7 |
channel |= IntRef; |
12da: 90 91 8d 00 lds r25, 0x008D |
12de: 98 2b or r25, r24 |
ADMUX = channel; // Kanal 6 |
12e0: 97 b9 out 0x07, r25 ; 7 |
SFIOR = 0x00; // Analog Comperator aus |
12e2: 10 be out 0x30, r1 ; 48 |
ADCSRA = 0xD3; // Converter ein, single |
12e4: 83 ed ldi r24, 0xD3 ; 211 |
12e6: 86 b9 out 0x06, r24 ; 6 |
ADCSRA |= 0x10; // Ready löschen |
12e8: 34 9a sbi 0x06, 4 ; 6 |
ADMUX = channel; // Kanal 6 |
12ea: 97 b9 out 0x07, r25 ; 7 |
ADCSRA |= 0x40; // Start |
12ec: 36 9a sbi 0x06, 6 ; 6 |
while (((ADCSRA & 0x10) == 0)); |
12ee: 34 9b sbis 0x06, 4 ; 6 |
12f0: fe cf rjmp .-4 ; 0x12ee <MessAD+0x16> |
ADMUX = sense; // zurück auf den Sense-Kanal |
12f2: 27 b9 out 0x07, r18 ; 7 |
ADCSRA = 0x00; |
12f4: 16 b8 out 0x06, r1 ; 6 |
SFIOR = 0x08; // Analog Comperator ein |
12f6: 88 e0 ldi r24, 0x08 ; 8 |
12f8: 80 bf out 0x30, r24 ; 48 |
return(ADCW); |
12fa: 24 b1 in r18, 0x04 ; 4 |
12fc: 35 b1 in r19, 0x05 ; 5 |
} |
12fe: c9 01 movw r24, r18 |
1300: 08 95 ret |
|
00001302 <FastADConvert>: |
//Strom Analogwerte lesen |
void FastADConvert(void) |
//############################################################################ |
{ |
unsigned int i=0; |
i = MessAD(6) * 4; |
1302: 86 e0 ldi r24, 0x06 ; 6 |
1304: e9 df rcall .-46 ; 0x12d8 <MessAD> |
1306: 9c 01 movw r18, r24 |
1308: 22 0f add r18, r18 |
130a: 33 1f adc r19, r19 |
130c: 22 0f add r18, r18 |
130e: 33 1f adc r19, r19 |
1310: 29 3c cpi r18, 0xC9 ; 201 |
1312: 31 05 cpc r19, r1 |
1314: 10 f0 brcs .+4 ; 0x131a <FastADConvert+0x18> |
1316: 28 ec ldi r18, 0xC8 ; 200 |
1318: 30 e0 ldi r19, 0x00 ; 0 |
// i = ADCW * 4; |
if(i > 200) i = 200; |
Strom = i;//(i + Strom * 1) / 2; |
131a: 30 93 7b 00 sts 0x007B, r19 |
131e: 20 93 7a 00 sts 0x007A, r18 |
if (Strom_max < Strom) Strom_max = Strom; |
1322: 80 91 7c 00 lds r24, 0x007C |
1326: 90 e0 ldi r25, 0x00 ; 0 |
1328: 82 17 cp r24, r18 |
132a: 93 07 cpc r25, r19 |
132c: 10 f4 brcc .+4 ; 0x1332 <FastADConvert+0x30> |
132e: 20 93 7c 00 sts 0x007C, r18 |
ADCSRA = 0x00; |
1332: 16 b8 out 0x06, r1 ; 6 |
SFIOR = 0x08; // Analog Comperator ein |
1334: 88 e0 ldi r24, 0x08 ; 8 |
1336: 80 bf out 0x30, r24 ; 48 |
} |
1338: 08 95 ret |
|
0000133a <InitPPM>: |
//############################################################################ |
// |
void InitPPM(void) |
//############################################################################ |
{ |
TCCR1B |= (1<<ICES1)|(1<<ICNC1); |
133a: 8e b5 in r24, 0x2e ; 46 |
133c: 80 6c ori r24, 0xC0 ; 192 |
133e: 8e bd out 0x2e, r24 ; 46 |
ICP_POS_FLANKE; |
1340: 8e b5 in r24, 0x2e ; 46 |
1342: 80 64 ori r24, 0x40 ; 64 |
1344: 8e bd out 0x2e, r24 ; 46 |
ICP_INT_ENABLE; |
1346: 89 b7 in r24, 0x39 ; 57 |
1348: 80 62 ori r24, 0x20 ; 32 |
134a: 89 bf out 0x39, r24 ; 57 |
TIMER1_INT_ENABLE; |
134c: 89 b7 in r24, 0x39 ; 57 |
134e: 84 60 ori r24, 0x04 ; 4 |
1350: 89 bf out 0x39, r24 ; 57 |
} |
1352: 08 95 ret |
|
00001354 <__vector_8>: |
|
//############################################################################ |
// |
SIGNAL(SIG_OVERFLOW1) |
//############################################################################ |
{ |
1354: 1f 92 push r1 |
1356: 0f 92 push r0 |
1358: 0f b6 in r0, 0x3f ; 63 |
135a: 0f 92 push r0 |
135c: 11 24 eor r1, r1 |
135e: 8f 93 push r24 |
Timer1Overflow++; |
1360: 80 91 a7 00 lds r24, 0x00A7 |
1364: 8f 5f subi r24, 0xFF ; 255 |
1366: 80 93 a7 00 sts 0x00A7, r24 |
} |
136a: 8f 91 pop r24 |
136c: 0f 90 pop r0 |
136e: 0f be out 0x3f, r0 ; 63 |
1370: 0f 90 pop r0 |
1372: 1f 90 pop r1 |
1374: 18 95 reti |
|
00001376 <__vector_5>: |
|
//############################################################################ |
// |
SIGNAL(SIG_INPUT_CAPTURE1) |
//############################################################################ |
{ |
1376: 1f 92 push r1 |
1378: 0f 92 push r0 |
137a: 0f b6 in r0, 0x3f ; 63 |
137c: 0f 92 push r0 |
137e: 11 24 eor r1, r1 |
1380: 2f 93 push r18 |
1382: 3f 93 push r19 |
1384: 4f 93 push r20 |
1386: 5f 93 push r21 |
1388: 8f 93 push r24 |
138a: 9f 93 push r25 |
static unsigned int tim_alt; |
static unsigned int ppm; |
if(TCCR1B & (1<<ICES1)) // Positive Flanke |
138c: 0e b4 in r0, 0x2e ; 46 |
138e: 06 fe sbrs r0, 6 |
1390: 0f c0 rjmp .+30 ; 0x13b0 <__vector_5+0x3a> |
{ |
Timer1Overflow = 0; |
1392: 10 92 a7 00 sts 0x00A7, r1 |
tim_alt = ICR1; |
1396: 86 b5 in r24, 0x26 ; 38 |
1398: 97 b5 in r25, 0x27 ; 39 |
139a: 90 93 ad 00 sts 0x00AD, r25 |
139e: 80 93 ac 00 sts 0x00AC, r24 |
ICP_NEG_FLANKE; |
13a2: 8e b5 in r24, 0x2e ; 46 |
13a4: 8f 7b andi r24, 0xBF ; 191 |
13a6: 8e bd out 0x2e, r24 ; 46 |
PPM_Timeout = 100; |
13a8: 84 e6 ldi r24, 0x64 ; 100 |
13aa: 80 93 a8 00 sts 0x00A8, r24 |
13ae: 6f c0 rjmp .+222 ; 0x148e <__vector_5+0x118> |
} |
else // Negative Flanke |
{ |
ICP_POS_FLANKE; |
13b0: 8e b5 in r24, 0x2e ; 46 |
13b2: 80 64 ori r24, 0x40 ; 64 |
13b4: 8e bd out 0x2e, r24 ; 46 |
#ifdef _32KHZ |
ppm = (ICR1 - tim_alt + (int) Timer1Overflow * 256) / 32; |
#endif |
#ifdef _16KHZ |
ppm = (ICR1 - tim_alt + (int) Timer1Overflow * 512) / 32; |
13b6: 26 b5 in r18, 0x26 ; 38 |
13b8: 37 b5 in r19, 0x27 ; 39 |
13ba: 40 91 a7 00 lds r20, 0x00A7 |
13be: 80 91 ac 00 lds r24, 0x00AC |
13c2: 90 91 ad 00 lds r25, 0x00AD |
13c6: 28 1b sub r18, r24 |
13c8: 39 0b sbc r19, r25 |
13ca: 94 2f mov r25, r20 |
13cc: 99 0f add r25, r25 |
13ce: 80 e0 ldi r24, 0x00 ; 0 |
13d0: 28 0f add r18, r24 |
13d2: 39 1f adc r19, r25 |
13d4: 85 e0 ldi r24, 0x05 ; 5 |
13d6: 36 95 lsr r19 |
13d8: 27 95 ror r18 |
13da: 8a 95 dec r24 |
13dc: e1 f7 brne .-8 ; 0x13d6 <__vector_5+0x60> |
13de: 30 93 ab 00 sts 0x00AB, r19 |
13e2: 20 93 aa 00 sts 0x00AA, r18 |
#endif |
if(ppm < 280) ppm = 280; |
13e6: 28 51 subi r18, 0x18 ; 24 |
13e8: 31 40 sbci r19, 0x01 ; 1 |
13ea: 30 f4 brcc .+12 ; 0x13f8 <__vector_5+0x82> |
13ec: 88 e1 ldi r24, 0x18 ; 24 |
13ee: 91 e0 ldi r25, 0x01 ; 1 |
13f0: 90 93 ab 00 sts 0x00AB, r25 |
13f4: 80 93 aa 00 sts 0x00AA, r24 |
ppm -= 280; |
13f8: 40 91 aa 00 lds r20, 0x00AA |
13fc: 50 91 ab 00 lds r21, 0x00AB |
1400: 48 51 subi r20, 0x18 ; 24 |
1402: 51 40 sbci r21, 0x01 ; 1 |
if(PPM_Signal < ppm) PPM_Signal++; |
1404: 80 91 a5 00 lds r24, 0x00A5 |
1408: 90 91 a6 00 lds r25, 0x00A6 |
140c: 84 17 cp r24, r20 |
140e: 95 07 cpc r25, r21 |
1410: 30 f4 brcc .+12 ; 0x141e <__vector_5+0xa8> |
1412: 80 91 a5 00 lds r24, 0x00A5 |
1416: 90 91 a6 00 lds r25, 0x00A6 |
141a: 01 96 adiw r24, 0x01 ; 1 |
141c: 0c c0 rjmp .+24 ; 0x1436 <__vector_5+0xc0> |
else if(PPM_Signal > ppm) PPM_Signal--; |
141e: 80 91 a5 00 lds r24, 0x00A5 |
1422: 90 91 a6 00 lds r25, 0x00A6 |
1426: 48 17 cp r20, r24 |
1428: 59 07 cpc r21, r25 |
142a: 48 f4 brcc .+18 ; 0x143e <__vector_5+0xc8> |
142c: 80 91 a5 00 lds r24, 0x00A5 |
1430: 90 91 a6 00 lds r25, 0x00A6 |
1434: 01 97 sbiw r24, 0x01 ; 1 |
1436: 90 93 a6 00 sts 0x00A6, r25 |
143a: 80 93 a5 00 sts 0x00A5, r24 |
if(FILTER_PPM) ppm = (PPM_Signal * FILTER_PPM + ppm) / (FILTER_PPM + 1); // Filtern |
143e: 80 91 a5 00 lds r24, 0x00A5 |
1442: 90 91 a6 00 lds r25, 0x00A6 |
1446: 9c 01 movw r18, r24 |
1448: 22 0f add r18, r18 |
144a: 33 1f adc r19, r19 |
144c: 22 0f add r18, r18 |
144e: 33 1f adc r19, r19 |
1450: 22 0f add r18, r18 |
1452: 33 1f adc r19, r19 |
1454: 28 1b sub r18, r24 |
1456: 39 0b sbc r19, r25 |
1458: 24 0f add r18, r20 |
145a: 35 1f adc r19, r21 |
145c: 83 e0 ldi r24, 0x03 ; 3 |
145e: 36 95 lsr r19 |
1460: 27 95 ror r18 |
1462: 8a 95 dec r24 |
1464: e1 f7 brne .-8 ; 0x145e <__vector_5+0xe8> |
1466: 30 93 ab 00 sts 0x00AB, r19 |
146a: 20 93 aa 00 sts 0x00AA, r18 |
PPM_Signal = ppm; |
146e: 30 93 a6 00 sts 0x00A6, r19 |
1472: 20 93 a5 00 sts 0x00A5, r18 |
if(anz_ppm_werte < 255) anz_ppm_werte++; |
1476: 80 91 a9 00 lds r24, 0x00A9 |
147a: 8f 3f cpi r24, 0xFF ; 255 |
147c: 29 f0 breq .+10 ; 0x1488 <__vector_5+0x112> |
147e: 80 91 a9 00 lds r24, 0x00A9 |
1482: 8f 5f subi r24, 0xFF ; 255 |
1484: 80 93 a9 00 sts 0x00A9, r24 |
ZeitZumAdWandeln = 1; |
1488: 81 e0 ldi r24, 0x01 ; 1 |
148a: 80 93 65 00 sts 0x0065, r24 |
} |
} |
148e: 9f 91 pop r25 |
1490: 8f 91 pop r24 |
1492: 5f 91 pop r21 |
1494: 4f 91 pop r20 |
1496: 3f 91 pop r19 |
1498: 2f 91 pop r18 |
149a: 0f 90 pop r0 |
149c: 0f be out 0x3f, r0 ; 63 |
149e: 0f 90 pop r0 |
14a0: 1f 90 pop r1 |
14a2: 18 95 reti |
|
000014a4 <__vector_1>: |
|
//############################################################################ |
// |
SIGNAL(SIG_INTERRUPT0) |
//############################################################################ |
{ |
14a4: 1f 92 push r1 |
14a6: 0f 92 push r0 |
14a8: 0f b6 in r0, 0x3f ; 63 |
14aa: 0f 92 push r0 |
14ac: 11 24 eor r1, r1 |
14ae: 8f 93 push r24 |
CLR_INT0_FLAG; // IntFlag Loeschen |
14b0: 8a b7 in r24, 0x3a ; 58 |
14b2: 8f 7b andi r24, 0xBF ; 191 |
14b4: 8a bf out 0x3a, r24 ; 58 |
} |
14b6: 8f 91 pop r24 |
14b8: 0f 90 pop r0 |
14ba: 0f be out 0x3f, r0 ; 63 |
14bc: 0f 90 pop r0 |
14be: 1f 90 pop r1 |
14c0: 18 95 reti |
|
000014c2 <InitIC2_Slave>: |
//############################################################################ |
//I2C (TWI) Interface Init |
void InitIC2_Slave(uint8_t adr) |
//############################################################################ |
{ |
TWAR = adr + (2*MotorAdresse); // Eigene Adresse setzen |
14c2: 90 91 66 00 lds r25, 0x0066 |
14c6: 99 0f add r25, r25 |
14c8: 98 0f add r25, r24 |
14ca: 92 b9 out 0x02, r25 ; 2 |
TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWIE) | (1<<TWEA); |
14cc: 85 ec ldi r24, 0xC5 ; 197 |
14ce: 86 bf out 0x36, r24 ; 54 |
} |
14d0: 08 95 ret |
|
000014d2 <__vector_17>: |
//############################################################################ |
//ISR, die bei einem Ereignis auf dem Bus ausgelöst wird. Im Register TWSR befindet |
//sich dann ein Statuscode, anhand dessen die Situation festgestellt werden kann. |
ISR (TWI_vect) |
//############################################################################ |
{ |
14d2: 1f 92 push r1 |
14d4: 0f 92 push r0 |
14d6: 0f b6 in r0, 0x3f ; 63 |
14d8: 0f 92 push r0 |
14da: 11 24 eor r1, r1 |
14dc: 8f 93 push r24 |
14de: 9f 93 push r25 |
switch (TWSR & 0xF8) |
14e0: 81 b1 in r24, 0x01 ; 1 |
14e2: 90 e0 ldi r25, 0x00 ; 0 |
14e4: 88 7f andi r24, 0xF8 ; 248 |
14e6: 90 70 andi r25, 0x00 ; 0 |
14e8: 80 38 cpi r24, 0x80 ; 128 |
14ea: 91 05 cpc r25, r1 |
14ec: c9 f0 breq .+50 ; 0x1520 <__vector_17+0x4e> |
14ee: 81 38 cpi r24, 0x81 ; 129 |
14f0: 91 05 cpc r25, r1 |
14f2: 34 f4 brge .+12 ; 0x1500 <__vector_17+0x2e> |
14f4: 00 97 sbiw r24, 0x00 ; 0 |
14f6: 91 f1 breq .+100 ; 0x155c <__vector_17+0x8a> |
14f8: 80 36 cpi r24, 0x60 ; 96 |
14fa: 91 05 cpc r25, r1 |
14fc: 91 f5 brne .+100 ; 0x1562 <__vector_17+0x90> |
14fe: 0a c0 rjmp .+20 ; 0x1514 <__vector_17+0x42> |
1500: 88 3b cpi r24, 0xB8 ; 184 |
1502: 91 05 cpc r25, r1 |
1504: b9 f0 breq .+46 ; 0x1534 <__vector_17+0x62> |
1506: 88 3f cpi r24, 0xF8 ; 248 |
1508: 91 05 cpc r25, r1 |
150a: 29 f1 breq .+74 ; 0x1556 <__vector_17+0x84> |
150c: 88 3a cpi r24, 0xA8 ; 168 |
150e: 91 05 cpc r25, r1 |
1510: 41 f5 brne .+80 ; 0x1562 <__vector_17+0x90> |
1512: 10 c0 rjmp .+32 ; 0x1534 <__vector_17+0x62> |
{ |
case SR_SLA_ACK: |
TWCR |= (1<<TWINT); |
1514: 86 b7 in r24, 0x36 ; 54 |
1516: 80 68 ori r24, 0x80 ; 128 |
1518: 86 bf out 0x36, r24 ; 54 |
Byte_Counter=0; |
151a: 10 92 ae 00 sts 0x00AE, r1 |
151e: 23 c0 rjmp .+70 ; 0x1566 <__vector_17+0x94> |
return; |
// Daten Empfangen |
case SR_PREV_ACK: |
I2C_RXBuffer = TWDR; |
1520: 83 b1 in r24, 0x03 ; 3 |
1522: 80 93 95 03 sts 0x0395, r24 |
I2C_Timeout = 500; |
1526: 84 ef ldi r24, 0xF4 ; 244 |
1528: 91 e0 ldi r25, 0x01 ; 1 |
152a: 90 93 81 00 sts 0x0081, r25 |
152e: 80 93 80 00 sts 0x0080, r24 |
1532: 0e c0 rjmp .+28 ; 0x1550 <__vector_17+0x7e> |
} |
TWCR |= (1<<TWINT); |
return; |
// Daten Senden |
case SW_DATA_ACK: |
if (Byte_Counter==0) |
1534: 80 91 ae 00 lds r24, 0x00AE |
1538: 88 23 and r24, r24 |
153a: 39 f4 brne .+14 ; 0x154a <__vector_17+0x78> |
{ |
TWDR = Mittelstrom; |
153c: 80 91 7d 00 lds r24, 0x007D |
1540: 83 b9 out 0x03, r24 ; 3 |
Byte_Counter++; |
1542: 81 e0 ldi r24, 0x01 ; 1 |
1544: 80 93 ae 00 sts 0x00AE, r24 |
1548: 03 c0 rjmp .+6 ; 0x1550 <__vector_17+0x7e> |
} |
else |
{ |
TWDR = MaxPWM; |
154a: 80 91 64 00 lds r24, 0x0064 |
154e: 83 b9 out 0x03, r24 ; 3 |
} |
TWCR |= (1<<TWINT); |
1550: 86 b7 in r24, 0x36 ; 54 |
1552: 80 68 ori r24, 0x80 ; 128 |
1554: 07 c0 rjmp .+14 ; 0x1564 <__vector_17+0x92> |
return; |
// Bus-Fehler zurücksetzen |
case TWI_BUS_ERR_2: |
TWCR |=(1<<TWSTO) | (1<<TWINT); |
1556: 86 b7 in r24, 0x36 ; 54 |
1558: 80 69 ori r24, 0x90 ; 144 |
155a: 86 bf out 0x36, r24 ; 54 |
// Bus-Fehler zurücksetzen |
case TWI_BUS_ERR_1: |
TWCR |=(1<<TWSTO) | (1<<TWINT); |
155c: 86 b7 in r24, 0x36 ; 54 |
155e: 80 69 ori r24, 0x90 ; 144 |
1560: 86 bf out 0x36, r24 ; 54 |
} |
TWCR =(1<<TWEA) | (1<<TWINT) | (1<<TWEN) | (1<<TWIE); // TWI Reset |
1562: 85 ec ldi r24, 0xC5 ; 197 |
1564: 86 bf out 0x36, r24 ; 54 |
} |
1566: 9f 91 pop r25 |
1568: 8f 91 pop r24 |
156a: 0f 90 pop r0 |
156c: 0f be out 0x3f, r0 ; 63 |
156e: 0f 90 pop r0 |
1570: 1f 90 pop r1 |
1572: 18 95 reti |
|
00001574 <__vector_4>: |
|
//############################################################################ |
// |
SIGNAL(SIG_OVERFLOW2) |
//############################################################################ |
{ |
1574: 1f 92 push r1 |
1576: 0f 92 push r0 |
1578: 0f b6 in r0, 0x3f ; 63 |
157a: 0f 92 push r0 |
157c: 11 24 eor r1, r1 |
} |
157e: 0f 90 pop r0 |
1580: 0f be out 0x3f, r0 ; 63 |
1582: 0f 90 pop r0 |
1584: 1f 90 pop r1 |
1586: 18 95 reti |
|
00001588 <Manuell>: |
//############################################################################ |
// |
void Manuell(void) |
//############################################################################ |
{ |
switch(Phase) |
1588: 80 91 af 00 lds r24, 0x00AF |
158c: 82 30 cpi r24, 0x02 ; 2 |
158e: 69 f1 breq .+90 ; 0x15ea <Manuell+0x62> |
1590: 83 30 cpi r24, 0x03 ; 3 |
1592: 30 f4 brcc .+12 ; 0x15a0 <Manuell+0x18> |
1594: 88 23 and r24, r24 |
1596: 69 f0 breq .+26 ; 0x15b2 <Manuell+0x2a> |
1598: 81 30 cpi r24, 0x01 ; 1 |
159a: 09 f0 breq .+2 ; 0x159e <Manuell+0x16> |
159c: 63 c0 rjmp .+198 ; 0x1664 <Manuell+0xdc> |
159e: 17 c0 rjmp .+46 ; 0x15ce <Manuell+0x46> |
15a0: 84 30 cpi r24, 0x04 ; 4 |
15a2: 09 f4 brne .+2 ; 0x15a6 <Manuell+0x1e> |
15a4: 3f c0 rjmp .+126 ; 0x1624 <Manuell+0x9c> |
15a6: 84 30 cpi r24, 0x04 ; 4 |
15a8: 68 f1 brcs .+90 ; 0x1604 <Manuell+0x7c> |
15aa: 85 30 cpi r24, 0x05 ; 5 |
15ac: 09 f0 breq .+2 ; 0x15b0 <Manuell+0x28> |
15ae: 5a c0 rjmp .+180 ; 0x1664 <Manuell+0xdc> |
15b0: 4b c0 rjmp .+150 ; 0x1648 <Manuell+0xc0> |
{ |
case 0: |
STEUER_A_H; |
15b2: 81 ea ldi r24, 0xA1 ; 161 |
15b4: 8f bd out 0x2f, r24 ; 47 |
15b6: 81 e6 ldi r24, 0x61 ; 97 |
15b8: 85 bd out 0x25, r24 ; 37 |
15ba: 88 e0 ldi r24, 0x08 ; 8 |
15bc: 87 bb out 0x17, r24 ; 23 |
STEUER_B_L; |
15be: 82 b3 in r24, 0x12 ; 18 |
15c0: 87 7d andi r24, 0xD7 ; 215 |
15c2: 82 bb out 0x12, r24 ; 18 |
15c4: 94 9a sbi 0x12, 4 ; 18 |
SENSE_C; |
15c6: 80 91 8d 00 lds r24, 0x008D |
15ca: 82 60 ori r24, 0x02 ; 2 |
15cc: 38 c0 rjmp .+112 ; 0x163e <Manuell+0xb6> |
SENSE_RISING_INT; |
break; |
case 1: |
STEUER_A_H; |
15ce: 81 ea ldi r24, 0xA1 ; 161 |
15d0: 8f bd out 0x2f, r24 ; 47 |
15d2: 81 e6 ldi r24, 0x61 ; 97 |
15d4: 85 bd out 0x25, r24 ; 37 |
15d6: 88 e0 ldi r24, 0x08 ; 8 |
15d8: 87 bb out 0x17, r24 ; 23 |
STEUER_C_L; |
15da: 82 b3 in r24, 0x12 ; 18 |
15dc: 87 7e andi r24, 0xE7 ; 231 |
15de: 82 bb out 0x12, r24 ; 18 |
15e0: 95 9a sbi 0x12, 5 ; 18 |
SENSE_B; |
15e2: 80 91 8d 00 lds r24, 0x008D |
15e6: 81 60 ori r24, 0x01 ; 1 |
15e8: 1a c0 rjmp .+52 ; 0x161e <Manuell+0x96> |
SENSE_FALLING_INT; |
break; |
case 2: |
STEUER_B_H; |
15ea: 81 ea ldi r24, 0xA1 ; 161 |
15ec: 8f bd out 0x2f, r24 ; 47 |
15ee: 81 e6 ldi r24, 0x61 ; 97 |
15f0: 85 bd out 0x25, r24 ; 37 |
15f2: 84 e0 ldi r24, 0x04 ; 4 |
15f4: 87 bb out 0x17, r24 ; 23 |
STEUER_C_L; |
15f6: 82 b3 in r24, 0x12 ; 18 |
15f8: 87 7e andi r24, 0xE7 ; 231 |
15fa: 82 bb out 0x12, r24 ; 18 |
15fc: 95 9a sbi 0x12, 5 ; 18 |
SENSE_A; |
15fe: 80 91 8d 00 lds r24, 0x008D |
1602: 1d c0 rjmp .+58 ; 0x163e <Manuell+0xb6> |
SENSE_RISING_INT; |
break; |
case 3: |
STEUER_B_H; |
1604: 81 ea ldi r24, 0xA1 ; 161 |
1606: 8f bd out 0x2f, r24 ; 47 |
1608: 81 e6 ldi r24, 0x61 ; 97 |
160a: 85 bd out 0x25, r24 ; 37 |
160c: 84 e0 ldi r24, 0x04 ; 4 |
160e: 87 bb out 0x17, r24 ; 23 |
STEUER_A_L; |
1610: 82 b3 in r24, 0x12 ; 18 |
1612: 8f 7c andi r24, 0xCF ; 207 |
1614: 82 bb out 0x12, r24 ; 18 |
1616: 93 9a sbi 0x12, 3 ; 18 |
SENSE_C; |
1618: 80 91 8d 00 lds r24, 0x008D |
161c: 82 60 ori r24, 0x02 ; 2 |
161e: 87 b9 out 0x07, r24 ; 7 |
SENSE_FALLING_INT; |
1620: 40 98 cbi 0x08, 0 ; 8 |
1622: 08 95 ret |
break; |
case 4: |
STEUER_C_H; |
1624: 81 ea ldi r24, 0xA1 ; 161 |
1626: 8f bd out 0x2f, r24 ; 47 |
1628: 81 e6 ldi r24, 0x61 ; 97 |
162a: 85 bd out 0x25, r24 ; 37 |
162c: 82 e0 ldi r24, 0x02 ; 2 |
162e: 87 bb out 0x17, r24 ; 23 |
STEUER_A_L; |
1630: 82 b3 in r24, 0x12 ; 18 |
1632: 8f 7c andi r24, 0xCF ; 207 |
1634: 82 bb out 0x12, r24 ; 18 |
1636: 93 9a sbi 0x12, 3 ; 18 |
SENSE_B; |
1638: 80 91 8d 00 lds r24, 0x008D |
163c: 81 60 ori r24, 0x01 ; 1 |
163e: 87 b9 out 0x07, r24 ; 7 |
SENSE_RISING_INT; |
1640: 88 b1 in r24, 0x08 ; 8 |
1642: 83 60 ori r24, 0x03 ; 3 |
1644: 88 b9 out 0x08, r24 ; 8 |
1646: 08 95 ret |
break; |
case 5: |
STEUER_C_H; |
1648: 81 ea ldi r24, 0xA1 ; 161 |
164a: 8f bd out 0x2f, r24 ; 47 |
164c: 81 e6 ldi r24, 0x61 ; 97 |
164e: 85 bd out 0x25, r24 ; 37 |
1650: 82 e0 ldi r24, 0x02 ; 2 |
1652: 87 bb out 0x17, r24 ; 23 |
STEUER_B_L; |
1654: 82 b3 in r24, 0x12 ; 18 |
1656: 87 7d andi r24, 0xD7 ; 215 |
1658: 82 bb out 0x12, r24 ; 18 |
165a: 94 9a sbi 0x12, 4 ; 18 |
SENSE_A; |
165c: 80 91 8d 00 lds r24, 0x008D |
1660: 87 b9 out 0x07, r24 ; 7 |
SENSE_FALLING_INT; |
1662: 40 98 cbi 0x08, 0 ; 8 |
1664: 08 95 ret |
|
00001666 <__vector_16>: |
// + Interruptroutine |
// + Wird durch den Analogkomperator ausgelöst |
// + Dadurch wird das Kommutieren erzeugt |
SIGNAL(SIG_COMPARATOR) |
//############################################################################ |
{ |
1666: 1f 92 push r1 |
1668: 0f 92 push r0 |
166a: 0f b6 in r0, 0x3f ; 63 |
166c: 0f 92 push r0 |
166e: 11 24 eor r1, r1 |
1670: cf 92 push r12 |
1672: df 92 push r13 |
1674: ef 92 push r14 |
1676: ff 92 push r15 |
1678: 0f 93 push r16 |
167a: 1f 93 push r17 |
167c: 2f 93 push r18 |
167e: 3f 93 push r19 |
1680: 4f 93 push r20 |
1682: 5f 93 push r21 |
1684: 6f 93 push r22 |
1686: 7f 93 push r23 |
1688: 8f 93 push r24 |
168a: 9f 93 push r25 |
168c: af 93 push r26 |
168e: bf 93 push r27 |
1690: ef 93 push r30 |
1692: ff 93 push r31 |
} |
|
|
break; |
case 4: |
STEUER_C_H; |
1694: 61 ea ldi r22, 0xA1 ; 161 |
1696: f6 2e mov r15, r22 |
1698: 01 e6 ldi r16, 0x61 ; 97 |
169a: 52 e0 ldi r21, 0x02 ; 2 |
169c: c5 2e mov r12, r21 |
Phase++; |
CntKommutierungen++; |
} |
else |
{ |
STEUER_B_H; |
169e: 44 e0 ldi r20, 0x04 ; 4 |
16a0: d4 2e mov r13, r20 |
break; |
case 5: |
STEUER_B_L; |
if(!sense) |
{ |
STEUER_A_H; |
16a2: 38 e0 ldi r19, 0x08 ; 8 |
16a4: e3 2e mov r14, r19 |
//############################################################################ |
{ |
unsigned char sense = 0; |
do |
{ |
if(SENSE_H) sense = 1; else sense = 0; |
16a6: 88 b1 in r24, 0x08 ; 8 |
16a8: 90 e0 ldi r25, 0x00 ; 0 |
16aa: 25 e0 ldi r18, 0x05 ; 5 |
16ac: 96 95 lsr r25 |
16ae: 87 95 ror r24 |
16b0: 2a 95 dec r18 |
16b2: e1 f7 brne .-8 ; 0x16ac <__vector_16+0x46> |
16b4: 18 2f mov r17, r24 |
16b6: 11 70 andi r17, 0x01 ; 1 |
switch(Phase) |
16b8: 80 91 af 00 lds r24, 0x00AF |
16bc: 82 30 cpi r24, 0x02 ; 2 |
16be: 09 f4 brne .+2 ; 0x16c2 <__vector_16+0x5c> |
16c0: 50 c0 rjmp .+160 ; 0x1762 <__vector_16+0xfc> |
16c2: 83 30 cpi r24, 0x03 ; 3 |
16c4: 30 f4 brcc .+12 ; 0x16d2 <__vector_16+0x6c> |
16c6: 88 23 and r24, r24 |
16c8: 71 f0 breq .+28 ; 0x16e6 <__vector_16+0x80> |
16ca: 81 30 cpi r24, 0x01 ; 1 |
16cc: 09 f0 breq .+2 ; 0x16d0 <__vector_16+0x6a> |
16ce: a5 c0 rjmp .+330 ; 0x181a <__vector_16+0x1b4> |
16d0: 22 c0 rjmp .+68 ; 0x1716 <__vector_16+0xb0> |
16d2: 84 30 cpi r24, 0x04 ; 4 |
16d4: 09 f4 brne .+2 ; 0x16d8 <__vector_16+0x72> |
16d6: 70 c0 rjmp .+224 ; 0x17b8 <__vector_16+0x152> |
16d8: 84 30 cpi r24, 0x04 ; 4 |
16da: 08 f4 brcc .+2 ; 0x16de <__vector_16+0x78> |
16dc: 58 c0 rjmp .+176 ; 0x178e <__vector_16+0x128> |
16de: 85 30 cpi r24, 0x05 ; 5 |
16e0: 09 f0 breq .+2 ; 0x16e4 <__vector_16+0x7e> |
16e2: 9b c0 rjmp .+310 ; 0x181a <__vector_16+0x1b4> |
16e4: 80 c0 rjmp .+256 ; 0x17e6 <__vector_16+0x180> |
{ |
case 0: |
STEUER_A_H; |
16e6: ff bc out 0x2f, r15 ; 47 |
16e8: 05 bd out 0x25, r16 ; 37 |
16ea: e7 ba out 0x17, r14 ; 23 |
if(sense) |
16ec: 11 23 and r17, r17 |
16ee: 71 f0 breq .+28 ; 0x170c <__vector_16+0xa6> |
{ |
STEUER_C_L; |
16f0: 82 b3 in r24, 0x12 ; 18 |
16f2: 87 7e andi r24, 0xE7 ; 231 |
16f4: 82 bb out 0x12, r24 ; 18 |
16f6: 95 9a sbi 0x12, 5 ; 18 |
if(ZeitZumAdWandeln) AdConvert(); |
16f8: 80 91 65 00 lds r24, 0x0065 |
16fc: 81 11 cpse r24, r1 |
16fe: b5 dd rcall .-1174 ; 0x126a <AdConvert> |
SENSE_FALLING_INT; |
1700: 40 98 cbi 0x08, 0 ; 8 |
SENSE_B; |
1702: 80 91 8d 00 lds r24, 0x008D |
1706: 81 60 ori r24, 0x01 ; 1 |
1708: 87 b9 out 0x07, r24 ; 7 |
170a: 18 c0 rjmp .+48 ; 0x173c <__vector_16+0xd6> |
Phase++; |
CntKommutierungen++; |
} |
else |
{ |
STEUER_B_L; |
170c: 82 b3 in r24, 0x12 ; 18 |
170e: 87 7d andi r24, 0xD7 ; 215 |
1710: 82 bb out 0x12, r24 ; 18 |
1712: 94 9a sbi 0x12, 4 ; 18 |
1714: 82 c0 rjmp .+260 ; 0x181a <__vector_16+0x1b4> |
} |
break; |
case 1: |
STEUER_C_L; |
1716: 82 b3 in r24, 0x12 ; 18 |
1718: 87 7e andi r24, 0xE7 ; 231 |
171a: 82 bb out 0x12, r24 ; 18 |
171c: 95 9a sbi 0x12, 5 ; 18 |
if(!sense) |
171e: 11 23 and r17, r17 |
1720: e1 f4 brne .+56 ; 0x175a <__vector_16+0xf4> |
{ |
STEUER_B_H; |
1722: ff bc out 0x2f, r15 ; 47 |
1724: 05 bd out 0x25, r16 ; 37 |
1726: d7 ba out 0x17, r13 ; 23 |
if(ZeitZumAdWandeln) AdConvert(); |
1728: 80 91 65 00 lds r24, 0x0065 |
172c: 81 11 cpse r24, r1 |
172e: 9d dd rcall .-1222 ; 0x126a <AdConvert> |
SENSE_A; |
1730: 80 91 8d 00 lds r24, 0x008D |
1734: 87 b9 out 0x07, r24 ; 7 |
SENSE_RISING_INT; |
1736: 88 b1 in r24, 0x08 ; 8 |
1738: 83 60 ori r24, 0x03 ; 3 |
173a: 88 b9 out 0x08, r24 ; 8 |
Phase++; |
173c: 80 91 af 00 lds r24, 0x00AF |
1740: 8f 5f subi r24, 0xFF ; 255 |
1742: 80 93 af 00 sts 0x00AF, r24 |
CntKommutierungen++; |
1746: 80 91 89 00 lds r24, 0x0089 |
174a: 90 91 8a 00 lds r25, 0x008A |
174e: 01 96 adiw r24, 0x01 ; 1 |
1750: 90 93 8a 00 sts 0x008A, r25 |
1754: 80 93 89 00 sts 0x0089, r24 |
1758: 60 c0 rjmp .+192 ; 0x181a <__vector_16+0x1b4> |
} |
else |
{ |
STEUER_A_H; |
175a: ff bc out 0x2f, r15 ; 47 |
175c: 05 bd out 0x25, r16 ; 37 |
175e: e7 ba out 0x17, r14 ; 23 |
1760: 5c c0 rjmp .+184 ; 0x181a <__vector_16+0x1b4> |
} |
|
break; |
case 2: |
STEUER_B_H; |
1762: ff bc out 0x2f, r15 ; 47 |
1764: 05 bd out 0x25, r16 ; 37 |
1766: d7 ba out 0x17, r13 ; 23 |
if(sense) |
1768: 11 23 and r17, r17 |
176a: 61 f0 breq .+24 ; 0x1784 <__vector_16+0x11e> |
{ |
STEUER_A_L; |
176c: 82 b3 in r24, 0x12 ; 18 |
176e: 8f 7c andi r24, 0xCF ; 207 |
1770: 82 bb out 0x12, r24 ; 18 |
1772: 93 9a sbi 0x12, 3 ; 18 |
if(ZeitZumAdWandeln) AdConvert(); |
1774: 80 91 65 00 lds r24, 0x0065 |
1778: 81 11 cpse r24, r1 |
177a: 77 dd rcall .-1298 ; 0x126a <AdConvert> |
SENSE_C; |
177c: 80 91 8d 00 lds r24, 0x008D |
1780: 82 60 ori r24, 0x02 ; 2 |
1782: 29 c0 rjmp .+82 ; 0x17d6 <__vector_16+0x170> |
Phase++; |
CntKommutierungen++; |
} |
else |
{ |
STEUER_C_L; |
1784: 82 b3 in r24, 0x12 ; 18 |
1786: 87 7e andi r24, 0xE7 ; 231 |
1788: 82 bb out 0x12, r24 ; 18 |
178a: 95 9a sbi 0x12, 5 ; 18 |
178c: 46 c0 rjmp .+140 ; 0x181a <__vector_16+0x1b4> |
} |
|
break; |
case 3: |
STEUER_A_L; |
178e: 82 b3 in r24, 0x12 ; 18 |
1790: 8f 7c andi r24, 0xCF ; 207 |
1792: 82 bb out 0x12, r24 ; 18 |
1794: 93 9a sbi 0x12, 3 ; 18 |
if(!sense) |
1796: 11 23 and r17, r17 |
1798: 59 f4 brne .+22 ; 0x17b0 <__vector_16+0x14a> |
{ |
STEUER_C_H; |
179a: ff bc out 0x2f, r15 ; 47 |
179c: 05 bd out 0x25, r16 ; 37 |
179e: c7 ba out 0x17, r12 ; 23 |
if(ZeitZumAdWandeln) AdConvert(); |
17a0: 80 91 65 00 lds r24, 0x0065 |
17a4: 81 11 cpse r24, r1 |
17a6: 61 dd rcall .-1342 ; 0x126a <AdConvert> |
SENSE_B; |
17a8: 80 91 8d 00 lds r24, 0x008D |
17ac: 81 60 ori r24, 0x01 ; 1 |
17ae: c2 cf rjmp .-124 ; 0x1734 <__vector_16+0xce> |
Phase++; |
CntKommutierungen++; |
} |
else |
{ |
STEUER_B_H; |
17b0: ff bc out 0x2f, r15 ; 47 |
17b2: 05 bd out 0x25, r16 ; 37 |
17b4: d7 ba out 0x17, r13 ; 23 |
17b6: 31 c0 rjmp .+98 ; 0x181a <__vector_16+0x1b4> |
} |
|
|
break; |
case 4: |
STEUER_C_H; |
17b8: ff bc out 0x2f, r15 ; 47 |
17ba: 05 bd out 0x25, r16 ; 37 |
17bc: c7 ba out 0x17, r12 ; 23 |
if(sense) |
17be: 11 23 and r17, r17 |
17c0: 69 f0 breq .+26 ; 0x17dc <__vector_16+0x176> |
{ |
STEUER_B_L; |
17c2: 82 b3 in r24, 0x12 ; 18 |
17c4: 87 7d andi r24, 0xD7 ; 215 |
17c6: 82 bb out 0x12, r24 ; 18 |
17c8: 94 9a sbi 0x12, 4 ; 18 |
if(ZeitZumAdWandeln) AdConvert(); |
17ca: 80 91 65 00 lds r24, 0x0065 |
17ce: 81 11 cpse r24, r1 |
17d0: 4c dd rcall .-1384 ; 0x126a <AdConvert> |
SENSE_A; |
17d2: 80 91 8d 00 lds r24, 0x008D |
17d6: 87 b9 out 0x07, r24 ; 7 |
SENSE_FALLING_INT; |
17d8: 40 98 cbi 0x08, 0 ; 8 |
17da: b0 cf rjmp .-160 ; 0x173c <__vector_16+0xd6> |
Phase++; |
CntKommutierungen++; |
} |
else |
{ |
STEUER_A_L; |
17dc: 82 b3 in r24, 0x12 ; 18 |
17de: 8f 7c andi r24, 0xCF ; 207 |
17e0: 82 bb out 0x12, r24 ; 18 |
17e2: 93 9a sbi 0x12, 3 ; 18 |
17e4: 1a c0 rjmp .+52 ; 0x181a <__vector_16+0x1b4> |
} |
|
break; |
case 5: |
STEUER_B_L; |
17e6: 82 b3 in r24, 0x12 ; 18 |
17e8: 87 7d andi r24, 0xD7 ; 215 |
17ea: 82 bb out 0x12, r24 ; 18 |
17ec: 94 9a sbi 0x12, 4 ; 18 |
if(!sense) |
17ee: 11 23 and r17, r17 |
17f0: 89 f4 brne .+34 ; 0x1814 <__vector_16+0x1ae> |
{ |
STEUER_A_H; |
17f2: ff bc out 0x2f, r15 ; 47 |
17f4: 05 bd out 0x25, r16 ; 37 |
17f6: e7 ba out 0x17, r14 ; 23 |
if(ZeitZumAdWandeln) AdConvert(); |
17f8: 80 91 65 00 lds r24, 0x0065 |
17fc: 81 11 cpse r24, r1 |
17fe: 35 dd rcall .-1430 ; 0x126a <AdConvert> |
SENSE_C; |
1800: 80 91 8d 00 lds r24, 0x008D |
1804: 82 60 ori r24, 0x02 ; 2 |
1806: 87 b9 out 0x07, r24 ; 7 |
SENSE_RISING_INT; |
1808: 88 b1 in r24, 0x08 ; 8 |
180a: 83 60 ori r24, 0x03 ; 3 |
180c: 88 b9 out 0x08, r24 ; 8 |
Phase = 0; |
180e: 10 92 af 00 sts 0x00AF, r1 |
1812: 99 cf rjmp .-206 ; 0x1746 <__vector_16+0xe0> |
CntKommutierungen++; |
} |
else |
{ |
STEUER_C_H; |
1814: ff bc out 0x2f, r15 ; 47 |
1816: 05 bd out 0x25, r16 ; 37 |
1818: c7 ba out 0x17, r12 ; 23 |
} |
break; |
} |
} |
while((SENSE_L && sense) || (SENSE_H && !sense)); |
181a: 45 99 sbic 0x08, 5 ; 8 |
181c: 03 c0 rjmp .+6 ; 0x1824 <__vector_16+0x1be> |
181e: 11 23 and r17, r17 |
1820: 09 f0 breq .+2 ; 0x1824 <__vector_16+0x1be> |
1822: 41 cf rjmp .-382 ; 0x16a6 <__vector_16+0x40> |
1824: 45 9b sbis 0x08, 5 ; 8 |
1826: 03 c0 rjmp .+6 ; 0x182e <__vector_16+0x1c8> |
1828: 11 23 and r17, r17 |
182a: 09 f4 brne .+2 ; 0x182e <__vector_16+0x1c8> |
182c: 3c cf rjmp .-392 ; 0x16a6 <__vector_16+0x40> |
ZeitZumAdWandeln = 0; |
182e: 10 92 65 00 sts 0x0065, r1 |
} |
1832: ff 91 pop r31 |
1834: ef 91 pop r30 |
1836: bf 91 pop r27 |
1838: af 91 pop r26 |
183a: 9f 91 pop r25 |
183c: 8f 91 pop r24 |
183e: 7f 91 pop r23 |
1840: 6f 91 pop r22 |
1842: 5f 91 pop r21 |
1844: 4f 91 pop r20 |
1846: 3f 91 pop r19 |
1848: 2f 91 pop r18 |
184a: 1f 91 pop r17 |
184c: 0f 91 pop r16 |
184e: ff 90 pop r15 |
1850: ef 90 pop r14 |
1852: df 90 pop r13 |
1854: cf 90 pop r12 |
1856: 0f 90 pop r0 |
1858: 0f be out 0x3f, r0 ; 63 |
185a: 0f 90 pop r0 |
185c: 1f 90 pop r1 |
185e: 18 95 reti |
|
00001860 <__udivmodqi4>: |
1860: 99 1b sub r25, r25 |
1862: 79 e0 ldi r23, 0x09 ; 9 |
1864: 04 c0 rjmp .+8 ; 0x186e <__udivmodqi4_ep> |
|
00001866 <__udivmodqi4_loop>: |
1866: 99 1f adc r25, r25 |
1868: 96 17 cp r25, r22 |
186a: 08 f0 brcs .+2 ; 0x186e <__udivmodqi4_ep> |
186c: 96 1b sub r25, r22 |
|
0000186e <__udivmodqi4_ep>: |
186e: 88 1f adc r24, r24 |
1870: 7a 95 dec r23 |
1872: c9 f7 brne .-14 ; 0x1866 <__udivmodqi4_loop> |
1874: 80 95 com r24 |
1876: 08 95 ret |
|
00001878 <__udivmodhi4>: |
1878: aa 1b sub r26, r26 |
187a: bb 1b sub r27, r27 |
187c: 51 e1 ldi r21, 0x11 ; 17 |
187e: 07 c0 rjmp .+14 ; 0x188e <__udivmodhi4_ep> |
|
00001880 <__udivmodhi4_loop>: |
1880: aa 1f adc r26, r26 |
1882: bb 1f adc r27, r27 |
1884: a6 17 cp r26, r22 |
1886: b7 07 cpc r27, r23 |
1888: 10 f0 brcs .+4 ; 0x188e <__udivmodhi4_ep> |
188a: a6 1b sub r26, r22 |
188c: b7 0b sbc r27, r23 |
|
0000188e <__udivmodhi4_ep>: |
188e: 88 1f adc r24, r24 |
1890: 99 1f adc r25, r25 |
1892: 5a 95 dec r21 |
1894: a9 f7 brne .-22 ; 0x1880 <__udivmodhi4_loop> |
1896: 80 95 com r24 |
1898: 90 95 com r25 |
189a: bc 01 movw r22, r24 |
189c: cd 01 movw r24, r26 |
189e: 08 95 ret |
|
000018a0 <__udivmodsi4>: |
18a0: a1 e2 ldi r26, 0x21 ; 33 |
18a2: 1a 2e mov r1, r26 |
18a4: aa 1b sub r26, r26 |
18a6: bb 1b sub r27, r27 |
18a8: fd 01 movw r30, r26 |
18aa: 0d c0 rjmp .+26 ; 0x18c6 <__udivmodsi4_ep> |
|
000018ac <__udivmodsi4_loop>: |
18ac: aa 1f adc r26, r26 |
18ae: bb 1f adc r27, r27 |
18b0: ee 1f adc r30, r30 |
18b2: ff 1f adc r31, r31 |
18b4: a2 17 cp r26, r18 |
18b6: b3 07 cpc r27, r19 |
18b8: e4 07 cpc r30, r20 |
18ba: f5 07 cpc r31, r21 |
18bc: 20 f0 brcs .+8 ; 0x18c6 <__udivmodsi4_ep> |
18be: a2 1b sub r26, r18 |
18c0: b3 0b sbc r27, r19 |
18c2: e4 0b sbc r30, r20 |
18c4: f5 0b sbc r31, r21 |
|
000018c6 <__udivmodsi4_ep>: |
18c6: 66 1f adc r22, r22 |
18c8: 77 1f adc r23, r23 |
18ca: 88 1f adc r24, r24 |
18cc: 99 1f adc r25, r25 |
18ce: 1a 94 dec r1 |
18d0: 69 f7 brne .-38 ; 0x18ac <__udivmodsi4_loop> |
18d2: 60 95 com r22 |
18d4: 70 95 com r23 |
18d6: 80 95 com r24 |
18d8: 90 95 com r25 |
18da: 9b 01 movw r18, r22 |
18dc: ac 01 movw r20, r24 |
18de: bd 01 movw r22, r26 |
18e0: cf 01 movw r24, r30 |
18e2: 08 95 ret |
|
000018e4 <fdevopen>: |
18e4: 0f 93 push r16 |
18e6: 1f 93 push r17 |
18e8: cf 93 push r28 |
18ea: df 93 push r29 |
18ec: 8c 01 movw r16, r24 |
18ee: eb 01 movw r28, r22 |
18f0: 00 97 sbiw r24, 0x00 ; 0 |
18f2: 31 f4 brne .+12 ; 0x1900 <fdevopen+0x1c> |
18f4: 61 15 cp r22, r1 |
18f6: 71 05 cpc r23, r1 |
18f8: 19 f4 brne .+6 ; 0x1900 <fdevopen+0x1c> |
18fa: 20 e0 ldi r18, 0x00 ; 0 |
18fc: 30 e0 ldi r19, 0x00 ; 0 |
18fe: 37 c0 rjmp .+110 ; 0x196e <fdevopen+0x8a> |
1900: 81 e0 ldi r24, 0x01 ; 1 |
1902: 90 e0 ldi r25, 0x00 ; 0 |
1904: 6e e0 ldi r22, 0x0E ; 14 |
1906: 70 e0 ldi r23, 0x00 ; 0 |
1908: 38 d0 rcall .+112 ; 0x197a <calloc> |
190a: fc 01 movw r30, r24 |
190c: 9c 01 movw r18, r24 |
190e: 00 97 sbiw r24, 0x00 ; 0 |
1910: 71 f1 breq .+92 ; 0x196e <fdevopen+0x8a> |
1912: 80 e8 ldi r24, 0x80 ; 128 |
1914: 83 83 std Z+3, r24 ; 0x03 |
1916: 20 97 sbiw r28, 0x00 ; 0 |
1918: 71 f0 breq .+28 ; 0x1936 <fdevopen+0x52> |
191a: d3 87 std Z+11, r29 ; 0x0b |
191c: c2 87 std Z+10, r28 ; 0x0a |
191e: 81 e8 ldi r24, 0x81 ; 129 |
1920: 83 83 std Z+3, r24 ; 0x03 |
1922: 80 91 96 03 lds r24, 0x0396 |
1926: 90 91 97 03 lds r25, 0x0397 |
192a: 89 2b or r24, r25 |
192c: 21 f4 brne .+8 ; 0x1936 <fdevopen+0x52> |
192e: f0 93 97 03 sts 0x0397, r31 |
1932: e0 93 96 03 sts 0x0396, r30 |
1936: 01 15 cp r16, r1 |
1938: 11 05 cpc r17, r1 |
193a: c9 f0 breq .+50 ; 0x196e <fdevopen+0x8a> |
193c: 11 87 std Z+9, r17 ; 0x09 |
193e: 00 87 std Z+8, r16 ; 0x08 |
1940: 83 81 ldd r24, Z+3 ; 0x03 |
1942: 82 60 ori r24, 0x02 ; 2 |
1944: 83 83 std Z+3, r24 ; 0x03 |
1946: 80 91 98 03 lds r24, 0x0398 |
194a: 90 91 99 03 lds r25, 0x0399 |
194e: 89 2b or r24, r25 |
1950: 71 f4 brne .+28 ; 0x196e <fdevopen+0x8a> |
1952: f0 93 99 03 sts 0x0399, r31 |
1956: e0 93 98 03 sts 0x0398, r30 |
195a: 80 91 9a 03 lds r24, 0x039A |
195e: 90 91 9b 03 lds r25, 0x039B |
1962: 89 2b or r24, r25 |
1964: 21 f4 brne .+8 ; 0x196e <fdevopen+0x8a> |
1966: f0 93 9b 03 sts 0x039B, r31 |
196a: e0 93 9a 03 sts 0x039A, r30 |
196e: c9 01 movw r24, r18 |
1970: df 91 pop r29 |
1972: cf 91 pop r28 |
1974: 1f 91 pop r17 |
1976: 0f 91 pop r16 |
1978: 08 95 ret |
|
0000197a <calloc>: |
197a: 0f 93 push r16 |
197c: 1f 93 push r17 |
197e: cf 93 push r28 |
1980: df 93 push r29 |
1982: 68 9f mul r22, r24 |
1984: 80 01 movw r16, r0 |
1986: 69 9f mul r22, r25 |
1988: 10 0d add r17, r0 |
198a: 78 9f mul r23, r24 |
198c: 10 0d add r17, r0 |
198e: 11 24 eor r1, r1 |
1990: c8 01 movw r24, r16 |
1992: 0d d0 rcall .+26 ; 0x19ae <malloc> |
1994: ec 01 movw r28, r24 |
1996: 00 97 sbiw r24, 0x00 ; 0 |
1998: 21 f0 breq .+8 ; 0x19a2 <calloc+0x28> |
199a: 60 e0 ldi r22, 0x00 ; 0 |
199c: 70 e0 ldi r23, 0x00 ; 0 |
199e: a8 01 movw r20, r16 |
19a0: 0b d1 rcall .+534 ; 0x1bb8 <memset> |
19a2: ce 01 movw r24, r28 |
19a4: df 91 pop r29 |
19a6: cf 91 pop r28 |
19a8: 1f 91 pop r17 |
19aa: 0f 91 pop r16 |
19ac: 08 95 ret |
|
000019ae <malloc>: |
19ae: cf 93 push r28 |
19b0: df 93 push r29 |
19b2: bc 01 movw r22, r24 |
19b4: 82 30 cpi r24, 0x02 ; 2 |
19b6: 91 05 cpc r25, r1 |
19b8: 10 f4 brcc .+4 ; 0x19be <malloc+0x10> |
19ba: 62 e0 ldi r22, 0x02 ; 2 |
19bc: 70 e0 ldi r23, 0x00 ; 0 |
19be: a0 91 9e 03 lds r26, 0x039E |
19c2: b0 91 9f 03 lds r27, 0x039F |
19c6: ed 01 movw r28, r26 |
19c8: e0 e0 ldi r30, 0x00 ; 0 |
19ca: f0 e0 ldi r31, 0x00 ; 0 |
19cc: 40 e0 ldi r20, 0x00 ; 0 |
19ce: 50 e0 ldi r21, 0x00 ; 0 |
19d0: 21 c0 rjmp .+66 ; 0x1a14 <malloc+0x66> |
19d2: 88 81 ld r24, Y |
19d4: 99 81 ldd r25, Y+1 ; 0x01 |
19d6: 86 17 cp r24, r22 |
19d8: 97 07 cpc r25, r23 |
19da: 69 f4 brne .+26 ; 0x19f6 <malloc+0x48> |
19dc: 8a 81 ldd r24, Y+2 ; 0x02 |
19de: 9b 81 ldd r25, Y+3 ; 0x03 |
19e0: 30 97 sbiw r30, 0x00 ; 0 |
19e2: 19 f0 breq .+6 ; 0x19ea <malloc+0x3c> |
19e4: 93 83 std Z+3, r25 ; 0x03 |
19e6: 82 83 std Z+2, r24 ; 0x02 |
19e8: 04 c0 rjmp .+8 ; 0x19f2 <malloc+0x44> |
19ea: 90 93 9f 03 sts 0x039F, r25 |
19ee: 80 93 9e 03 sts 0x039E, r24 |
19f2: fe 01 movw r30, r28 |
19f4: 34 c0 rjmp .+104 ; 0x1a5e <malloc+0xb0> |
19f6: 68 17 cp r22, r24 |
19f8: 79 07 cpc r23, r25 |
19fa: 38 f4 brcc .+14 ; 0x1a0a <malloc+0x5c> |
19fc: 41 15 cp r20, r1 |
19fe: 51 05 cpc r21, r1 |
1a00: 19 f0 breq .+6 ; 0x1a08 <malloc+0x5a> |
1a02: 84 17 cp r24, r20 |
1a04: 95 07 cpc r25, r21 |
1a06: 08 f4 brcc .+2 ; 0x1a0a <malloc+0x5c> |
1a08: ac 01 movw r20, r24 |
1a0a: fe 01 movw r30, r28 |
1a0c: 8a 81 ldd r24, Y+2 ; 0x02 |
1a0e: 9b 81 ldd r25, Y+3 ; 0x03 |
1a10: 9c 01 movw r18, r24 |
1a12: e9 01 movw r28, r18 |
1a14: 20 97 sbiw r28, 0x00 ; 0 |
1a16: e9 f6 brne .-70 ; 0x19d2 <malloc+0x24> |
1a18: 41 15 cp r20, r1 |
1a1a: 51 05 cpc r21, r1 |
1a1c: a9 f1 breq .+106 ; 0x1a88 <malloc+0xda> |
1a1e: ca 01 movw r24, r20 |
1a20: 86 1b sub r24, r22 |
1a22: 97 0b sbc r25, r23 |
1a24: 04 97 sbiw r24, 0x04 ; 4 |
1a26: 08 f4 brcc .+2 ; 0x1a2a <malloc+0x7c> |
1a28: ba 01 movw r22, r20 |
1a2a: e0 e0 ldi r30, 0x00 ; 0 |
1a2c: f0 e0 ldi r31, 0x00 ; 0 |
1a2e: 2a c0 rjmp .+84 ; 0x1a84 <malloc+0xd6> |
1a30: 8d 91 ld r24, X+ |
1a32: 9c 91 ld r25, X |
1a34: 11 97 sbiw r26, 0x01 ; 1 |
1a36: 84 17 cp r24, r20 |
1a38: 95 07 cpc r25, r21 |
1a3a: f9 f4 brne .+62 ; 0x1a7a <malloc+0xcc> |
1a3c: 64 17 cp r22, r20 |
1a3e: 75 07 cpc r23, r21 |
1a40: 81 f4 brne .+32 ; 0x1a62 <malloc+0xb4> |
1a42: 12 96 adiw r26, 0x02 ; 2 |
1a44: 8d 91 ld r24, X+ |
1a46: 9c 91 ld r25, X |
1a48: 13 97 sbiw r26, 0x03 ; 3 |
1a4a: 30 97 sbiw r30, 0x00 ; 0 |
1a4c: 19 f0 breq .+6 ; 0x1a54 <malloc+0xa6> |
1a4e: 93 83 std Z+3, r25 ; 0x03 |
1a50: 82 83 std Z+2, r24 ; 0x02 |
1a52: 04 c0 rjmp .+8 ; 0x1a5c <malloc+0xae> |
1a54: 90 93 9f 03 sts 0x039F, r25 |
1a58: 80 93 9e 03 sts 0x039E, r24 |
1a5c: fd 01 movw r30, r26 |
1a5e: 32 96 adiw r30, 0x02 ; 2 |
1a60: 4f c0 rjmp .+158 ; 0x1b00 <malloc+0x152> |
1a62: ca 01 movw r24, r20 |
1a64: 86 1b sub r24, r22 |
1a66: 97 0b sbc r25, r23 |
1a68: fd 01 movw r30, r26 |
1a6a: e8 0f add r30, r24 |
1a6c: f9 1f adc r31, r25 |
1a6e: 61 93 st Z+, r22 |
1a70: 71 93 st Z+, r23 |
1a72: 02 97 sbiw r24, 0x02 ; 2 |
1a74: 8d 93 st X+, r24 |
1a76: 9c 93 st X, r25 |
1a78: 43 c0 rjmp .+134 ; 0x1b00 <malloc+0x152> |
1a7a: fd 01 movw r30, r26 |
1a7c: 82 81 ldd r24, Z+2 ; 0x02 |
1a7e: 93 81 ldd r25, Z+3 ; 0x03 |
1a80: 9c 01 movw r18, r24 |
1a82: d9 01 movw r26, r18 |
1a84: 10 97 sbiw r26, 0x00 ; 0 |
1a86: a1 f6 brne .-88 ; 0x1a30 <malloc+0x82> |
1a88: 80 91 9c 03 lds r24, 0x039C |
1a8c: 90 91 9d 03 lds r25, 0x039D |
1a90: 89 2b or r24, r25 |
1a92: 41 f4 brne .+16 ; 0x1aa4 <malloc+0xf6> |
1a94: 80 91 73 00 lds r24, 0x0073 |
1a98: 90 91 74 00 lds r25, 0x0074 |
1a9c: 90 93 9d 03 sts 0x039D, r25 |
1aa0: 80 93 9c 03 sts 0x039C, r24 |
1aa4: 40 91 75 00 lds r20, 0x0075 |
1aa8: 50 91 76 00 lds r21, 0x0076 |
1aac: 41 15 cp r20, r1 |
1aae: 51 05 cpc r21, r1 |
1ab0: 41 f4 brne .+16 ; 0x1ac2 <malloc+0x114> |
1ab2: 4d b7 in r20, 0x3d ; 61 |
1ab4: 5e b7 in r21, 0x3e ; 62 |
1ab6: 80 91 71 00 lds r24, 0x0071 |
1aba: 90 91 72 00 lds r25, 0x0072 |
1abe: 48 1b sub r20, r24 |
1ac0: 59 0b sbc r21, r25 |
1ac2: 20 91 9c 03 lds r18, 0x039C |
1ac6: 30 91 9d 03 lds r19, 0x039D |
1aca: 24 17 cp r18, r20 |
1acc: 35 07 cpc r19, r21 |
1ace: b0 f4 brcc .+44 ; 0x1afc <malloc+0x14e> |
1ad0: ca 01 movw r24, r20 |
1ad2: 82 1b sub r24, r18 |
1ad4: 93 0b sbc r25, r19 |
1ad6: 86 17 cp r24, r22 |
1ad8: 97 07 cpc r25, r23 |
1ada: 80 f0 brcs .+32 ; 0x1afc <malloc+0x14e> |
1adc: ab 01 movw r20, r22 |
1ade: 4e 5f subi r20, 0xFE ; 254 |
1ae0: 5f 4f sbci r21, 0xFF ; 255 |
1ae2: 84 17 cp r24, r20 |
1ae4: 95 07 cpc r25, r21 |
1ae6: 50 f0 brcs .+20 ; 0x1afc <malloc+0x14e> |
1ae8: 42 0f add r20, r18 |
1aea: 53 1f adc r21, r19 |
1aec: 50 93 9d 03 sts 0x039D, r21 |
1af0: 40 93 9c 03 sts 0x039C, r20 |
1af4: f9 01 movw r30, r18 |
1af6: 61 93 st Z+, r22 |
1af8: 71 93 st Z+, r23 |
1afa: 02 c0 rjmp .+4 ; 0x1b00 <malloc+0x152> |
1afc: e0 e0 ldi r30, 0x00 ; 0 |
1afe: f0 e0 ldi r31, 0x00 ; 0 |
1b00: cf 01 movw r24, r30 |
1b02: df 91 pop r29 |
1b04: cf 91 pop r28 |
1b06: 08 95 ret |
|
00001b08 <free>: |
1b08: cf 93 push r28 |
1b0a: df 93 push r29 |
1b0c: 00 97 sbiw r24, 0x00 ; 0 |
1b0e: 09 f4 brne .+2 ; 0x1b12 <free+0xa> |
1b10: 50 c0 rjmp .+160 ; 0x1bb2 <free+0xaa> |
1b12: ec 01 movw r28, r24 |
1b14: 22 97 sbiw r28, 0x02 ; 2 |
1b16: 1b 82 std Y+3, r1 ; 0x03 |
1b18: 1a 82 std Y+2, r1 ; 0x02 |
1b1a: a0 91 9e 03 lds r26, 0x039E |
1b1e: b0 91 9f 03 lds r27, 0x039F |
1b22: 10 97 sbiw r26, 0x00 ; 0 |
1b24: 09 f1 breq .+66 ; 0x1b68 <free+0x60> |
1b26: 40 e0 ldi r20, 0x00 ; 0 |
1b28: 50 e0 ldi r21, 0x00 ; 0 |
1b2a: ac 17 cp r26, r28 |
1b2c: bd 07 cpc r27, r29 |
1b2e: 08 f1 brcs .+66 ; 0x1b72 <free+0x6a> |
1b30: bb 83 std Y+3, r27 ; 0x03 |
1b32: aa 83 std Y+2, r26 ; 0x02 |
1b34: fe 01 movw r30, r28 |
1b36: 21 91 ld r18, Z+ |
1b38: 31 91 ld r19, Z+ |
1b3a: e2 0f add r30, r18 |
1b3c: f3 1f adc r31, r19 |
1b3e: ae 17 cp r26, r30 |
1b40: bf 07 cpc r27, r31 |
1b42: 79 f4 brne .+30 ; 0x1b62 <free+0x5a> |
1b44: 8d 91 ld r24, X+ |
1b46: 9c 91 ld r25, X |
1b48: 11 97 sbiw r26, 0x01 ; 1 |
1b4a: 28 0f add r18, r24 |
1b4c: 39 1f adc r19, r25 |
1b4e: 2e 5f subi r18, 0xFE ; 254 |
1b50: 3f 4f sbci r19, 0xFF ; 255 |
1b52: 39 83 std Y+1, r19 ; 0x01 |
1b54: 28 83 st Y, r18 |
1b56: 12 96 adiw r26, 0x02 ; 2 |
1b58: 8d 91 ld r24, X+ |
1b5a: 9c 91 ld r25, X |
1b5c: 13 97 sbiw r26, 0x03 ; 3 |
1b5e: 9b 83 std Y+3, r25 ; 0x03 |
1b60: 8a 83 std Y+2, r24 ; 0x02 |
1b62: 41 15 cp r20, r1 |
1b64: 51 05 cpc r21, r1 |
1b66: 71 f4 brne .+28 ; 0x1b84 <free+0x7c> |
1b68: d0 93 9f 03 sts 0x039F, r29 |
1b6c: c0 93 9e 03 sts 0x039E, r28 |
1b70: 20 c0 rjmp .+64 ; 0x1bb2 <free+0xaa> |
1b72: 12 96 adiw r26, 0x02 ; 2 |
1b74: 8d 91 ld r24, X+ |
1b76: 9c 91 ld r25, X |
1b78: 13 97 sbiw r26, 0x03 ; 3 |
1b7a: ad 01 movw r20, r26 |
1b7c: 00 97 sbiw r24, 0x00 ; 0 |
1b7e: 11 f0 breq .+4 ; 0x1b84 <free+0x7c> |
1b80: dc 01 movw r26, r24 |
1b82: d3 cf rjmp .-90 ; 0x1b2a <free+0x22> |
1b84: fa 01 movw r30, r20 |
1b86: d3 83 std Z+3, r29 ; 0x03 |
1b88: c2 83 std Z+2, r28 ; 0x02 |
1b8a: 21 91 ld r18, Z+ |
1b8c: 31 91 ld r19, Z+ |
1b8e: e2 0f add r30, r18 |
1b90: f3 1f adc r31, r19 |
1b92: ce 17 cp r28, r30 |
1b94: df 07 cpc r29, r31 |
1b96: 69 f4 brne .+26 ; 0x1bb2 <free+0xaa> |
1b98: 88 81 ld r24, Y |
1b9a: 99 81 ldd r25, Y+1 ; 0x01 |
1b9c: 28 0f add r18, r24 |
1b9e: 39 1f adc r19, r25 |
1ba0: 2e 5f subi r18, 0xFE ; 254 |
1ba2: 3f 4f sbci r19, 0xFF ; 255 |
1ba4: fa 01 movw r30, r20 |
1ba6: 31 83 std Z+1, r19 ; 0x01 |
1ba8: 20 83 st Z, r18 |
1baa: 8a 81 ldd r24, Y+2 ; 0x02 |
1bac: 9b 81 ldd r25, Y+3 ; 0x03 |
1bae: 93 83 std Z+3, r25 ; 0x03 |
1bb0: 82 83 std Z+2, r24 ; 0x02 |
1bb2: df 91 pop r29 |
1bb4: cf 91 pop r28 |
1bb6: 08 95 ret |
|
00001bb8 <memset>: |
1bb8: dc 01 movw r26, r24 |
1bba: 01 c0 rjmp .+2 ; 0x1bbe <memset+0x6> |
1bbc: 6d 93 st X+, r22 |
1bbe: 41 50 subi r20, 0x01 ; 1 |
1bc0: 50 40 sbci r21, 0x00 ; 0 |
1bc2: e0 f7 brcc .-8 ; 0x1bbc <memset+0x4> |
1bc4: 08 95 ret |
|
00001bc6 <_exit>: |
1bc6: f8 94 cli |
|
00001bc8 <__stop_program>: |
1bc8: ff cf rjmp .-2 ; 0x1bc8 <__stop_program> |