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Ignore whitespace Rev 1207 → Rev 1214

/branches/V0.72p Code Redesign killagreg/dsl.c
85,13 → 85,16
FFFF 1F23F000A30426
*/
 
 
#include <stdlib.h>
#include "dsl.h"
#include "rc.h"
#include "uart0.h"
 
uint8_t dsl_RSSI = 0;
uint8_t dsl_Battery = 0;
uint8_t dsl_Allocation = 0;
uint8_t PacketBuffer[6];
uint8_t Jitter = 0; // same measurement as RC_Quality in rc.c
 
typedef union
{
110,17 → 113,25
int16_t tmp;
uint8_t index = channel + 1; // mk channels start with 1
 
RC_Quality = (212 * (uint16_t)dsl_RSSI) / 128; // have to be scaled approx. by a factor of 1.66 to get 200 at full level
if(RC_Quality > 255) RC_Quality = 255;
 
// signal from DSL-receiver is between 7373 (1ms) und 14745 (2ms).
signal-= 11059; // shift to neutral
signal/= 24; // scale to mk rc resolution
 
if(abs(signal-PPM_in[index]) < 6)
{
if(Jitter < 200) Jitter +=10;
else Jitter = 200;
}
 
// calculate exponential history for signal
tmp = (3 * (PPM_in[index]) + signal) / 4;
if(tmp > signal+1) tmp--; else
if(tmp < signal-1) tmp++;
// calculate signal difference on good signal level
if(RC_Quality >= 195) PPM_diff[index] = ((tmp - PPM_in[index]) / 3) * 3; // cut off lower 3 bit for noise reduction
if(Jitter >= 195) PPM_diff[index] = ((tmp - PPM_in[index]) / 3) * 3; // cut off lower 3 bit for noise reduction
else PPM_diff[index] = 0;
PPM_in[index] = tmp; // update channel value
 
127,7 → 138,6
if(index == 4)
{
NewPpmData = 0;
NewRCFrames++;
}
}
 
145,8 → 155,6
dsl_Allocation = PacketBuffer[1]; // Get frequency allocation
// ?? = PacketBuffer[2];
dsl_RSSI = PacketBuffer[3]; // Get signal quality
RC_Quality = (212 * (uint16_t)dsl_RSSI) / 128; // have to be scaled approx. by a factor of 1.66 to get 200 at full level
if(RC_Quality > 255) RC_Quality = 255;
dsl_Battery = PacketBuffer[4]; // Get voltage of battery supply
// ?? = PacketBuffer[5];
if(dsl_RSSI == 0)
/branches/V0.72p Code Redesign killagreg/main.c
268,7 → 268,7
ExternStickRoll = 0;
ExternStickYaw = 0;
}
 
if(RC_Quality) RC_Quality--;
if(!I2CTimeout)
{
I2CTimeout = 5;
/branches/V0.72p Code Redesign killagreg/rc.c
60,7 → 60,6
volatile uint8_t NewPpmData = 1;
volatile int16_t RC_Quality = 0;
 
volatile uint8_t NewRCFrames = 0;
 
 
/***************************************************************/
110,8 → 109,8
// Enable Input Capture Interrupt (bit: ICIE1=1)
// Disable Output Compare A & B Match Interrupts (bit: OCIE1B=0, OICIE1A=0)
// Enable Overflow Interrupt (bit: TOIE1=0)
TIMSK1 &= ~((1<<OCIE1B)|(1<<OCIE1A));
TIMSK1 |= (1<<ICIE1)|(1<<TOIE1);
TIMSK1 &= ~((1<<OCIE1B)|(1<<OCIE1A)|(1<<TOIE1));
TIMSK1 |= (1<<ICIE1);
 
RC_Quality = 0;
 
119,15 → 118,6
}
 
 
// happens every 0.209712 s.
// check for at least one new frame per timer overflow (timeout)
ISR(TIMER1_OVF_vect)
{
if (NewRCFrames == 0) RC_Quality -= RC_Quality/8;
NewRCFrames = 0;
}
 
 
/********************************************************************/
/* Every time a positive edge is detected at PD6 */
/********************************************************************/
169,10 → 159,9
{
// if a sync gap happens and there where at least 4 channels decoded before
// then the NewPpmData flag is reset indicating valid data in the PPM_in[] array.
if(index == 4)
if(index >= 4)
{
NewPpmData = 0; // Null means NewData for the first 4 channels
NewRCFrames++;
}
// synchronize channel index
index = 1;
188,7 → 177,7
// shift signal to zero symmetric range -154 to 159
signal -= 466; // offset of 1.4912 ms ??? (469 * 3.2µs = 1.5008 ms)
// check for stable signal
if(abs(signal-PPM_in[index]) < 6)
if(abs(signal - PPM_in[index]) < 6)
{
if(RC_Quality < 200) RC_Quality +=10;
else RC_Quality = 200;
212,7 → 201,6
}
}
}
if(RC_Quality) RC_Quality--;
}
 
 
/branches/V0.72p Code Redesign killagreg/rc.h
21,6 → 21,5
extern volatile int16_t PPM_diff[15]; // the differentiated RC-Signal
extern volatile uint8_t NewPpmData; // 0 indicates a new recieved PPM Frame
extern volatile int16_t RC_Quality; // rc signal quality indicator (0 to 200)
extern volatile uint8_t NewRCFrames;
 
#endif //_RC_H