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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 196 | killagreg | 1 | /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** |
| 1 | ingob | 2 | * File Name : 91x_fmi.h |
| 3 | * Author : MCD Application Team |
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| 196 | killagreg | 4 | * Version : V2.1 |
| 5 | * Date : 12/22/2008 |
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| 1 | ingob | 6 | * Description : This file contains all the functions prototypes for the |
| 196 | killagreg | 7 | * FMI firmware library. |
| 1 | ingob | 8 | ******************************************************************************** |
| 9 | * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH |
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| 10 | * CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS |
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| 11 | * A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT |
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| 12 | * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT |
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| 13 | * OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION |
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| 14 | * CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
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| 15 | *******************************************************************************/ |
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| 16 | |||
| 17 | |||
| 18 | /* Define to prevent recursive inclusion ------------------------------------ */ |
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| 19 | |||
| 20 | #ifndef __91x_FMI_H |
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| 21 | #define __91x_FMI_H |
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| 22 | |||
| 23 | |||
| 24 | |||
| 25 | /* Includes ------------------------------------------------------------------*/ |
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| 26 | |||
| 27 | #include "91x_map.h" |
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| 28 | |||
| 29 | /* Exported types ------------------------------------------------------------*/ |
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| 30 | /* Exported constants --------------------------------------------------------*/ |
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| 31 | |||
| 32 | /* FMI banks */ |
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| 33 | |||
| 196 | killagreg | 34 | #ifdef Boot_Bank_1 /* Boot from Bank 1 */ |
| 1 | ingob | 35 | |
| 196 | killagreg | 36 | |
| 1 | ingob | 37 | #define FMI_BANK_0 ((*(vu32*)0x54000010) << 2) /* FMI Bank 0 */ |
| 38 | #define FMI_BANK_1 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 1 */ |
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| 39 | |||
| 196 | killagreg | 40 | #endif |
| 1 | ingob | 41 | |
| 196 | killagreg | 42 | #ifdef Boot_Bank_0 /* Boot from Bank 0 */ |
| 43 | |||
| 1 | ingob | 44 | #define FMI_BANK_0 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 0 */ |
| 45 | #define FMI_BANK_1 ((*(vu32*)0x54000010) << 2) /* FMI Bank 1 */ |
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| 46 | |||
| 47 | #endif |
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| 48 | |||
| 49 | |||
| 196 | killagreg | 50 | #define FMI_B0S0 0x00000000 + FMI_BANK_0 /* Bank 0 sector 0*/ |
| 51 | #define FMI_B0S1 0x00010000 + FMI_BANK_0 /* Bank 0 sector 1*/ |
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| 52 | #define FMI_B0S2 0x00020000 + FMI_BANK_0 /* Bank 0 sector 2*/ |
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| 53 | #define FMI_B0S3 0x00030000 + FMI_BANK_0 /* Bank 0 sector 3*/ |
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| 54 | #define FMI_B0S4 0x00040000 + FMI_BANK_0 /* Bank 0 sector 4*/ |
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| 55 | #define FMI_B0S5 0x00050000 + FMI_BANK_0 /* Bank 0 sector 5*/ |
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| 56 | #define FMI_B0S6 0x00060000 + FMI_BANK_0 /* Bank 0 sector 6*/ |
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| 57 | #define FMI_B0S7 0x00070000 + FMI_BANK_0 /* Bank 0 sector 7*/ |
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| 58 | #define FMI_B0S8 0x00080000 + FMI_BANK_0 /* Bank 0 sector 8*/ |
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| 59 | #define FMI_B0S9 0x00090000 + FMI_BANK_0 /* Bank 0 sector 9*/ |
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| 60 | #define FMI_B0S10 0x000A0000 + FMI_BANK_0 /* Bank 0 sector 10*/ |
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| 61 | #define FMI_B0S11 0x000B0000 + FMI_BANK_0 /* Bank 0 sector 11*/ |
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| 62 | #define FMI_B0S12 0x000C0000 + FMI_BANK_0 /* Bank 0 sector 12*/ |
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| 63 | #define FMI_B0S13 0x000D0000 + FMI_BANK_0 /* Bank 0 sector 13*/ |
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| 64 | #define FMI_B0S14 0x000E0000 + FMI_BANK_0 /* Bank 0 sector 14*/ |
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| 65 | #define FMI_B0S15 0x000F0000 + FMI_BANK_0 /* Bank 0 sector 15*/ |
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| 66 | #define FMI_B0S16 0x00100000 + FMI_BANK_0 /* Bank 0 sector 16*/ |
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| 67 | #define FMI_B0S17 0x00110000 + FMI_BANK_0 /* Bank 0 sector 17*/ |
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| 68 | #define FMI_B0S18 0x00120000 + FMI_BANK_0 /* Bank 0 sector 18*/ |
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| 69 | #define FMI_B0S19 0x00130000 + FMI_BANK_0 /* Bank 0 sector 19*/ |
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| 70 | #define FMI_B0S20 0x00140000 + FMI_BANK_0 /* Bank 0 sector 20*/ |
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| 71 | #define FMI_B0S21 0x00150000 + FMI_BANK_0 /* Bank 0 sector 21*/ |
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| 72 | #define FMI_B0S22 0x00160000 + FMI_BANK_0 /* Bank 0 sector 22*/ |
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| 73 | #define FMI_B0S23 0x00170000 + FMI_BANK_0 /* Bank 0 sector 23*/ |
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| 74 | #define FMI_B0S24 0x00180000 + FMI_BANK_0 /* Bank 0 sector 24*/ |
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| 75 | #define FMI_B0S25 0x00190000 + FMI_BANK_0 /* Bank 0 sector 25*/ |
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| 76 | #define FMI_B0S26 0x001A0000 + FMI_BANK_0 /* Bank 0 sector 26*/ |
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| 77 | #define FMI_B0S27 0x001B0000 + FMI_BANK_0 /* Bank 0 sector 27*/ |
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| 78 | #define FMI_B0S28 0x001C0000 + FMI_BANK_0 /* Bank 0 sector 28*/ |
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| 79 | #define FMI_B0S29 0x001D0000 + FMI_BANK_0 /* Bank 0 sector 29*/ |
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| 80 | #define FMI_B0S30 0x001E0000 + FMI_BANK_0 /* Bank 0 sector 30*/ |
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| 81 | #define FMI_B0S31 0x001F0000 + FMI_BANK_0 /* Bank 0 sector 31*/ |
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| 1 | ingob | 82 | |
| 196 | killagreg | 83 | |
| 84 | #ifdef Flash_2MB_1MB |
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| 85 | |||
| 1 | ingob | 86 | #define FMI_B1S0 0x00000000 + FMI_BANK_1 /* Bank 1 sector 0 */ |
| 196 | killagreg | 87 | #define FMI_B1S1 0x00004000 + FMI_BANK_1 /* Bank 1 sector 1 */ |
| 88 | #define FMI_B1S2 0x00008000 + FMI_BANK_1 /* Bank 1 sector 2 */ |
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| 89 | #define FMI_B1S3 0x0000C000 + FMI_BANK_1 /* Bank 1 sector 3 */ |
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| 90 | #define FMI_B1S4 0x00010000 + FMI_BANK_1 /* Bank 1 sector 4 */ |
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| 91 | #define FMI_B1S5 0x00014000 + FMI_BANK_1 /* Bank 1 sector 5 */ |
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| 92 | #define FMI_B1S6 0x00018000 + FMI_BANK_1 /* Bank 1 sector 6 */ |
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| 93 | #define FMI_B1S7 0x0001C000 + FMI_BANK_1 /* Bank 1 sector 7 */ |
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| 94 | |||
| 95 | #endif |
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| 96 | |||
| 97 | #ifdef Flash_512KB_256KB |
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| 98 | |||
| 99 | #define FMI_B1S0 0x00000000 + FMI_BANK_1 /* Bank 1 sector 0 */ |
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| 1 | ingob | 100 | #define FMI_B1S1 0x00002000 + FMI_BANK_1 /* Bank 1 sector 1 */ |
| 101 | #define FMI_B1S2 0x00004000 + FMI_BANK_1 /* Bank 1 sector 2 */ |
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| 102 | #define FMI_B1S3 0x00006000 + FMI_BANK_1 /* Bank 1 sector 3 */ |
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| 103 | |||
| 196 | killagreg | 104 | #endif |
| 105 | |||
| 106 | |||
| 107 | |||
| 1 | ingob | 108 | /* FMI Flags */ |
| 109 | |||
| 110 | #define FMI_FLAG_SPS 0x02 /* Sector Protection Status Flag */ |
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| 111 | #define FMI_FLAG_PSS 0x04 /* Program Suspend Status Flag */ |
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| 112 | #define FMI_FLAG_PS 0x10 /* Program Status Flag */ |
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| 113 | #define FMI_FLAG_ES 0x20 /* Erase Status Flag */ |
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| 114 | #define FMI_FLAG_ESS 0x40 /* Erase Suspend Status Flag */ |
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| 115 | #define FMI_FLAG_PECS 0x80 /* FPEC Status Flag */ |
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| 116 | |||
| 117 | /* FMI read wait states */ |
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| 118 | |||
| 119 | #define FMI_READ_WAIT_STATE_1 0x0000 /* One read wait state */ |
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| 120 | #define FMI_READ_WAIT_STATE_2 0x2000 /* Two read wait states */ |
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| 121 | #define FMI_READ_WAIT_STATE_3 0x4000 /* Three read wait states */ |
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| 122 | |||
| 123 | /* FMI write wait states */ |
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| 124 | |||
| 125 | #define FMI_WRITE_WAIT_STATE_0 0xFFFFFEFF /* Zero wait state */ |
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| 126 | #define FMI_WRITE_WAIT_STATE_1 0x00000100 /* One wait state */ |
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| 127 | |||
| 128 | /* FMI power down configuration */ |
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| 129 | |||
| 130 | #define FMI_PWD_ENABLE 0x1000 /* FMI Power Down Enable */ |
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| 131 | #define FMI_PWD_DISABLE 0x0000 /* FMI Power Down Disable */ |
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| 132 | |||
| 133 | /* FMI low voltage detector */ |
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| 134 | |||
| 135 | #define FMI_LVD_ENABLE 0x0000 /* FMI Low Voltage Detector Enable */ |
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| 136 | #define FMI_LVD_DISABLE 0x0800 /* FMI Low Voltage Detector Disable */ |
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| 137 | |||
| 138 | /* FMI frequency range */ |
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| 139 | |||
| 140 | #define FMI_FREQ_LOW 0x0000 /* FMI Low bus working frequency */ |
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| 141 | #define FMI_FREQ_HIGH 0x0040 /* FMI High bus working gfrequency */ |
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| 142 | /* Above 66 MHz*/ |
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| 143 | /* FMI OTP word addresses */ |
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| 144 | |||
| 145 | #define FMI_OTP_WORD_0 0x00 /* OTP word 0 */ |
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| 146 | #define FMI_OTP_WORD_1 0x04 /* OTP word 1 */ |
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| 147 | #define FMI_OTP_WORD_2 0x08 /* OTP word 2 */ |
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| 148 | #define FMI_OTP_WORD_3 0x0C /* OTP word 3 */ |
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| 149 | #define FMI_OTP_WORD_4 0x10 /* OTP word 4 */ |
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| 150 | #define FMI_OTP_WORD_5 0x14 /* OTP word 5 */ |
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| 151 | #define FMI_OTP_WORD_6 0x18 /* OTP word 6 */ |
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| 152 | #define FMI_OTP_WORD_7 0x1C /* OTP word 7 */ |
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| 153 | |||
| 154 | /* FMI OTP halfword addresses */ |
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| 155 | |||
| 156 | #define FMI_OTP_LOW_HALFWORD_0 0x00 /* OTP Low halfword 0 */ |
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| 157 | #define FMI_OTP_HIGH_HALFWORD_0 0x02 /* OTP High halfword 0 */ |
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| 158 | #define FMI_OTP_LOW_HALFWORD_1 0x04 /* OTP Low halfword 1 */ |
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| 159 | #define FMI_OTP_HIGH_HALFWORD_1 0x06 /* OTP High halfword 1 */ |
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| 160 | #define FMI_OTP_LOW_HALFWORD_2 0x08 /* OTP Low halfword 2 */ |
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| 161 | #define FMI_OTP_HIGH_HALFWORD_2 0x0A /* OTP High halfword 2 */ |
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| 162 | #define FMI_OTP_LOW_HALFWORD_3 0x0C /* OTP Low halfword 3 */ |
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| 163 | #define FMI_OTP_HIGH_HALFWORD_3 0x0E /* OTP High halfword 3 */ |
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| 164 | #define FMI_OTP_LOW_HALFWORD_4 0x10 /* OTP Low halfword 4 */ |
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| 165 | #define FMI_OTP_HIGH_HALFWORD_4 0x12 /* OTP High halfword 4 */ |
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| 166 | #define FMI_OTP_LOW_HALFWORD_5 0x14 /* OTP Low halfword 5 */ |
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| 167 | #define FMI_OTP_HIGH_HALFWORD_5 0x16 /* OTP High halfword 5 */ |
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| 168 | #define FMI_OTP_LOW_HALFWORD_6 0x18 /* OTP Low halfword 6 */ |
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| 169 | #define FMI_OTP_HIGH_HALFWORD_6 0x1A /* OTP High halfword 6 */ |
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| 170 | #define FMI_OTP_LOW_HALFWORD_7 0x1C /* OTP Low halfword 7 */ |
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| 171 | #define FMI_OTP_HIGH_HALFWORD_7 0x1E /* OTP High halfword 7 */ |
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| 172 | |||
| 196 | killagreg | 173 | /*FMI LSB RSIG Address*/ |
| 1 | ingob | 174 | |
| 196 | killagreg | 175 | #define FMI_ReadRSIGData_0 0x00 /*Manufacturer Code*/ |
| 176 | #define FMI_ReadRSIGData_1 0x01 /*Device Code*/ |
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| 177 | #define FMI_ReadRSIGData_2 0x02 /*Die Revision Code*/ |
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| 178 | #define FMI_ReadRSIGData_3 0x03 /*Protection Level 2 Register for 512KB Flash */ |
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| 179 | /*or Protection Level 1 Register (sectors of bank0)*/ |
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| 180 | /* for 2MB flash*/ |
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| 1 | ingob | 181 | |
| 196 | killagreg | 182 | #define FMI_ReadRSIGData_4 0x04 /*Protection Level 1 Register for 512KB Flash*/ |
| 183 | /* or Protection Level 1 Register (sectors of bank1)*/ |
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| 184 | /* for 2MB flash*/ |
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| 1 | ingob | 185 | |
| 196 | killagreg | 186 | #define FMI_ReadRSIGData_5 0x05 /*Protection Status Register(sectors of bank0)*/ |
| 187 | /*for 2MB flash or Flash Configuration Register*/ |
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| 188 | /*for 512KB flash*/ |
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| 189 | #define FMI_ReadRSIGData_6 0x06 /*Protection Status Register (sectors of bank1)*/ |
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| 190 | /*available only for 2MB flash*/ |
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| 191 | #define FMI_ReadRSIGData_7 0x07 /*Flash Configuration Register*/ |
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| 192 | /*available only for 2MB flash*/ |
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| 193 | |||
| 194 | |||
| 1 | ingob | 195 | /* Timeout error */ |
| 196 | |||
| 197 | #define FMI_TIME_OUT_ERROR 0x00 /* Timeout error */ |
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| 198 | #define FMI_NO_TIME_OUT_ERROR 0x01 /* No Timeout error */ |
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| 199 | |||
| 200 | /* Module private variables --------------------------------------------------*/ |
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| 201 | /* Exported macro ------------------------------------------------------------*/ |
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| 202 | /* Private functions ---------------------------------------------------------*/ |
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| 203 | /* Exported functions ------------------------------------------------------- */ |
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| 204 | |||
| 205 | void FMI_BankRemapConfig(u8 FMI_BootBankSize, u8 FMI_NonBootBankSize, \ |
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| 206 | u32 FMI_BootBankAddress, u32 FMI_NonBootBankAddress); |
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| 207 | void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,\ |
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| 208 | u16 FMI_LVDEN, u16 FMI_FreqRange); |
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| 209 | void FMI_EraseSector(vu32 FMI_Sector); |
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| 210 | void FMI_EraseBank(vu32 FMI_Bank); |
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| 211 | void FMI_WriteHalfWord(u32 FMI_Address, u16 FMI_Data); |
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| 212 | void FMI_WriteOTPHalfWord(u8 FMI_OTPHWAddress, u16 FMI_OTPData); |
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| 213 | u32 FMI_ReadWord(u32 FMI_Address); |
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| 214 | u32 FMI_ReadOTPData(u8 FMI_OTPAddress); |
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| 215 | FlagStatus FMI_GetFlagStatus(u8 FMI_Flag, vu32 FMI_Bank); |
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| 216 | u16 FMI_GetReadWaitStateValue(void); |
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| 217 | u16 FMI_GetWriteWaitStateValue(void); |
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| 218 | void FMI_SuspendEnable(vu32 FMI_Bank); |
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| 219 | void FMI_ResumeEnable(vu32 FMI_Bank); |
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| 220 | void FMI_ClearFlag(vu32 FMI_Bank); |
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| 221 | void FMI_WriteProtectionCmd(vu32 FMI_Sector, FunctionalState FMI_NewState); |
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| 222 | u8 FMI_WaitForLastOperation(vu32 FMI_Bank); |
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| 196 | killagreg | 223 | u32 FMI_ReadRSIGData(u8 FMI_LSB_RSIGAddress); |
| 1 | ingob | 224 | |
| 225 | #endif /* __91x_FMI_H */ |
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| 226 | |||
| 196 | killagreg | 227 | /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ |
| 1 | ingob | 228 |